[lld-macho] Extract embedded addends for arm64 UNSIGNED relocations

[int3]

Summary

On arm64, UNSIGNED relocs are the only ones that use embedded addends
instead of the ADDEND relocation.

Also ensure that the addend works when UNSIGNED is part of a SUBTRACTOR
pair.

lld/MachO/Arch/ARM64.cpp

#undef B
   assert(type < relocAttrsArray.size() && "invalid relocation type");
   if (type >= relocAttrsArray.size())
     return TargetInfo::invalidRelocAttrs;
   return relocAttrsArray[type];
 }
 
 uint64_t ARM64::getEmbeddedAddend(MemoryBufferRef mb, const section_64 &sec,
                                   const relocation_info rel) const {
+  if (rel.r_type != ARM64_RELOC_UNSIGNED) {
+    // All other reloc types should use the ADDEND relocation to store their
+    // addends.
     // TODO(gkm): extract embedded addend just so we can assert that it is 0
     return 0;
   }
 
+  auto *buf = reinterpret_cast<const uint8_t *>(mb.getBufferStart());
+  const uint8_t *loc = buf + sec.offset + rel.r_address;
+  switch (rel.r_length) {
+  case 2:
+    return read32le(loc);
+  case 3:
+    return read64le(loc);
+  default:
+    llvm_unreachable("invalid r_length");
+  }
+}
+
 inline uint64_t bitField(uint64_t value, int right, int width, int left) {
   return ((value >> right) & ((1 << width) - 1)) << left;
 }
 
 //              25                                                0
 // +-----------+---------------------------------------------------+
 // |           |                       imm26                       |
 // +-----------+---------------------------------------------------+

lld/MachO/InputFiles.cpp

if (target->hasAttr(relInfo.r_type, RelocAttrBits::ADDEND)) {
       pairedAddend = SignExtend64<24>(relInfo.r_symbolnum);
       relInfo = relInfos[++i];
     }
     assert(i < relInfos.size());
     if (!validateRelocationInfo(this, sec, relInfo))
       continue;
     if (relInfo.r_address & R_SCATTERED)
       fatal("TODO: Scattered relocations not supported");
-    uint64_t embeddedAddend = target->getEmbeddedAddend(mb, sec, relInfo);
-    assert(!(embeddedAddend && pairedAddend));
-    uint64_t totalAddend = pairedAddend + embeddedAddend;
 
     Reloc p;
     if (target->hasAttr(relInfo.r_type, RelocAttrBits::SUBTRAHEND)) {
       p.type = relInfo.r_type;
       p.referent = symbols[relInfo.r_symbolnum];
       relInfo = relInfos[++i];
       // SUBTRACTOR relocations should always be followed by an UNSIGNED one
       // indicating the minuend symbol.
       assert(target->hasAttr(relInfo.r_type, RelocAttrBits::UNSIGNED) &&
              relInfo.r_extern);
     }
+    uint64_t embeddedAddend = target->getEmbeddedAddend(mb, sec, relInfo);
+    assert(!(embeddedAddend && pairedAddend));
+    uint64_t totalAddend = pairedAddend + embeddedAddend;
     Reloc r;
     r.type = relInfo.r_type;
     r.pcrel = relInfo.r_pcrel;
     r.length = relInfo.r_length;
     r.offset = relInfo.r_address;
     if (relInfo.r_extern) {
       r.referent = symbols[relInfo.r_symbolnum];
       r.addend = totalAddend;

lld/test/MachO/arm64-relocs.s

 
 # CHECK-LABEL: _foo:
 # CHECK-NEXT:  bl 0x[[#BAR+120]]
 # CHECK-NEXT:  adrp x2, [[#]] ; 0x[[#BAZ+4096-128]]
 # CHECK-NEXT:  ldr  x2, [x2, #128]
 # CHECK-NEXT:  ret
 
 # CHECK-LABEL: Contents of (__DATA_CONST,__const) section
-# CHECK:       [[#PTR_1]] {{0*}}[[#BAZ]] 00000000 00000000 00000000
-# CHECK:       [[#PTR_2]] {{0*}}[[#BAZ]] 00000000 00000000 00000000
+# CHECK:       [[#PTR_1]] {{0*}}[[#BAZ]]     00000000 00000000 00000000
+# CHECK:       [[#PTR_2]] {{0*}}[[#BAZ+123]] 00000000 00000000 00000000
 
 .text
 .globl _foo, _bar, _baz
 .p2align 2
 _foo:
   ## Generates ARM64_RELOC_BRANCH26 and ARM64_RELOC_ADDEND
   bl _bar + 123
   ## Generates ARM64_RELOC_PAGE21 and ADDEND

 
 .section __DATA_CONST,__const
 ## These generate ARM64_RELOC_UNSIGNED symbol relocations
 ## XXX: how to generate UNSIGNED section relocations?
 _ptr_1:
   .quad _baz
   .space 8
 _ptr_2:
-  .quad _baz
+  .quad _baz + 123
   .space 8
 
 .subsections_via_symbols

lld/test/MachO/reloc-subtractor.s

 # RUN: rm -rf %t; mkdir %t
 # RUN: llvm-mc -filetype=obj -triple=x86_64-apple-darwin %s -o %t/x86_64.o
 # RUN: llvm-mc -filetype=obj -triple=arm64-apple-darwin %s -o %t/arm64.o
 # RUN: %lld -lSystem %t/x86_64.o -o %t/x86_64
 # RUN: llvm-objdump --syms --full-contents --rebase %t/x86_64 | FileCheck %s
 # RUN: %lld -arch arm64 -lSystem %t/arm64.o -o %t/arm64
 # RUN: llvm-objdump --syms --full-contents --rebase %t/arm64 | FileCheck %s
 
 # CHECK-LABEL: SYMBOL TABLE:
 # CHECK:       {{0*}}[[#%x, SUB1ADDR:]] l {{.*}} __DATA,__data _sub1
 # CHECK:       {{0*}}[[#%x, SUB2ADDR:]] l {{.*}} __DATA,__data _sub2
 # CHECK:       {{0*}}[[#%x, SUB3ADDR:]] l {{.*}} __DATA,__data _sub3
 # CHECK:       {{0*}}[[#%x, SUB4ADDR:]] l {{.*}} __DATA,__data _sub4
 # CHECK-LABEL: Contents of section __DATA,__data:
 # CHECK:       [[#SUB1ADDR]] 10000000
-# CHECK-NEXT:  [[#SUB2ADDR]] f0ffffff
-# CHECK-NEXT:  [[#SUB3ADDR]] 10000000 00000000
-# CHECK-NEXT:  [[#SUB4ADDR]] f0ffffff ffffffff
+# CHECK-NEXT:  [[#SUB2ADDR]] f2ffffff
+# CHECK-NEXT:  [[#SUB3ADDR]] 14000000 00000000
+# CHECK-NEXT:  [[#SUB4ADDR]] f6ffffff ffffffff
 # CHECK:       Rebase table:
 # CHECK-NEXT:  segment  section            address     type
 # CHECK-EMPTY:
 
 .globl _main, _subtrahend_1, _subtrahend_2, _minued1, _minued2
 
 .data
 _subtrahend_1:
   .space 16
 _minuend_1:
   .space 16
 _minuend_2:
   .space 16
 _subtrahend_2:
   .space 16
 _sub1:
   .long _minuend_1 - _subtrahend_1
   .space 12
 _sub2:
-  .long _minuend_2 - _subtrahend_2
+  .long _minuend_2 - _subtrahend_2 + 2
   .space 12
 _sub3:
-  .quad _minuend_1 - _subtrahend_1
+  .quad _minuend_1 - _subtrahend_1 + 4
   .space 8
 _sub4:
-  .quad _minuend_2 - _subtrahend_2
+  .quad _minuend_2 - _subtrahend_2 + 6
 
 .text
 .p2align 2
 _main:
   ret