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[TSan][MIPS] XFAIL long jump tests for MIPS64
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Authored by slthakur on May 6 2015, 5:40 AM.

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slthakur updated this revision to Diff 25041.May 6 2015, 5:40 AM
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dvyukov accepted this revision.May 6 2015, 6:31 AM
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LGTM

This revision is now accepted and ready to land.May 6 2015, 6:31 AM
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Hi @dvyukov, @samsonov,

Now there are two more TSan regression test failing on mips:

  1. stack_sync_reuse.cc: Stack layout of foobar is not same as barfoo due to differences in generated code. The barfoo is using one extra saved register and thus its layout is different than foobar. Due to this, variable ‘s’ gets a different stack offset and test fails.
  1. race_on_mutex.cc: The stack trace for Thread T1 is not as expected. The stack trace we are getting is :
Previous write of size 8 at 0x0120eb8cc0 by thread T1:
    #0 memset /home/kms/sagar/bin/MyLLVM/llvm/projects/compiler-rt/lib/tsan/rtl/tsan_interceptors.cc:586 (race_on_mutex.c.tmp+0x0120067764)
    #1 __GI___pthread_mutex_init /build/glibc-6OdOrK/glibc-2.19/nptl/pthread_mutex_init.c:84 (libpthread.so.0+0x000000d5e4)
    #2 Thread1 /home/kms/sagar/compiler-rt/test/tsan/race_on_mutex.c:8:3 (race_on_mutex.c.tmp+0x01200d4ec4)

This happens because memset that is called from pthread_init_mutex is being intercepted by TSan.

Can we have separate expected stack trace for mips and x86 for race_on_mutex.cc ? Or can we mark these tests as XFAIL for mips ?

Sure, you can disable these tests on mips. Just explain in comment why they are disabled.