[EarlyCSE] Use m_LogicalAnd/Or matchers to handle branch conditions

[aqjune]

Summary

EarlyCSE's handleBranchCondition says:

// If the condition is AND operation, we can propagate its operands into the
// true branch. If it is OR operation, we can propagate them into the false
// branch.

This holds for the corresponding select patterns as well.

This is a part of an ongoing work for disabling buggy select->and/or transformations.
See llvm.org/pr48353 and D93065 for more context

Proof:
and: https://alive2.llvm.org/ce/z/MQWodU
or: https://alive2.llvm.org/ce/z/9GLbB_

[aqjune]

Proof:
and: https://alive2.llvm.org/ce/z/MQWodU
or: https://alive2.llvm.org/ce/z/9GLbB_

[nikic]

llvm/lib/Transforms/Scalar/EarlyCSE.cpp

1075

As clang-format points out, these braces were probably intended to go around the whole block? With that fixed, you should be able to drop the nullptr initialization and use dyn_cast instead of dyn_cast_or_null below.

[aqjune]

Fix

[aqjune]

llvm/lib/Transforms/Scalar/EarlyCSE.cpp

1075

That was a silly mistake, fixed

[nikic]

LGTM

[aqjune]

I'll make another patch for isImpliedCondition , etc at ValueTracking

llvm/lib/Transforms/Scalar/EarlyCSE.cpp

 //===- EarlyCSE.cpp - Simple and fast CSE pass ----------------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
bool EarlyCSE::handleBranchCondition(Instruction *CondInst,
                                      const BranchInst *BI, const BasicBlock *BB,
                                      const BasicBlock *Pred) {
   assert(BI->isConditional() && "Should be a conditional branch!");
   assert(BI->getCondition() == CondInst && "Wrong condition?");
   assert(BI->getSuccessor(0) == BB || BI->getSuccessor(1) == BB);
   auto *TorF = (BI->getSuccessor(0) == BB)
                    ? ConstantInt::getTrue(BB->getContext())
                    : ConstantInt::getFalse(BB->getContext());
-  auto MatchBinOp = [](Instruction *I, unsigned Opcode) {
-    if (BinaryOperator *BOp = dyn_cast<BinaryOperator>(I))
-      return BOp->getOpcode() == Opcode;
+  auto MatchBinOp = [](Instruction *I, unsigned Opcode, Value *&LHS,
+                       Value *&RHS) {
+    if (Opcode == Instruction::And &&
+        match(I, m_LogicalAnd(m_Value(LHS), m_Value(RHS))))
+      return true;
+    else if (Opcode == Instruction::Or &&
+             match(I, m_LogicalOr(m_Value(LHS), m_Value(RHS))))
+      return true;
     return false;
   };
   // If the condition is AND operation, we can propagate its operands into the
   // true branch. If it is OR operation, we can propagate them into the false
   // branch.
   unsigned PropagateOpcode =
       (BI->getSuccessor(0) == BB) ? Instruction::And : Instruction::Or;
 
if (!DebugCounter::shouldExecute(CSECounter)) {
       // Replace all dominated uses with the known value.
       if (unsigned Count = replaceDominatedUsesWith(Curr, TorF, DT,
                                                     BasicBlockEdge(Pred, BB))) {
         NumCSECVP += Count;
         MadeChanges = true;
       }
     }
 
-    if (MatchBinOp(Curr, PropagateOpcode))
-      for (auto &Op : cast<BinaryOperator>(Curr)->operands())
-        if (Instruction *OPI = dyn_cast<Instruction>(Op))
+    Value *LHS = nullptr, *RHS = nullptr;
+    if (MatchBinOp(Curr, PropagateOpcode, LHS, RHS)) {}
+      for (auto &Op : { LHS, RHS })
+        if (Instruction *OPI = dyn_cast_or_null<Instruction>(Op))
           if (SimpleValue::canHandle(OPI) && Visited.insert(OPI).second)
             WorkList.push_back(OPI);
   }
 
   return MadeChanges;
 }
 
 Value *EarlyCSE::getMatchingValue(LoadValue &InVal, ParseMemoryInst &MemInst,

llvm/test/Transforms/EarlyCSE/and_or.ll

 
 define i32 @test_02_select(i32 %a, i32 %b, i1 %c) {
 ; CHECK-LABEL: @test_02_select(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[COND:%.*]] = icmp slt i32 [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    [[AND_COND:%.*]] = select i1 [[COND]], i1 [[C:%.*]], i1 false
 ; CHECK-NEXT:    br i1 [[AND_COND]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
 ; CHECK:       if.true:
-; CHECK-NEXT:    [[X:%.*]] = select i1 [[COND]], i32 [[A]], i32 [[B]]
-; CHECK-NEXT:    ret i32 [[X]]
+; CHECK-NEXT:    ret i32 [[A]]
 ; CHECK:       if.false:
 ; CHECK-NEXT:    [[Y:%.*]] = select i1 [[COND]], i32 [[A]], i32 [[B]]
 ; CHECK-NEXT:    ret i32 [[Y]]
 ;
 entry:
   %cond = icmp slt i32 %a, %b
   %and.cond = select i1 %cond, i1 %c, i1 false
   br i1 %and.cond, label %if.true, label %if.false

 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[COND:%.*]] = icmp slt i32 [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    [[OR_COND:%.*]] = select i1 [[COND]], i1 true, i1 [[C:%.*]]
 ; CHECK-NEXT:    br i1 [[OR_COND]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
 ; CHECK:       if.true:
 ; CHECK-NEXT:    [[X:%.*]] = select i1 [[COND]], i32 [[A]], i32 [[B]]
 ; CHECK-NEXT:    ret i32 [[X]]
 ; CHECK:       if.false:
-; CHECK-NEXT:    [[Y:%.*]] = select i1 [[COND]], i32 [[A]], i32 [[B]]
-; CHECK-NEXT:    ret i32 [[Y]]
+; CHECK-NEXT:    ret i32 [[B]]
 ;
 entry:
   %cond = icmp slt i32 %a, %b
   %or.cond = select i1 %cond, i1 true, i1 %c
   br i1 %or.cond, label %if.true, label %if.false
 
 if.true:
   %cond2 = icmp slt i32 %a, %b

 define i32 @test_04_select(i32 %a, i32 %b, i1 %c1, i1 %c2) {
 ; CHECK-LABEL: @test_04_select(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[COND:%.*]] = icmp slt i32 [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    [[AND_COND1:%.*]] = select i1 [[COND]], i1 [[C1:%.*]], i1 false
 ; CHECK-NEXT:    [[AND_COND2:%.*]] = select i1 [[AND_COND1]], i1 [[C2:%.*]], i1 false
 ; CHECK-NEXT:    br i1 [[AND_COND2]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
 ; CHECK:       if.true:
-; CHECK-NEXT:    [[X:%.*]] = select i1 [[COND]], i32 [[A]], i32 [[B]]
-; CHECK-NEXT:    ret i32 [[X]]
+; CHECK-NEXT:    ret i32 [[A]]
 ; CHECK:       if.false:
 ; CHECK-NEXT:    [[Y:%.*]] = select i1 [[COND]], i32 [[A]], i32 [[B]]
 ; CHECK-NEXT:    ret i32 [[Y]]
 ;
 entry:
   %cond = icmp slt i32 %a, %b
   %and.cond1 = select i1 %cond, i1 %c1, i1 false
   %and.cond2 = select i1 %and.cond1, i1 %c2, i1 false

 ; CHECK-NEXT:    [[COND:%.*]] = icmp slt i32 [[A:%.*]], [[B:%.*]]
 ; CHECK-NEXT:    [[OR_COND1:%.*]] = select i1 [[COND]], i1 true, i1 [[C1:%.*]]
 ; CHECK-NEXT:    [[OR_COND2:%.*]] = select i1 [[OR_COND1]], i1 true, i1 [[C2:%.*]]
 ; CHECK-NEXT:    br i1 [[OR_COND2]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]]
 ; CHECK:       if.true:
 ; CHECK-NEXT:    [[X:%.*]] = select i1 [[COND]], i32 [[A]], i32 [[B]]
 ; CHECK-NEXT:    ret i32 [[X]]
 ; CHECK:       if.false:
-; CHECK-NEXT:    [[Y:%.*]] = select i1 [[COND]], i32 [[A]], i32 [[B]]
-; CHECK-NEXT:    ret i32 [[Y]]
+; CHECK-NEXT:    ret i32 [[B]]
 ;
 entry:
   %cond = icmp slt i32 %a, %b
   %or.cond1 = select i1 %cond, i1 true, i1 %c1
   %or.cond2 = select i1 %or.cond1, i1 true, i1 %c2
   br i1 %or.cond2, label %if.true, label %if.false
 
 if.true: