[WebAssembly][SIMD] Rename shuffle, swizzle, and load_splats

[tlively]

Summary

These instructions previously used prefixes like v8x16 to signify that they were
agnostic between float and int interpretations. We renamed these instructions to
remove this form of prefix in https://github.com/WebAssembly/simd/issues/297 and
https://github.com/WebAssembly/simd/issues/316 and this commit brings the names
in LLVM up to date.

llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h

#define WASM_LOAD_STORE(NAME) \
   WASM_LOAD_STORE(ATOMIC_RMW8_U_OR_I32)
   WASM_LOAD_STORE(ATOMIC_RMW8_U_OR_I64)
   WASM_LOAD_STORE(ATOMIC_RMW8_U_XOR_I32)
   WASM_LOAD_STORE(ATOMIC_RMW8_U_XOR_I64)
   WASM_LOAD_STORE(ATOMIC_RMW8_U_XCHG_I32)
   WASM_LOAD_STORE(ATOMIC_RMW8_U_XCHG_I64)
   WASM_LOAD_STORE(ATOMIC_RMW8_U_CMPXCHG_I32)
   WASM_LOAD_STORE(ATOMIC_RMW8_U_CMPXCHG_I64)
-  WASM_LOAD_STORE(LOAD_SPLAT_v8x16)
+  WASM_LOAD_STORE(LOAD8_SPLAT)
   WASM_LOAD_STORE(LOAD_LANE_v16i8)
   WASM_LOAD_STORE(STORE_LANE_v16i8)
   return 0;
   WASM_LOAD_STORE(LOAD16_S_I32)
   WASM_LOAD_STORE(LOAD16_U_I32)
   WASM_LOAD_STORE(LOAD16_S_I64)
   WASM_LOAD_STORE(LOAD16_U_I64)
   WASM_LOAD_STORE(ATOMIC_LOAD16_U_I32)
#define WASM_LOAD_STORE(NAME) \
   WASM_LOAD_STORE(ATOMIC_RMW16_U_OR_I32)
   WASM_LOAD_STORE(ATOMIC_RMW16_U_OR_I64)
   WASM_LOAD_STORE(ATOMIC_RMW16_U_XOR_I32)
   WASM_LOAD_STORE(ATOMIC_RMW16_U_XOR_I64)
   WASM_LOAD_STORE(ATOMIC_RMW16_U_XCHG_I32)
   WASM_LOAD_STORE(ATOMIC_RMW16_U_XCHG_I64)
   WASM_LOAD_STORE(ATOMIC_RMW16_U_CMPXCHG_I32)
   WASM_LOAD_STORE(ATOMIC_RMW16_U_CMPXCHG_I64)
-  WASM_LOAD_STORE(LOAD_SPLAT_v16x8)
+  WASM_LOAD_STORE(LOAD16_SPLAT)
   WASM_LOAD_STORE(LOAD_LANE_v8i16)
   WASM_LOAD_STORE(STORE_LANE_v8i16)
   return 1;
   WASM_LOAD_STORE(LOAD_I32)
   WASM_LOAD_STORE(LOAD_F32)
   WASM_LOAD_STORE(STORE_I32)
   WASM_LOAD_STORE(STORE_F32)
   WASM_LOAD_STORE(LOAD32_S_I64)
#define WASM_LOAD_STORE(NAME) \
   WASM_LOAD_STORE(ATOMIC_RMW_XOR_I32)
   WASM_LOAD_STORE(ATOMIC_RMW32_U_XOR_I64)
   WASM_LOAD_STORE(ATOMIC_RMW_XCHG_I32)
   WASM_LOAD_STORE(ATOMIC_RMW32_U_XCHG_I64)
   WASM_LOAD_STORE(ATOMIC_RMW_CMPXCHG_I32)
   WASM_LOAD_STORE(ATOMIC_RMW32_U_CMPXCHG_I64)
   WASM_LOAD_STORE(MEMORY_ATOMIC_NOTIFY)
   WASM_LOAD_STORE(MEMORY_ATOMIC_WAIT32)
-  WASM_LOAD_STORE(LOAD_SPLAT_v32x4)
+  WASM_LOAD_STORE(LOAD32_SPLAT)
   WASM_LOAD_STORE(LOAD_ZERO_v4i32)
   WASM_LOAD_STORE(LOAD_LANE_v4i32)
   WASM_LOAD_STORE(STORE_LANE_v4i32)
   return 2;
   WASM_LOAD_STORE(LOAD_I64)
   WASM_LOAD_STORE(LOAD_F64)
   WASM_LOAD_STORE(STORE_I64)
   WASM_LOAD_STORE(STORE_F64)
   WASM_LOAD_STORE(ATOMIC_LOAD_I64)
   WASM_LOAD_STORE(ATOMIC_STORE_I64)
   WASM_LOAD_STORE(ATOMIC_RMW_ADD_I64)
   WASM_LOAD_STORE(ATOMIC_RMW_SUB_I64)
   WASM_LOAD_STORE(ATOMIC_RMW_AND_I64)
   WASM_LOAD_STORE(ATOMIC_RMW_OR_I64)
   WASM_LOAD_STORE(ATOMIC_RMW_XOR_I64)
   WASM_LOAD_STORE(ATOMIC_RMW_XCHG_I64)
   WASM_LOAD_STORE(ATOMIC_RMW_CMPXCHG_I64)
   WASM_LOAD_STORE(MEMORY_ATOMIC_WAIT64)
-  WASM_LOAD_STORE(LOAD_SPLAT_v64x2)
+  WASM_LOAD_STORE(LOAD64_SPLAT)
   WASM_LOAD_STORE(LOAD_EXTEND_S_v8i16)
   WASM_LOAD_STORE(LOAD_EXTEND_U_v8i16)
   WASM_LOAD_STORE(LOAD_EXTEND_S_v4i32)
   WASM_LOAD_STORE(LOAD_EXTEND_U_v4i32)
   WASM_LOAD_STORE(LOAD_EXTEND_S_v2i64)
   WASM_LOAD_STORE(LOAD_EXTEND_U_v2i64)
   WASM_LOAD_STORE(LOAD_ZERO_v2i64)
   WASM_LOAD_STORE(LOAD_LANE_v2i64)

llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td

 foreach vec_t = [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64] in {
 defm : LoadPatNoOffset<vec_t, load, "LOAD_V128">;
 defm : LoadPatImmOff<vec_t, load, regPlusImm, "LOAD_V128">;
 defm : LoadPatImmOff<vec_t, load, or_is_add, "LOAD_V128">;
 defm : LoadPatOffsetOnly<vec_t, load, "LOAD_V128">;
 defm : LoadPatGlobalAddrOffOnly<vec_t, load, "LOAD_V128">;
 }
 
-// vNxM.load_splat
-multiclass SIMDLoadSplat<string vec, bits<32> simdop> {
+// v128.loadX_splat
+multiclass SIMDLoadSplat<int size, bits<32> simdop> {
   let mayLoad = 1, UseNamedOperandTable = 1 in {
-  defm LOAD_SPLAT_#vec#_A32 :
+  defm LOAD#size#_SPLAT_A32 :
     SIMD_I<(outs V128:$dst),
            (ins P2Align:$p2align, offset32_op:$off, I32:$addr),
            (outs),
            (ins P2Align:$p2align, offset32_op:$off), [],
-           vec#".load_splat\t$dst, ${off}(${addr})$p2align",
-           vec#".load_splat\t$off$p2align", simdop>;
-  defm LOAD_SPLAT_#vec#_A64 :
+           "v128.load"#size#"_splat\t$dst, ${off}(${addr})$p2align",
+           "v128.load"#size#"_splat\t$off$p2align", simdop>;
+  defm LOAD#size#_SPLAT_A64 :
     SIMD_I<(outs V128:$dst),
            (ins P2Align:$p2align, offset64_op:$off, I64:$addr),
            (outs),
            (ins P2Align:$p2align, offset64_op:$off), [],
-           vec#".load_splat\t$dst, ${off}(${addr})$p2align",
-           vec#".load_splat\t$off$p2align", simdop>;
+           "v128.load"#size#"_splat\t$dst, ${off}(${addr})$p2align",
+           "v128.load"#size#"_splat\t$off$p2align", simdop>;
   }
 }
 
-defm "" : SIMDLoadSplat<"v8x16", 7>;
-defm "" : SIMDLoadSplat<"v16x8", 8>;
-defm "" : SIMDLoadSplat<"v32x4", 9>;
-defm "" : SIMDLoadSplat<"v64x2", 10>;
+defm "" : SIMDLoadSplat<8, 7>;
+defm "" : SIMDLoadSplat<16, 8>;
+defm "" : SIMDLoadSplat<32, 9>;
+defm "" : SIMDLoadSplat<64, 10>;
 
 def wasm_load_splat_t : SDTypeProfile<1, 1, [SDTCisPtrTy<1>]>;
 def wasm_load_splat : SDNode<"WebAssemblyISD::LOAD_SPLAT", wasm_load_splat_t,
                              [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
 def load_splat : PatFrag<(ops node:$addr), (wasm_load_splat node:$addr)>;
 
-foreach args = [["v16i8", "v8x16"], ["v8i16", "v16x8"], ["v4i32", "v32x4"],
-                ["v2i64", "v64x2"], ["v4f32", "v32x4"], ["v2f64", "v64x2"]] in {
+foreach args = [["v16i8", "8"], ["v8i16", "16"], ["v4i32", "32"],
+                ["v2i64", "64"], ["v4f32", "32"], ["v2f64", "64"]] in {
 defm : LoadPatNoOffset<!cast<ValueType>(args[0]),
                        load_splat,
-                       "LOAD_SPLAT_"#args[1]>;
+                       "LOAD"#args[1]#"_SPLAT">;
 defm : LoadPatImmOff<!cast<ValueType>(args[0]),
                      load_splat,
                      regPlusImm,
-                     "LOAD_SPLAT_"#args[1]>;
+                     "LOAD"#args[1]#"_SPLAT">;
 defm : LoadPatImmOff<!cast<ValueType>(args[0]),
                      load_splat,
                      or_is_add,
-                     "LOAD_SPLAT_"#args[1]>;
+                     "LOAD"#args[1]#"_SPLAT">;
 defm : LoadPatOffsetOnly<!cast<ValueType>(args[0]),
                          load_splat,
-                         "LOAD_SPLAT_"#args[1]>;
+                         "LOAD"#args[1]#"_SPLAT">;
 defm : LoadPatGlobalAddrOffOnly<!cast<ValueType>(args[0]),
                                 load_splat,
-                                "LOAD_SPLAT_"#args[1]>;
+                                "LOAD"#args[1]#"_SPLAT">;
 }
 
 // Load and extend
 multiclass SIMDLoadExtend<ValueType vec_t, string name, bits<32> simdop> {
   let mayLoad = 1, UseNamedOperandTable = 1 in {
   defm LOAD_EXTEND_S_#vec_t#_A32 :
     SIMD_I<(outs V128:$dst),
            (ins P2Align:$p2align, offset32_op:$off, I32:$addr),
SIMD_I<(outs V128:$dst),
            vec_i8imm_op:$m2, vec_i8imm_op:$m3,
            vec_i8imm_op:$m4, vec_i8imm_op:$m5,
            vec_i8imm_op:$m6, vec_i8imm_op:$m7,
            vec_i8imm_op:$m8, vec_i8imm_op:$m9,
            vec_i8imm_op:$mA, vec_i8imm_op:$mB,
            vec_i8imm_op:$mC, vec_i8imm_op:$mD,
            vec_i8imm_op:$mE, vec_i8imm_op:$mF),
          [],
-         "v8x16.shuffle\t$dst, $x, $y, "#
+         "i8x16.shuffle\t$dst, $x, $y, "#
            "$m0, $m1, $m2, $m3, $m4, $m5, $m6, $m7, "#
            "$m8, $m9, $mA, $mB, $mC, $mD, $mE, $mF",
-         "v8x16.shuffle\t"#
+         "i8x16.shuffle\t"#
            "$m0, $m1, $m2, $m3, $m4, $m5, $m6, $m7, "#
            "$m8, $m9, $mA, $mB, $mC, $mD, $mE, $mF",
          13>;
 
 // Shuffles after custom lowering
 def wasm_shuffle_t : SDTypeProfile<1, 18, []>;
 def wasm_shuffle : SDNode<"WebAssemblyISD::SHUFFLE", wasm_shuffle_t>;
 foreach vec_t = [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64] in {
def : Pat<(vec_t (wasm_shuffle (vec_t V128:$x), (vec_t V128:$y),
             (i32 LaneIdx32:$m4), (i32 LaneIdx32:$m5),
             (i32 LaneIdx32:$m6), (i32 LaneIdx32:$m7),
             (i32 LaneIdx32:$m8), (i32 LaneIdx32:$m9),
             (i32 LaneIdx32:$mA), (i32 LaneIdx32:$mB),
             (i32 LaneIdx32:$mC), (i32 LaneIdx32:$mD),
             (i32 LaneIdx32:$mE), (i32 LaneIdx32:$mF)))>;
 }
 
-// Swizzle lanes: v8x16.swizzle
+// Swizzle lanes: i8x16.swizzle
 def wasm_swizzle_t : SDTypeProfile<1, 2, []>;
 def wasm_swizzle : SDNode<"WebAssemblyISD::SWIZZLE", wasm_swizzle_t>;
 defm SWIZZLE :
   SIMD_I<(outs V128:$dst), (ins V128:$src, V128:$mask), (outs), (ins),
          [(set (v16i8 V128:$dst),
            (wasm_swizzle (v16i8 V128:$src), (v16i8 V128:$mask)))],
-         "v8x16.swizzle\t$dst, $src, $mask", "v8x16.swizzle", 14>;
+         "i8x16.swizzle\t$dst, $src, $mask", "i8x16.swizzle", 14>;
 
 def : Pat<(int_wasm_swizzle (v16i8 V128:$src), (v16i8 V128:$mask)),
           (SWIZZLE V128:$src, V128:$mask)>;
 
 // Create vector with identical lanes: splat
 def splat2 : PatFrag<(ops node:$x), (build_vector node:$x, node:$x)>;
 def splat4 : PatFrag<(ops node:$x), (build_vector
                        node:$x, node:$x, node:$x, node:$x)>;

llvm/test/CodeGen/WebAssembly/simd-build-vector.ll

define <8 x i16> @splat_common_arg_i16x8(i16 %a, i16 %b, i16 %c) {
   %v5 = insertelement <8 x i16> %v4, i16 %c, i32 5
   %v6 = insertelement <8 x i16> %v5, i16 %c, i32 6
   %v7 = insertelement <8 x i16> %v6, i16 %b, i32 7
   ret <8 x i16> %v7
 }
 
 ; CHECK-LABEL: swizzle_one_i8x16:
 ; CHECK-NEXT:  .functype       swizzle_one_i8x16 (v128, v128) -> (v128)
-; CHECK-NEXT:  v8x16.swizzle   $push[[L0:[0-9]+]]=, $0, $1
+; CHECK-NEXT:  i8x16.swizzle   $push[[L0:[0-9]+]]=, $0, $1
 ; CHECK-NEXT:  return          $pop[[L0]]
 define <16 x i8> @swizzle_one_i8x16(<16 x i8> %src, <16 x i8> %mask) {
   %m0 = extractelement <16 x i8> %mask, i32 0
   %s0 = extractelement <16 x i8> %src, i8 %m0
   %v0 = insertelement <16 x i8> undef, i8 %s0, i32 0
   ret <16 x i8> %v0
 }
 
 ; CHECK-LABEL: swizzle_all_i8x16:
 ; CHECK-NEXT:  .functype       swizzle_all_i8x16 (v128, v128) -> (v128)
-; CHECK-NEXT:  v8x16.swizzle   $push[[L0:[0-9]+]]=, $0, $1
+; CHECK-NEXT:  i8x16.swizzle   $push[[L0:[0-9]+]]=, $0, $1
 ; CHECK-NEXT:  return          $pop[[L0]]
 define <16 x i8> @swizzle_all_i8x16(<16 x i8> %src, <16 x i8> %mask) {
   %m0 = extractelement <16 x i8> %mask, i32 0
   %s0 = extractelement <16 x i8> %src, i8 %m0
   %v0 = insertelement <16 x i8> undef, i8 %s0, i32 0
   %m1 = extractelement <16 x i8> %mask, i32 1
   %s1 = extractelement <16 x i8> %src, i8 %m1
   %v1 = insertelement <16 x i8> %v0, i8 %s1, i32 1
define <8 x i16> @swizzle_one_i16x8(<8 x i16> %src, <8 x i16> %mask) {
   %m0 = extractelement <8 x i16> %mask, i32 0
   %s0 = extractelement <8 x i16> %src, i16 %m0
   %v0 = insertelement <8 x i16> undef, i16 %s0, i32 0
   ret <8 x i16> %v0
 }
 
 ; CHECK-LABEL: mashup_swizzle_i8x16:
 ; CHECK-NEXT:  .functype       mashup_swizzle_i8x16 (v128, v128, i32) -> (v128)
-; CHECK-NEXT:  v8x16.swizzle   $push[[L0:[0-9]+]]=, $0, $1
+; CHECK-NEXT:  i8x16.swizzle   $push[[L0:[0-9]+]]=, $0, $1
 ; CHECK:       i8x16.replace_lane
 ; CHECK:       i8x16.replace_lane
 ; CHECK:       i8x16.replace_lane
 ; CHECK:       i8x16.replace_lane
 ; CHECK:       return
 define <16 x i8> @mashup_swizzle_i8x16(<16 x i8> %src, <16 x i8> %mask, i8 %splatted) {
   ; swizzle 0
   %m0 = extractelement <16 x i8> %mask, i32 0

llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+unimplemented-simd128 | FileCheck %s --check-prefixes CHECK,SIMD128
 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+unimplemented-simd128 -fast-isel | FileCheck %s --check-prefixes CHECK,SIMD128
 
 ; Test that SIMD128 intrinsics lower as expected. These intrinsics are
 ; only expected to lower successfully if the simd128 attribute is
 ; enabled and legal types are used.
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; ==============================================================================
 ; 16 x i8
 ; ==============================================================================
 ; CHECK-LABEL: swizzle_v16i8:
 ; SIMD128-NEXT: .functype swizzle_v16i8 (v128, v128) -> (v128){{$}}
-; SIMD128-NEXT: v8x16.swizzle $push[[R:[0-9]+]]=, $0, $1{{$}}
+; SIMD128-NEXT: i8x16.swizzle $push[[R:[0-9]+]]=, $0, $1{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 declare <16 x i8> @llvm.wasm.swizzle(<16 x i8>, <16 x i8>)
 define <16 x i8> @swizzle_v16i8(<16 x i8> %x, <16 x i8> %y) {
   %a = call <16 x i8> @llvm.wasm.swizzle(<16 x i8> %x, <16 x i8> %y)
   ret <16 x i8> %a
 }
 
 ; CHECK-LABEL: add_sat_s_v16i8:

 define <16 x i8> @narrow_unsigned_v16i8(<8 x i16> %low, <8 x i16> %high) {
   %a = call <16 x i8> @llvm.wasm.narrow.unsigned.v16i8.v8i16(
     <8 x i16> %low, <8 x i16> %high
   )
   ret <16 x i8> %a
 }
 
 ; CHECK-LABEL: shuffle_v16i8:
-; NO-SIMD128-NOT: v8x16
+; NO-SIMD128-NOT: i8x16
 ; SIMD128-NEXT: .functype shuffle_v16i8 (v128, v128) -> (v128){{$}}
-; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
+; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
 ; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 0{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 declare <16 x i8> @llvm.wasm.shuffle(
   <16 x i8>, <16 x i8>, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32,
   i32, i32, i32, i32, i32)
 define <16 x i8> @shuffle_v16i8(<16 x i8> %x, <16 x i8> %y) {
   %res = call <16 x i8> @llvm.wasm.shuffle(<16 x i8> %x, <16 x i8> %y,
       i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7,
       i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 35)
   ret <16 x i8> %res
 }
 
 ; CHECK-LABEL: shuffle_undef_v16i8:
-; NO-SIMD128-NOT: v8x16
+; NO-SIMD128-NOT: i8x16
 ; SIMD128-NEXT: .functype shuffle_undef_v16i8 (v128, v128) -> (v128){{$}}
-; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
+; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
 ; SIMD128-SAME: 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 define <16 x i8> @shuffle_undef_v16i8(<16 x i8> %x, <16 x i8> %y) {
   %res = call <16 x i8> @llvm.wasm.shuffle(<16 x i8> %x, <16 x i8> %y,
       i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef,
       i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef,
       i32 undef, i32 undef, i32 undef, i32 2)
   ret <16 x i8> %res

llvm/test/CodeGen/WebAssembly/simd-load-splat.ll

 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-keep-registers -wasm-disable-explicit-locals -mattr=+unimplemented-simd128 | FileCheck %s
 
 ; Regression test for an ISel failure when a splatted load had more
 ; than one use. The main tests for load_splat are in simd-offset.ll.
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: load_splat:
 ; CHECK-NEXT: .functype load_splat (i32, i32) -> (i32)
 ; CHECK-NEXT: i32.load8_u $[[E:[0-9]+]]=, 0($0){{$}}
-; CHECK-NEXT: v8x16.load_splat $push[[V:[0-9]+]]=, 0($0){{$}}
+; CHECK-NEXT: v128.load8_splat $push[[V:[0-9]+]]=, 0($0){{$}}
 ; CHECK-NEXT: v128.store 0($1), $pop[[V]]{{$}}
 ; CHECK-NEXT: return $[[E]]{{$}}
 define i8 @load_splat(i8* %p, <16 x i8>* %out) {
   %e = load i8, i8* %p
   %v1 = insertelement <16 x i8> undef, i8 %e, i32 0
   %v2 = shufflevector <16 x i8> %v1, <16 x i8> undef, <16 x i32> zeroinitializer
   store <16 x i8> %v2, <16 x i8>* %out
   ret i8 %e
 }

llvm/test/CodeGen/WebAssembly/simd-load-store-alignment.ll

 ; CHECK-NEXT: .functype store_v16i8_a32 (i32, v128) -> (){{$}}
 ; CHECK-NEXT: v128.store 0($0), $1{{$}}
 ; CHECK-NEXT: return{{$}}
 define void @store_v16i8_a32(<16 x i8> *%p, <16 x i8> %v) {
   store <16 x i8> %v, <16 x i8>* %p, align 32
   ret void
 }
 
-; 1 is the default alignment for v8x16.load_splat so no attribute is needed.
+; 1 is the default alignment for v128.load8_splat so no attribute is needed.
 
 ; CHECK-LABEL: load_splat_v16i8_a1:
 ; CHECK-NEXT: .functype load_splat_v16i8_a1 (i32) -> (v128){{$}}
-; CHECK-NEXT: v8x16.load_splat $push[[R:[0-9]+]]=, 0($0){{$}}
+; CHECK-NEXT: v128.load8_splat $push[[R:[0-9]+]]=, 0($0){{$}}
 ; CHECK-NEXT: return $pop[[R]]{{$}}
 define <16 x i8> @load_splat_v16i8_a1(i8* %p) {
   %e = load i8, i8* %p, align 1
   %v1 = insertelement <16 x i8> undef, i8 %e, i32 0
   %v2 = shufflevector <16 x i8> %v1, <16 x i8> undef, <16 x i32> zeroinitializer
   ret <16 x i8> %v2
 }
 
 ; 2 is greater than the default alignment so it is ignored.
 
 ; CHECK-LABEL: load_splat_v16i8_a2:
 ; CHECK-NEXT: .functype load_splat_v16i8_a2 (i32) -> (v128){{$}}
-; CHECK-NEXT: v8x16.load_splat $push[[R:[0-9]+]]=, 0($0){{$}}
+; CHECK-NEXT: v128.load8_splat $push[[R:[0-9]+]]=, 0($0){{$}}
 ; CHECK-NEXT: return $pop[[R]]{{$}}
 define <16 x i8> @load_splat_v16i8_a2(i8* %p) {
   %e = load i8, i8* %p, align 2
   %v1 = insertelement <16 x i8> undef, i8 %e, i32 0
   %v2 = shufflevector <16 x i8> %v1, <16 x i8> undef, <16 x i32> zeroinitializer
   ret <16 x i8> %v2
 }
 

 define <8 x i16> @load_sext_v8i16_a16(<8 x i8>* %p) {
   %v = load <8 x i8>, <8 x i8>* %p, align 16
   %v2 = sext <8 x i8> %v to <8 x i16>
   ret <8 x i16> %v2
 }
 
 ; CHECK-LABEL: load_splat_v8i16_a1:
 ; CHECK-NEXT: .functype load_splat_v8i16_a1 (i32) -> (v128){{$}}
-; CHECK-NEXT: v16x8.load_splat $push[[R:[0-9]+]]=, 0($0):p2align=0{{$}}
+; CHECK-NEXT: v128.load16_splat $push[[R:[0-9]+]]=, 0($0):p2align=0{{$}}
 ; CHECK-NEXT: return $pop[[R]]{{$}}
 define <8 x i16> @load_splat_v8i16_a1(i16* %p) {
   %e = load i16, i16* %p, align 1
   %v1 = insertelement <8 x i16> undef, i16 %e, i32 0
   %v2 = shufflevector <8 x i16> %v1, <8 x i16> undef, <8 x i32> zeroinitializer
   ret <8 x i16> %v2
 }
 
-; 2 is the default alignment for v16x8.load_splat so no attribute is needed.
+; 2 is the default alignment for v128.load16_splat so no attribute is needed.
 
 ; CHECK-LABEL: load_splat_v8i16_a2:
 ; CHECK-NEXT: .functype load_splat_v8i16_a2 (i32) -> (v128){{$}}
-; CHECK-NEXT: v16x8.load_splat $push[[R:[0-9]+]]=, 0($0){{$}}
+; CHECK-NEXT: v128.load16_splat $push[[R:[0-9]+]]=, 0($0){{$}}
 ; CHECK-NEXT: return $pop[[R]]{{$}}
 define <8 x i16> @load_splat_v8i16_a2(i16* %p) {
   %e = load i16, i16* %p, align 2
   %v1 = insertelement <8 x i16> undef, i16 %e, i32 0
   %v2 = shufflevector <8 x i16> %v1, <8 x i16> undef, <8 x i32> zeroinitializer
   ret <8 x i16> %v2
 }
 
 ; 4 is greater than the default alignment so it is ignored.
 
 ; CHECK-LABEL: load_splat_v8i16_a4:
 ; CHECK-NEXT: .functype load_splat_v8i16_a4 (i32) -> (v128){{$}}
-; CHECK-NEXT: v16x8.load_splat $push[[R:[0-9]+]]=, 0($0){{$}}
+; CHECK-NEXT: v128.load16_splat $push[[R:[0-9]+]]=, 0($0){{$}}
 ; CHECK-NEXT: return $pop[[R]]{{$}}
 define <8 x i16> @load_splat_v8i16_a4(i16* %p) {
   %e = load i16, i16* %p, align 4
   %v1 = insertelement <8 x i16> undef, i16 %e, i32 0
   %v2 = shufflevector <8 x i16> %v1, <8 x i16> undef, <8 x i32> zeroinitializer
   ret <8 x i16> %v2
 }
 

 define <4 x i32> @load_sext_v4i32_a16(<4 x i16>* %p) {
   %v = load <4 x i16>, <4 x i16>* %p, align 16
   %v2 = sext <4 x i16> %v to <4 x i32>
   ret <4 x i32> %v2
 }
 
 ; CHECK-LABEL: load_splat_v4i32_a1:
 ; CHECK-NEXT: .functype load_splat_v4i32_a1 (i32) -> (v128){{$}}
-; CHECK-NEXT: v32x4.load_splat $push[[R:[0-9]+]]=, 0($0):p2align=0{{$}}
+; CHECK-NEXT: v128.load32_splat $push[[R:[0-9]+]]=, 0($0):p2align=0{{$}}
 ; CHECK-NEXT: return $pop[[R]]{{$}}
 define <4 x i32> @load_splat_v4i32_a1(i32* %addr) {
   %e = load i32, i32* %addr, align 1
   %v1 = insertelement <4 x i32> undef, i32 %e, i32 0
   %v2 = shufflevector <4 x i32> %v1, <4 x i32> undef, <4 x i32> zeroinitializer
   ret <4 x i32> %v2
 }
 
 ; CHECK-LABEL: load_splat_v4i32_a2:
 ; CHECK-NEXT: .functype load_splat_v4i32_a2 (i32) -> (v128){{$}}
-; CHECK-NEXT: v32x4.load_splat $push[[R:[0-9]+]]=, 0($0):p2align=1{{$}}
+; CHECK-NEXT: v128.load32_splat $push[[R:[0-9]+]]=, 0($0):p2align=1{{$}}
 ; CHECK-NEXT: return $pop[[R]]{{$}}
 define <4 x i32> @load_splat_v4i32_a2(i32* %addr) {
   %e = load i32, i32* %addr, align 2
   %v1 = insertelement <4 x i32> undef, i32 %e, i32 0
   %v2 = shufflevector <4 x i32> %v1, <4 x i32> undef, <4 x i32> zeroinitializer
   ret <4 x i32> %v2
 }
 
-; 4 is the default alignment for v32x4.load_splat so no attribute is needed.
+; 4 is the default alignment for v128.load32_splat so no attribute is needed.
 
 ; CHECK-LABEL: load_splat_v4i32_a4:
 ; CHECK-NEXT: .functype load_splat_v4i32_a4 (i32) -> (v128){{$}}
-; CHECK-NEXT: v32x4.load_splat $push[[R:[0-9]+]]=, 0($0){{$}}
+; CHECK-NEXT: v128.load32_splat $push[[R:[0-9]+]]=, 0($0){{$}}
 ; CHECK-NEXT: return $pop[[R]]{{$}}
 define <4 x i32> @load_splat_v4i32_a4(i32* %addr) {
   %e = load i32, i32* %addr, align 4
   %v1 = insertelement <4 x i32> undef, i32 %e, i32 0
   %v2 = shufflevector <4 x i32> %v1, <4 x i32> undef, <4 x i32> zeroinitializer
   ret <4 x i32> %v2
 }
 
 ; 8 is greater than the default alignment so it is ignored.
 
 ; CHECK-LABEL: load_splat_v4i32_a8:
 ; CHECK-NEXT: .functype load_splat_v4i32_a8 (i32) -> (v128){{$}}
-; CHECK-NEXT: v32x4.load_splat $push[[R:[0-9]+]]=, 0($0){{$}}
+; CHECK-NEXT: v128.load32_splat $push[[R:[0-9]+]]=, 0($0){{$}}
 ; CHECK-NEXT: return $pop[[R]]{{$}}
 define <4 x i32> @load_splat_v4i32_a8(i32* %addr) {
   %e = load i32, i32* %addr, align 8
   %v1 = insertelement <4 x i32> undef, i32 %e, i32 0
   %v2 = shufflevector <4 x i32> %v1, <4 x i32> undef, <4 x i32> zeroinitializer
   ret <4 x i32> %v2
 }
 

 ; CHECK-NEXT: return{{$}}
 define void @store_v2i64_a32(<2 x i64> *%p, <2 x i64> %v) {
   store <2 x i64> %v, <2 x i64>* %p, align 32
   ret void
 }
 
 ; CHECK-LABEL: load_splat_v2i64_a1:
 ; CHECK-NEXT: .functype load_splat_v2i64_a1 (i32) -> (v128){{$}}
-; CHECK-NEXT: v64x2.load_splat $push[[R:[0-9]+]]=, 0($0):p2align=0{{$}}
+; CHECK-NEXT: v128.load64_splat $push[[R:[0-9]+]]=, 0($0):p2align=0{{$}}
 ; CHECK-NEXT: return $pop[[R]]{{$}}
 define <2 x i64> @load_splat_v2i64_a1(i64* %p) {
   %e = load i64, i64* %p, align 1
   %v1 = insertelement <2 x i64> undef, i64 %e, i32 0
   %v2 = shufflevector <2 x i64> %v1, <2 x i64> undef, <2 x i32> zeroinitializer
   ret <2 x i64> %v2
 }
 
 ; CHECK-LABEL: load_splat_v2i64_a2:
 ; CHECK-NEXT: .functype load_splat_v2i64_a2 (i32) -> (v128){{$}}
-; CHECK-NEXT: v64x2.load_splat $push[[R:[0-9]+]]=, 0($0):p2align=1{{$}}
+; CHECK-NEXT: v128.load64_splat $push[[R:[0-9]+]]=, 0($0):p2align=1{{$}}
 ; CHECK-NEXT: return $pop[[R]]{{$}}
 define <2 x i64> @load_splat_v2i64_a2(i64* %p) {
   %e = load i64, i64* %p, align 2
   %v1 = insertelement <2 x i64> undef, i64 %e, i32 0
   %v2 = shufflevector <2 x i64> %v1, <2 x i64> undef, <2 x i32> zeroinitializer
   ret <2 x i64> %v2
 }
 
 ; CHECK-LABEL: load_splat_v2i64_a4:
 ; CHECK-NEXT: .functype load_splat_v2i64_a4 (i32) -> (v128){{$}}
-; CHECK-NEXT: v64x2.load_splat $push[[R:[0-9]+]]=, 0($0):p2align=2{{$}}
+; CHECK-NEXT: v128.load64_splat $push[[R:[0-9]+]]=, 0($0):p2align=2{{$}}
 ; CHECK-NEXT: return $pop[[R]]{{$}}
 define <2 x i64> @load_splat_v2i64_a4(i64* %p) {
   %e = load i64, i64* %p, align 4
   %v1 = insertelement <2 x i64> undef, i64 %e, i32 0
   %v2 = shufflevector <2 x i64> %v1, <2 x i64> undef, <2 x i32> zeroinitializer
   ret <2 x i64> %v2
 }
 
-; 8 is the default alignment for v64x2.load_splat so no attribute is needed.
+; 8 is the default alignment for v128.load64_splat so no attribute is needed.
 
 ; CHECK-LABEL: load_splat_v2i64_a8:
 ; CHECK-NEXT: .functype load_splat_v2i64_a8 (i32) -> (v128){{$}}
-; CHECK-NEXT: v64x2.load_splat $push[[R:[0-9]+]]=, 0($0){{$}}
+; CHECK-NEXT: v128.load64_splat $push[[R:[0-9]+]]=, 0($0){{$}}
 ; CHECK-NEXT: return $pop[[R]]{{$}}
 define <2 x i64> @load_splat_v2i64_a8(i64* %p) {
   %e = load i64, i64* %p, align 8
   %v1 = insertelement <2 x i64> undef, i64 %e, i32 0
   %v2 = shufflevector <2 x i64> %v1, <2 x i64> undef, <2 x i32> zeroinitializer
   ret <2 x i64> %v2
 }
 
 ; 16 is greater than the default alignment so it is ignored.
 
 ; CHECK-LABEL: load_splat_v2i64_a16:
 ; CHECK-NEXT: .functype load_splat_v2i64_a16 (i32) -> (v128){{$}}
-; CHECK-NEXT: v64x2.load_splat $push[[R:[0-9]+]]=, 0($0){{$}}
+; CHECK-NEXT: v128.load64_splat $push[[R:[0-9]+]]=, 0($0){{$}}
 ; CHECK-NEXT: return $pop[[R]]{{$}}
 define <2 x i64> @load_splat_v2i64_a16(i64* %p) {
   %e = load i64, i64* %p, align 16
   %v1 = insertelement <2 x i64> undef, i64 %e, i32 0
   %v2 = shufflevector <2 x i64> %v1, <2 x i64> undef, <2 x i32> zeroinitializer
   ret <2 x i64> %v2
 }
 

llvm/test/CodeGen/WebAssembly/simd-nested-shuffles.ll

 ; RUN: llc < %s -mattr=+simd128 -verify-machineinstrs | FileCheck %s --check-prefixes CHECK
 
 ; Check that shuffles maintain their type when being custom
 ; lowered. Regression test for bug 39275.
 
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
 target triple = "wasm32-unknown-unknown"
 
-; CHECK: v8x16.shuffle
+; CHECK: i8x16.shuffle
 define <4 x i32> @foo(<4 x i32> %x) {
   %1 = shufflevector <4 x i32> %x, <4 x i32> undef,
     <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
   %2 = shufflevector <4 x i32> %1, <4 x i32> undef,
     <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
   %3 = add <4 x i32> %2, %2
   ret <4 x i32> %3
 }

llvm/test/CodeGen/WebAssembly/simd-offset.ll

; CHECK-NEXT:    # fallthrough-return
   ret <16 x i8> %v
 }
 
 define <16 x i8> @load_splat_v16i8(i8* %p) {
 ; CHECK-LABEL: load_splat_v16i8:
 ; CHECK:         .functype load_splat_v16i8 (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
-; CHECK-NEXT:    v8x16.load_splat 0
+; CHECK-NEXT:    v128.load8_splat 0
 ; CHECK-NEXT:    # fallthrough-return
   %e = load i8, i8* %p
   %v1 = insertelement <16 x i8> undef, i8 %e, i32 0
   %v2 = shufflevector <16 x i8> %v1, <16 x i8> undef, <16 x i32> zeroinitializer
   ret <16 x i8> %v2
 }
 
 define <16 x i8> @load_v16i8_with_folded_offset(<16 x i8>* %p) {
; CHECK-NEXT:    # fallthrough-return
   ret <16 x i8> %v
 }
 
 define <16 x i8> @load_splat_v16i8_with_folded_offset(i8* %p) {
 ; CHECK-LABEL: load_splat_v16i8_with_folded_offset:
 ; CHECK:         .functype load_splat_v16i8_with_folded_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
-; CHECK-NEXT:    v8x16.load_splat 16
+; CHECK-NEXT:    v128.load8_splat 16
 ; CHECK-NEXT:    # fallthrough-return
   %q = ptrtoint i8* %p to i32
   %r = add nuw i32 %q, 16
   %s = inttoptr i32 %r to i8*
   %e = load i8, i8* %s
   %v1 = insertelement <16 x i8> undef, i8 %e, i32 0
   %v2 = shufflevector <16 x i8> %v1, <16 x i8> undef, <16 x i32> zeroinitializer
   ret <16 x i8> %v2
; CHECK-NEXT:    # fallthrough-return
   ret <16 x i8> %v
 }
 
 define <16 x i8> @load_splat_v16i8_with_folded_gep_offset(i8* %p) {
 ; CHECK-LABEL: load_splat_v16i8_with_folded_gep_offset:
 ; CHECK:         .functype load_splat_v16i8_with_folded_gep_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
-; CHECK-NEXT:    v8x16.load_splat 1
+; CHECK-NEXT:    v128.load8_splat 1
 ; CHECK-NEXT:    # fallthrough-return
   %s = getelementptr inbounds i8, i8* %p, i32 1
   %e = load i8, i8* %s
   %v1 = insertelement <16 x i8> undef, i8 %e, i32 0
   %v2 = shufflevector <16 x i8> %v1, <16 x i8> undef, <16 x i32> zeroinitializer
   ret <16 x i8> %v2
 }
 

 
 define <16 x i8> @load_splat_v16i8_with_unfolded_gep_negative_offset(i8* %p) {
 ; CHECK-LABEL: load_splat_v16i8_with_unfolded_gep_negative_offset:
 ; CHECK:         .functype load_splat_v16i8_with_unfolded_gep_negative_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    i32.const -1
 ; CHECK-NEXT:    i32.add
-; CHECK-NEXT:    v8x16.load_splat 0
+; CHECK-NEXT:    v128.load8_splat 0
 ; CHECK-NEXT:    # fallthrough-return
   %s = getelementptr inbounds i8, i8* %p, i32 -1
   %e = load i8, i8* %s
   %v1 = insertelement <16 x i8> undef, i8 %e, i32 0
   %v2 = shufflevector <16 x i8> %v1, <16 x i8> undef, <16 x i32> zeroinitializer
   ret <16 x i8> %v2
 }
 

 
 define <16 x i8> @load_splat_v16i8_with_unfolded_offset(i8* %p) {
 ; CHECK-LABEL: load_splat_v16i8_with_unfolded_offset:
 ; CHECK:         .functype load_splat_v16i8_with_unfolded_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    i32.const 16
 ; CHECK-NEXT:    i32.add
-; CHECK-NEXT:    v8x16.load_splat 0
+; CHECK-NEXT:    v128.load8_splat 0
 ; CHECK-NEXT:    # fallthrough-return
   %q = ptrtoint i8* %p to i32
   %r = add nsw i32 %q, 16
   %s = inttoptr i32 %r to i8*
   %e = load i8, i8* %s
   %v1 = insertelement <16 x i8> undef, i8 %e, i32 0
   %v2 = shufflevector <16 x i8> %v1, <16 x i8> undef, <16 x i32> zeroinitializer
   ret <16 x i8> %v2

 
 define <16 x i8> @load_splat_v16i8_with_unfolded_gep_offset(i8* %p) {
 ; CHECK-LABEL: load_splat_v16i8_with_unfolded_gep_offset:
 ; CHECK:         .functype load_splat_v16i8_with_unfolded_gep_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    i32.const 1
 ; CHECK-NEXT:    i32.add
-; CHECK-NEXT:    v8x16.load_splat 0
+; CHECK-NEXT:    v128.load8_splat 0
 ; CHECK-NEXT:    # fallthrough-return
   %s = getelementptr i8, i8* %p, i32 1
   %e = load i8, i8* %s
   %v1 = insertelement <16 x i8> undef, i8 %e, i32 0
   %v2 = shufflevector <16 x i8> %v1, <16 x i8> undef, <16 x i32> zeroinitializer
   ret <16 x i8> %v2
 }
 
; CHECK-NEXT:    # fallthrough-return
   ret <16 x i8> %v
 }
 
 define <16 x i8> @load_splat_v16i8_from_numeric_address() {
 ; CHECK-LABEL: load_splat_v16i8_from_numeric_address:
 ; CHECK:         .functype load_splat_v16i8_from_numeric_address () -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    i32.const 0
-; CHECK-NEXT:    v8x16.load_splat 32
+; CHECK-NEXT:    v128.load8_splat 32
 ; CHECK-NEXT:    # fallthrough-return
   %s = inttoptr i32 32 to i8*
   %e = load i8, i8* %s
   %v1 = insertelement <16 x i8> undef, i8 %e, i32 0
   %v2 = shufflevector <16 x i8> %v1, <16 x i8> undef, <16 x i32> zeroinitializer
   ret <16 x i8> %v2
 }
 

 }
 
 @gv_i8 = global i8 42
 define <16 x i8> @load_splat_v16i8_from_global_address() {
 ; CHECK-LABEL: load_splat_v16i8_from_global_address:
 ; CHECK:         .functype load_splat_v16i8_from_global_address () -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    i32.const 0
-; CHECK-NEXT:    v8x16.load_splat gv_i8
+; CHECK-NEXT:    v128.load8_splat gv_i8
 ; CHECK-NEXT:    # fallthrough-return
   %e = load i8, i8* @gv_i8
   %v1 = insertelement <16 x i8> undef, i8 %e, i32 0
   %v2 = shufflevector <16 x i8> %v1, <16 x i8> undef, <16 x i32> zeroinitializer
   ret <16 x i8> %v2
 }
 
 define void @store_v16i8(<16 x i8> %v, <16 x i8>* %p) {
; CHECK-NEXT:    # fallthrough-return
   ret <8 x i16> %v
 }
 
 define <8 x i16> @load_splat_v8i16(i16* %p) {
 ; CHECK-LABEL: load_splat_v8i16:
 ; CHECK:         .functype load_splat_v8i16 (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
-; CHECK-NEXT:    v16x8.load_splat 0
+; CHECK-NEXT:    v128.load16_splat 0
 ; CHECK-NEXT:    # fallthrough-return
   %e = load i16, i16* %p
   %v1 = insertelement <8 x i16> undef, i16 %e, i32 0
   %v2 = shufflevector <8 x i16> %v1, <8 x i16> undef, <8 x i32> zeroinitializer
   ret <8 x i16> %v2
 }
 
 define <8 x i16> @load_sext_v8i16(<8 x i8>* %p) {
; CHECK-NEXT:    # fallthrough-return
   ret <8 x i16> %v
 }
 
 define <8 x i16> @load_splat_v8i16_with_folded_offset(i16* %p) {
 ; CHECK-LABEL: load_splat_v8i16_with_folded_offset:
 ; CHECK:         .functype load_splat_v8i16_with_folded_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
-; CHECK-NEXT:    v16x8.load_splat 16
+; CHECK-NEXT:    v128.load16_splat 16
 ; CHECK-NEXT:    # fallthrough-return
   %q = ptrtoint i16* %p to i32
   %r = add nuw i32 %q, 16
   %s = inttoptr i32 %r to i16*
   %e = load i16, i16* %s
   %v1 = insertelement <8 x i16> undef, i16 %e, i32 0
   %v2 = shufflevector <8 x i16> %v1, <8 x i16> undef, <8 x i32> zeroinitializer
   ret <8 x i16> %v2
; CHECK-NEXT:    # fallthrough-return
   ret <8 x i16> %v
 }
 
 define <8 x i16> @load_splat_v8i16_with_folded_gep_offset(i16* %p) {
 ; CHECK-LABEL: load_splat_v8i16_with_folded_gep_offset:
 ; CHECK:         .functype load_splat_v8i16_with_folded_gep_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
-; CHECK-NEXT:    v16x8.load_splat 2
+; CHECK-NEXT:    v128.load16_splat 2
 ; CHECK-NEXT:    # fallthrough-return
   %s = getelementptr inbounds i16, i16* %p, i32 1
   %e = load i16, i16* %s
   %v1 = insertelement <8 x i16> undef, i16 %e, i32 0
   %v2 = shufflevector <8 x i16> %v1, <8 x i16> undef, <8 x i32> zeroinitializer
   ret <8 x i16> %v2
 }
 

 
 define <8 x i16> @load_splat_v8i16_with_unfolded_gep_negative_offset(i16* %p) {
 ; CHECK-LABEL: load_splat_v8i16_with_unfolded_gep_negative_offset:
 ; CHECK:         .functype load_splat_v8i16_with_unfolded_gep_negative_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    i32.const -2
 ; CHECK-NEXT:    i32.add
-; CHECK-NEXT:    v16x8.load_splat 0
+; CHECK-NEXT:    v128.load16_splat 0
 ; CHECK-NEXT:    # fallthrough-return
   %s = getelementptr inbounds i16, i16* %p, i32 -1
   %e = load i16, i16* %s
   %v1 = insertelement <8 x i16> undef, i16 %e, i32 0
   %v2 = shufflevector <8 x i16> %v1, <8 x i16> undef, <8 x i32> zeroinitializer
   ret <8 x i16> %v2
 }
 

 
 define <8 x i16> @load_splat_v8i16_with_unfolded_offset(i16* %p) {
 ; CHECK-LABEL: load_splat_v8i16_with_unfolded_offset:
 ; CHECK:         .functype load_splat_v8i16_with_unfolded_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    i32.const 16
 ; CHECK-NEXT:    i32.add
-; CHECK-NEXT:    v16x8.load_splat 0
+; CHECK-NEXT:    v128.load16_splat 0
 ; CHECK-NEXT:    # fallthrough-return
   %q = ptrtoint i16* %p to i32
   %r = add nsw i32 %q, 16
   %s = inttoptr i32 %r to i16*
   %e = load i16, i16* %s
   %v1 = insertelement <8 x i16> undef, i16 %e, i32 0
   %v2 = shufflevector <8 x i16> %v1, <8 x i16> undef, <8 x i32> zeroinitializer
   ret <8 x i16> %v2

 
 define <8 x i16> @load_splat_v8i16_with_unfolded_gep_offset(i16* %p) {
 ; CHECK-LABEL: load_splat_v8i16_with_unfolded_gep_offset:
 ; CHECK:         .functype load_splat_v8i16_with_unfolded_gep_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    i32.const 2
 ; CHECK-NEXT:    i32.add
-; CHECK-NEXT:    v16x8.load_splat 0
+; CHECK-NEXT:    v128.load16_splat 0
 ; CHECK-NEXT:    # fallthrough-return
   %s = getelementptr i16, i16* %p, i32 1
   %e = load i16, i16* %s
   %v1 = insertelement <8 x i16> undef, i16 %e, i32 0
   %v2 = shufflevector <8 x i16> %v1, <8 x i16> undef, <8 x i32> zeroinitializer
   ret <8 x i16> %v2
 }
 
; CHECK-NEXT:    # fallthrough-return
   ret <8 x i16> %v
 }
 
 define <8 x i16> @load_splat_v8i16_from_numeric_address() {
 ; CHECK-LABEL: load_splat_v8i16_from_numeric_address:
 ; CHECK:         .functype load_splat_v8i16_from_numeric_address () -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    i32.const 0
-; CHECK-NEXT:    v16x8.load_splat 32
+; CHECK-NEXT:    v128.load16_splat 32
 ; CHECK-NEXT:    # fallthrough-return
   %s = inttoptr i32 32 to i16*
   %e = load i16, i16* %s
   %v1 = insertelement <8 x i16> undef, i16 %e, i32 0
   %v2 = shufflevector <8 x i16> %v1, <8 x i16> undef, <8 x i32> zeroinitializer
   ret <8 x i16> %v2
 }
 

 }
 
 @gv_i16 = global i16 42
 define <8 x i16> @load_splat_v8i16_from_global_address() {
 ; CHECK-LABEL: load_splat_v8i16_from_global_address:
 ; CHECK:         .functype load_splat_v8i16_from_global_address () -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    i32.const 0
-; CHECK-NEXT:    v16x8.load_splat gv_i16
+; CHECK-NEXT:    v128.load16_splat gv_i16
 ; CHECK-NEXT:    # fallthrough-return
   %e = load i16, i16* @gv_i16
   %v1 = insertelement <8 x i16> undef, i16 %e, i32 0
   %v2 = shufflevector <8 x i16> %v1, <8 x i16> undef, <8 x i32> zeroinitializer
   ret <8 x i16> %v2
 }
 
 @gv_v8i8 = global <8 x i8> <i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42>
; CHECK-NEXT:    # fallthrough-return
   ret <4 x i32> %v
 }
 
 define <4 x i32> @load_splat_v4i32(i32* %addr) {
 ; CHECK-LABEL: load_splat_v4i32:
 ; CHECK:         .functype load_splat_v4i32 (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
-; CHECK-NEXT:    v32x4.load_splat 0
+; CHECK-NEXT:    v128.load32_splat 0
 ; CHECK-NEXT:    # fallthrough-return
   %e = load i32, i32* %addr, align 4
   %v1 = insertelement <4 x i32> undef, i32 %e, i32 0
   %v2 = shufflevector <4 x i32> %v1, <4 x i32> undef, <4 x i32> zeroinitializer
   ret <4 x i32> %v2
 }
 
 define <4 x i32> @load_sext_v4i32(<4 x i16>* %p) {
; CHECK-NEXT:    # fallthrough-return
   ret <4 x i32> %v
 }
 
 define <4 x i32> @load_splat_v4i32_with_folded_offset(i32* %p) {
 ; CHECK-LABEL: load_splat_v4i32_with_folded_offset:
 ; CHECK:         .functype load_splat_v4i32_with_folded_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
-; CHECK-NEXT:    v32x4.load_splat 16
+; CHECK-NEXT:    v128.load32_splat 16
 ; CHECK-NEXT:    # fallthrough-return
   %q = ptrtoint i32* %p to i32
   %r = add nuw i32 %q, 16
   %s = inttoptr i32 %r to i32*
   %e = load i32, i32* %s
   %v1 = insertelement <4 x i32> undef, i32 %e, i32 0
   %v2 = shufflevector <4 x i32> %v1, <4 x i32> undef, <4 x i32> zeroinitializer
   ret <4 x i32> %v2
; CHECK-NEXT:    # fallthrough-return
   ret <4 x i32> %v
 }
 
 define <4 x i32> @load_splat_v4i32_with_folded_gep_offset(i32* %p) {
 ; CHECK-LABEL: load_splat_v4i32_with_folded_gep_offset:
 ; CHECK:         .functype load_splat_v4i32_with_folded_gep_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
-; CHECK-NEXT:    v32x4.load_splat 4
+; CHECK-NEXT:    v128.load32_splat 4
 ; CHECK-NEXT:    # fallthrough-return
   %s = getelementptr inbounds i32, i32* %p, i32 1
   %e = load i32, i32* %s
   %v1 = insertelement <4 x i32> undef, i32 %e, i32 0
   %v2 = shufflevector <4 x i32> %v1, <4 x i32> undef, <4 x i32> zeroinitializer
   ret <4 x i32> %v2
 }
 

 
 define <4 x i32> @load_splat_v4i32_with_unfolded_gep_negative_offset(i32* %p) {
 ; CHECK-LABEL: load_splat_v4i32_with_unfolded_gep_negative_offset:
 ; CHECK:         .functype load_splat_v4i32_with_unfolded_gep_negative_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    i32.const -4
 ; CHECK-NEXT:    i32.add
-; CHECK-NEXT:    v32x4.load_splat 0
+; CHECK-NEXT:    v128.load32_splat 0
 ; CHECK-NEXT:    # fallthrough-return
   %s = getelementptr inbounds i32, i32* %p, i32 -1
   %e = load i32, i32* %s
   %v1 = insertelement <4 x i32> undef, i32 %e, i32 0
   %v2 = shufflevector <4 x i32> %v1, <4 x i32> undef, <4 x i32> zeroinitializer
   ret <4 x i32> %v2
 }
 

 
 define <4 x i32> @load_splat_v4i32_with_unfolded_offset(i32* %p) {
 ; CHECK-LABEL: load_splat_v4i32_with_unfolded_offset:
 ; CHECK:         .functype load_splat_v4i32_with_unfolded_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    i32.const 16
 ; CHECK-NEXT:    i32.add
-; CHECK-NEXT:    v32x4.load_splat 0
+; CHECK-NEXT:    v128.load32_splat 0
 ; CHECK-NEXT:    # fallthrough-return
   %q = ptrtoint i32* %p to i32
   %r = add nsw i32 %q, 16
   %s = inttoptr i32 %r to i32*
   %e = load i32, i32* %s
   %v1 = insertelement <4 x i32> undef, i32 %e, i32 0
   %v2 = shufflevector <4 x i32> %v1, <4 x i32> undef, <4 x i32> zeroinitializer
   ret <4 x i32> %v2

 
 define <4 x i32> @load_splat_v4i32_with_unfolded_gep_offset(i32* %p) {
 ; CHECK-LABEL: load_splat_v4i32_with_unfolded_gep_offset:
 ; CHECK:         .functype load_splat_v4i32_with_unfolded_gep_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    i32.const 4
 ; CHECK-NEXT:    i32.add
-; CHECK-NEXT:    v32x4.load_splat 0
+; CHECK-NEXT:    v128.load32_splat 0
 ; CHECK-NEXT:    # fallthrough-return
   %s = getelementptr i32, i32* %p, i32 1
   %e = load i32, i32* %s
   %v1 = insertelement <4 x i32> undef, i32 %e, i32 0
   %v2 = shufflevector <4 x i32> %v1, <4 x i32> undef, <4 x i32> zeroinitializer
   ret <4 x i32> %v2
 }
 
; CHECK-NEXT:    # fallthrough-return
   ret <4 x i32> %v
 }
 
 define <4 x i32> @load_splat_v4i32_from_numeric_address() {
 ; CHECK-LABEL: load_splat_v4i32_from_numeric_address:
 ; CHECK:         .functype load_splat_v4i32_from_numeric_address () -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    i32.const 0
-; CHECK-NEXT:    v32x4.load_splat 32
+; CHECK-NEXT:    v128.load32_splat 32
 ; CHECK-NEXT:    # fallthrough-return
   %s = inttoptr i32 32 to i32*
   %e = load i32, i32* %s
   %v1 = insertelement <4 x i32> undef, i32 %e, i32 0
   %v2 = shufflevector <4 x i32> %v1, <4 x i32> undef, <4 x i32> zeroinitializer
   ret <4 x i32> %v2
 }
 

 }
 
 @gv_i32 = global i32 42
 define <4 x i32> @load_splat_v4i32_from_global_address() {
 ; CHECK-LABEL: load_splat_v4i32_from_global_address:
 ; CHECK:         .functype load_splat_v4i32_from_global_address () -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    i32.const 0
-; CHECK-NEXT:    v32x4.load_splat gv_i32
+; CHECK-NEXT:    v128.load32_splat gv_i32
 ; CHECK-NEXT:    # fallthrough-return
   %e = load i32, i32* @gv_i32
   %v1 = insertelement <4 x i32> undef, i32 %e, i32 0
   %v2 = shufflevector <4 x i32> %v1, <4 x i32> undef, <4 x i32> zeroinitializer
   ret <4 x i32> %v2
 }
 
 @gv_v4i16 = global <4 x i16> <i16 42, i16 42, i16 42, i16 42>
; CHECK-NEXT:    # fallthrough-return
   ret <2 x i64> %v
 }
 
 define <2 x i64> @load_splat_v2i64(i64* %p) {
 ; CHECK-LABEL: load_splat_v2i64:
 ; CHECK:         .functype load_splat_v2i64 (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
-; CHECK-NEXT:    v64x2.load_splat 0
+; CHECK-NEXT:    v128.load64_splat 0
 ; CHECK-NEXT:    # fallthrough-return
   %e = load i64, i64* %p
   %v1 = insertelement <2 x i64> undef, i64 %e, i32 0
   %v2 = shufflevector <2 x i64> %v1, <2 x i64> undef, <2 x i32> zeroinitializer
   ret <2 x i64> %v2
 }
 
 define <2 x i64> @load_sext_v2i64(<2 x i32>* %p) {
; CHECK-NEXT:    # fallthrough-return
   ret <2 x i64> %v
 }
 
 define <2 x i64> @load_splat_v2i64_with_folded_offset(i64* %p) {
 ; CHECK-LABEL: load_splat_v2i64_with_folded_offset:
 ; CHECK:         .functype load_splat_v2i64_with_folded_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
-; CHECK-NEXT:    v64x2.load_splat 16
+; CHECK-NEXT:    v128.load64_splat 16
 ; CHECK-NEXT:    # fallthrough-return
   %q = ptrtoint i64* %p to i32
   %r = add nuw i32 %q, 16
   %s = inttoptr i32 %r to i64*
   %e = load i64, i64* %s
   %v1 = insertelement <2 x i64> undef, i64 %e, i32 0
   %v2 = shufflevector <2 x i64> %v1, <2 x i64> undef, <2 x i32> zeroinitializer
   ret <2 x i64> %v2
; CHECK-NEXT:    # fallthrough-return
   ret <2 x i64> %v
 }
 
 define <2 x i64> @load_splat_v2i64_with_folded_gep_offset(i64* %p) {
 ; CHECK-LABEL: load_splat_v2i64_with_folded_gep_offset:
 ; CHECK:         .functype load_splat_v2i64_with_folded_gep_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
-; CHECK-NEXT:    v64x2.load_splat 8
+; CHECK-NEXT:    v128.load64_splat 8
 ; CHECK-NEXT:    # fallthrough-return
   %s = getelementptr inbounds i64, i64* %p, i32 1
   %e = load i64, i64* %s
   %v1 = insertelement <2 x i64> undef, i64 %e, i32 0
   %v2 = shufflevector <2 x i64> %v1, <2 x i64> undef, <2 x i32> zeroinitializer
   ret <2 x i64> %v2
 }
 

 
 define <2 x i64> @load_splat_v2i64_with_unfolded_gep_negative_offset(i64* %p) {
 ; CHECK-LABEL: load_splat_v2i64_with_unfolded_gep_negative_offset:
 ; CHECK:         .functype load_splat_v2i64_with_unfolded_gep_negative_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    i32.const -8
 ; CHECK-NEXT:    i32.add
-; CHECK-NEXT:    v64x2.load_splat 0
+; CHECK-NEXT:    v128.load64_splat 0
 ; CHECK-NEXT:    # fallthrough-return
   %s = getelementptr inbounds i64, i64* %p, i32 -1
   %e = load i64, i64* %s
   %v1 = insertelement <2 x i64> undef, i64 %e, i32 0
   %v2 = shufflevector <2 x i64> %v1, <2 x i64> undef, <2 x i32> zeroinitializer
   ret <2 x i64> %v2
 }
 

 
 define <2 x i64> @load_splat_v2i64_with_unfolded_offset(i64* %p) {
 ; CHECK-LABEL: load_splat_v2i64_with_unfolded_offset:
 ; CHECK:         .functype load_splat_v2i64_with_unfolded_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    i32.const 16
 ; CHECK-NEXT:    i32.add
-; CHECK-NEXT:    v64x2.load_splat 0
+; CHECK-NEXT:    v128.load64_splat 0
 ; CHECK-NEXT:    # fallthrough-return
   %q = ptrtoint i64* %p to i32
   %r = add nsw i32 %q, 16
   %s = inttoptr i32 %r to i64*
   %e = load i64, i64* %s
   %v1 = insertelement <2 x i64> undef, i64 %e, i32 0
   %v2 = shufflevector <2 x i64> %v1, <2 x i64> undef, <2 x i32> zeroinitializer
   ret <2 x i64> %v2

 
 define <2 x i64> @load_splat_v2i64_with_unfolded_gep_offset(i64* %p) {
 ; CHECK-LABEL: load_splat_v2i64_with_unfolded_gep_offset:
 ; CHECK:         .functype load_splat_v2i64_with_unfolded_gep_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    i32.const 8
 ; CHECK-NEXT:    i32.add
-; CHECK-NEXT:    v64x2.load_splat 0
+; CHECK-NEXT:    v128.load64_splat 0
 ; CHECK-NEXT:    # fallthrough-return
   %s = getelementptr i64, i64* %p, i32 1
   %e = load i64, i64* %s
   %v1 = insertelement <2 x i64> undef, i64 %e, i32 0
   %v2 = shufflevector <2 x i64> %v1, <2 x i64> undef, <2 x i32> zeroinitializer
   ret <2 x i64> %v2
 }
 
; CHECK-NEXT:    # fallthrough-return
   ret <2 x i64> %v
 }
 
 define <2 x i64> @load_splat_v2i64_from_numeric_address() {
 ; CHECK-LABEL: load_splat_v2i64_from_numeric_address:
 ; CHECK:         .functype load_splat_v2i64_from_numeric_address () -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    i32.const 0
-; CHECK-NEXT:    v64x2.load_splat 32
+; CHECK-NEXT:    v128.load64_splat 32
 ; CHECK-NEXT:    # fallthrough-return
   %s = inttoptr i32 32 to i64*
   %e = load i64, i64* %s
   %v1 = insertelement <2 x i64> undef, i64 %e, i32 0
   %v2 = shufflevector <2 x i64> %v1, <2 x i64> undef, <2 x i32> zeroinitializer
   ret <2 x i64> %v2
 }
 

 }
 
 @gv_i64 = global i64 42
 define <2 x i64> @load_splat_v2i64_from_global_address() {
 ; CHECK-LABEL: load_splat_v2i64_from_global_address:
 ; CHECK:         .functype load_splat_v2i64_from_global_address () -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    i32.const 0
-; CHECK-NEXT:    v64x2.load_splat gv_i64
+; CHECK-NEXT:    v128.load64_splat gv_i64
 ; CHECK-NEXT:    # fallthrough-return
   %e = load i64, i64* @gv_i64
   %v1 = insertelement <2 x i64> undef, i64 %e, i32 0
   %v2 = shufflevector <2 x i64> %v1, <2 x i64> undef, <2 x i32> zeroinitializer
   ret <2 x i64> %v2
 }
 
 @gv_v2i32 = global <2 x i32> <i32 42, i32 42>
; CHECK-NEXT:    # fallthrough-return
   ret <4 x float> %v
 }
 
 define <4 x float> @load_splat_v4f32(float* %p) {
 ; CHECK-LABEL: load_splat_v4f32:
 ; CHECK:         .functype load_splat_v4f32 (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
-; CHECK-NEXT:    v32x4.load_splat 0
+; CHECK-NEXT:    v128.load32_splat 0
 ; CHECK-NEXT:    # fallthrough-return
   %e = load float, float* %p
   %v1 = insertelement <4 x float> undef, float %e, i32 0
   %v2 = shufflevector <4 x float> %v1, <4 x float> undef, <4 x i32> zeroinitializer
   ret <4 x float> %v2
 }
 
 define <4 x float> @load_v4f32_with_folded_offset(<4 x float>* %p) {
; CHECK-NEXT:    # fallthrough-return
   ret <4 x float> %v
 }
 
 define <4 x float> @load_splat_v4f32_with_folded_offset(float* %p) {
 ; CHECK-LABEL: load_splat_v4f32_with_folded_offset:
 ; CHECK:         .functype load_splat_v4f32_with_folded_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
-; CHECK-NEXT:    v32x4.load_splat 16
+; CHECK-NEXT:    v128.load32_splat 16
 ; CHECK-NEXT:    # fallthrough-return
   %q = ptrtoint float* %p to i32
   %r = add nuw i32 %q, 16
   %s = inttoptr i32 %r to float*
   %e = load float, float* %s
   %v1 = insertelement <4 x float> undef, float %e, i32 0
   %v2 = shufflevector <4 x float> %v1, <4 x float> undef, <4 x i32> zeroinitializer
   ret <4 x float> %v2
; CHECK-NEXT:    # fallthrough-return
   ret <4 x float> %v
 }
 
 define <4 x float> @load_splat_v4f32_with_folded_gep_offset(float* %p) {
 ; CHECK-LABEL: load_splat_v4f32_with_folded_gep_offset:
 ; CHECK:         .functype load_splat_v4f32_with_folded_gep_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
-; CHECK-NEXT:    v32x4.load_splat 4
+; CHECK-NEXT:    v128.load32_splat 4
 ; CHECK-NEXT:    # fallthrough-return
   %s = getelementptr inbounds float, float* %p, i32 1
   %e = load float, float* %s
   %v1 = insertelement <4 x float> undef, float %e, i32 0
   %v2 = shufflevector <4 x float> %v1, <4 x float> undef, <4 x i32> zeroinitializer
   ret <4 x float> %v2
 }
 

 
 define <4 x float> @load_splat_v4f32_with_unfolded_gep_negative_offset(float* %p) {
 ; CHECK-LABEL: load_splat_v4f32_with_unfolded_gep_negative_offset:
 ; CHECK:         .functype load_splat_v4f32_with_unfolded_gep_negative_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    i32.const -4
 ; CHECK-NEXT:    i32.add
-; CHECK-NEXT:    v32x4.load_splat 0
+; CHECK-NEXT:    v128.load32_splat 0
 ; CHECK-NEXT:    # fallthrough-return
   %s = getelementptr inbounds float, float* %p, i32 -1
   %e = load float, float* %s
   %v1 = insertelement <4 x float> undef, float %e, i32 0
   %v2 = shufflevector <4 x float> %v1, <4 x float> undef, <4 x i32> zeroinitializer
   ret <4 x float> %v2
 }
 

 
 define <4 x float> @load_splat_v4f32_with_unfolded_offset(float* %p) {
 ; CHECK-LABEL: load_splat_v4f32_with_unfolded_offset:
 ; CHECK:         .functype load_splat_v4f32_with_unfolded_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    i32.const 16
 ; CHECK-NEXT:    i32.add
-; CHECK-NEXT:    v32x4.load_splat 0
+; CHECK-NEXT:    v128.load32_splat 0
 ; CHECK-NEXT:    # fallthrough-return
   %q = ptrtoint float* %p to i32
   %r = add nsw i32 %q, 16
   %s = inttoptr i32 %r to float*
   %e = load float, float* %s
   %v1 = insertelement <4 x float> undef, float %e, i32 0
   %v2 = shufflevector <4 x float> %v1, <4 x float> undef, <4 x i32> zeroinitializer
   ret <4 x float> %v2

 
 define <4 x float> @load_splat_v4f32_with_unfolded_gep_offset(float* %p) {
 ; CHECK-LABEL: load_splat_v4f32_with_unfolded_gep_offset:
 ; CHECK:         .functype load_splat_v4f32_with_unfolded_gep_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    i32.const 4
 ; CHECK-NEXT:    i32.add
-; CHECK-NEXT:    v32x4.load_splat 0
+; CHECK-NEXT:    v128.load32_splat 0
 ; CHECK-NEXT:    # fallthrough-return
   %s = getelementptr float, float* %p, i32 1
   %e = load float, float* %s
   %v1 = insertelement <4 x float> undef, float %e, i32 0
   %v2 = shufflevector <4 x float> %v1, <4 x float> undef, <4 x i32> zeroinitializer
   ret <4 x float> %v2
 }
 
; CHECK-NEXT:    # fallthrough-return
   ret <4 x float> %v
 }
 
 define <4 x float> @load_splat_v4f32_from_numeric_address() {
 ; CHECK-LABEL: load_splat_v4f32_from_numeric_address:
 ; CHECK:         .functype load_splat_v4f32_from_numeric_address () -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    i32.const 0
-; CHECK-NEXT:    v32x4.load_splat 32
+; CHECK-NEXT:    v128.load32_splat 32
 ; CHECK-NEXT:    # fallthrough-return
   %s = inttoptr i32 32 to float*
   %e = load float, float* %s
   %v1 = insertelement <4 x float> undef, float %e, i32 0
   %v2 = shufflevector <4 x float> %v1, <4 x float> undef, <4 x i32> zeroinitializer
   ret <4 x float> %v2
 }
 

 }
 
 @gv_f32 = global float 42.
 define <4 x float> @load_splat_v4f32_from_global_address() {
 ; CHECK-LABEL: load_splat_v4f32_from_global_address:
 ; CHECK:         .functype load_splat_v4f32_from_global_address () -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    i32.const 0
-; CHECK-NEXT:    v32x4.load_splat gv_f32
+; CHECK-NEXT:    v128.load32_splat gv_f32
 ; CHECK-NEXT:    # fallthrough-return
   %e = load float, float* @gv_f32
   %v1 = insertelement <4 x float> undef, float %e, i32 0
   %v2 = shufflevector <4 x float> %v1, <4 x float> undef, <4 x i32> zeroinitializer
   ret <4 x float> %v2
 }
 
 define void @store_v4f32(<4 x float> %v, <4 x float>* %p) {
; CHECK-NEXT:    # fallthrough-return
   ret <2 x double> %v
 }
 
 define <2 x double> @load_splat_v2f64(double* %p) {
 ; CHECK-LABEL: load_splat_v2f64:
 ; CHECK:         .functype load_splat_v2f64 (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
-; CHECK-NEXT:    v64x2.load_splat 0
+; CHECK-NEXT:    v128.load64_splat 0
 ; CHECK-NEXT:    # fallthrough-return
   %e = load double, double* %p
   %v1 = insertelement <2 x double> undef, double %e, i32 0
   %v2 = shufflevector <2 x double> %v1, <2 x double> undef, <2 x i32> zeroinitializer
   ret <2 x double> %v2
 }
 
 define <2 x double> @load_v2f64_with_folded_offset(<2 x double>* %p) {
; CHECK-NEXT:    # fallthrough-return
   ret <2 x double> %v
 }
 
 define <2 x double> @load_splat_v2f64_with_folded_offset(double* %p) {
 ; CHECK-LABEL: load_splat_v2f64_with_folded_offset:
 ; CHECK:         .functype load_splat_v2f64_with_folded_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
-; CHECK-NEXT:    v64x2.load_splat 16
+; CHECK-NEXT:    v128.load64_splat 16
 ; CHECK-NEXT:    # fallthrough-return
   %q = ptrtoint double* %p to i32
   %r = add nuw i32 %q, 16
   %s = inttoptr i32 %r to double*
   %e = load double, double* %s
   %v1 = insertelement <2 x double> undef, double %e, i32 0
   %v2 = shufflevector <2 x double> %v1, <2 x double> undef, <2 x i32> zeroinitializer
   ret <2 x double> %v2
; CHECK-NEXT:    # fallthrough-return
   ret <2 x double> %v
 }
 
 define <2 x double> @load_splat_v2f64_with_folded_gep_offset(double* %p) {
 ; CHECK-LABEL: load_splat_v2f64_with_folded_gep_offset:
 ; CHECK:         .functype load_splat_v2f64_with_folded_gep_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
-; CHECK-NEXT:    v64x2.load_splat 8
+; CHECK-NEXT:    v128.load64_splat 8
 ; CHECK-NEXT:    # fallthrough-return
   %s = getelementptr inbounds double, double* %p, i32 1
   %e = load double, double* %s
   %v1 = insertelement <2 x double> undef, double %e, i32 0
   %v2 = shufflevector <2 x double> %v1, <2 x double> undef, <2 x i32> zeroinitializer
   ret <2 x double> %v2
 }
 

 
 define <2 x double> @load_splat_v2f64_with_unfolded_gep_negative_offset(double* %p) {
 ; CHECK-LABEL: load_splat_v2f64_with_unfolded_gep_negative_offset:
 ; CHECK:         .functype load_splat_v2f64_with_unfolded_gep_negative_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    i32.const -8
 ; CHECK-NEXT:    i32.add
-; CHECK-NEXT:    v64x2.load_splat 0
+; CHECK-NEXT:    v128.load64_splat 0
 ; CHECK-NEXT:    # fallthrough-return
   %s = getelementptr inbounds double, double* %p, i32 -1
   %e = load double, double* %s
   %v1 = insertelement <2 x double> undef, double %e, i32 0
   %v2 = shufflevector <2 x double> %v1, <2 x double> undef, <2 x i32> zeroinitializer
   ret <2 x double> %v2
 }
 

 
 define <2 x double> @load_splat_v2f64_with_unfolded_offset(double* %p) {
 ; CHECK-LABEL: load_splat_v2f64_with_unfolded_offset:
 ; CHECK:         .functype load_splat_v2f64_with_unfolded_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    i32.const 16
 ; CHECK-NEXT:    i32.add
-; CHECK-NEXT:    v64x2.load_splat 0
+; CHECK-NEXT:    v128.load64_splat 0
 ; CHECK-NEXT:    # fallthrough-return
   %q = ptrtoint double* %p to i32
   %r = add nsw i32 %q, 16
   %s = inttoptr i32 %r to double*
   %e = load double, double* %s
   %v1 = insertelement <2 x double> undef, double %e, i32 0
   %v2 = shufflevector <2 x double> %v1, <2 x double> undef, <2 x i32> zeroinitializer
   ret <2 x double> %v2

 
 define <2 x double> @load_splat_v2f64_with_unfolded_gep_offset(double* %p) {
 ; CHECK-LABEL: load_splat_v2f64_with_unfolded_gep_offset:
 ; CHECK:         .functype load_splat_v2f64_with_unfolded_gep_offset (i32) -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    local.get 0
 ; CHECK-NEXT:    i32.const 8
 ; CHECK-NEXT:    i32.add
-; CHECK-NEXT:    v64x2.load_splat 0
+; CHECK-NEXT:    v128.load64_splat 0
 ; CHECK-NEXT:    # fallthrough-return
   %s = getelementptr double, double* %p, i32 1
   %e = load double, double* %s
   %v1 = insertelement <2 x double> undef, double %e, i32 0
   %v2 = shufflevector <2 x double> %v1, <2 x double> undef, <2 x i32> zeroinitializer
   ret <2 x double> %v2
 }
 
; CHECK-NEXT:    # fallthrough-return
   ret <2 x double> %v
 }
 
 define <2 x double> @load_splat_v2f64_from_numeric_address() {
 ; CHECK-LABEL: load_splat_v2f64_from_numeric_address:
 ; CHECK:         .functype load_splat_v2f64_from_numeric_address () -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    i32.const 0
-; CHECK-NEXT:    v64x2.load_splat 32
+; CHECK-NEXT:    v128.load64_splat 32
 ; CHECK-NEXT:    # fallthrough-return
   %s = inttoptr i32 32 to double*
   %e = load double, double* %s
   %v1 = insertelement <2 x double> undef, double %e, i32 0
   %v2 = shufflevector <2 x double> %v1, <2 x double> undef, <2 x i32> zeroinitializer
   ret <2 x double> %v2
 }
 

 }
 
 @gv_f64 = global double 42.
 define <2 x double> @load_splat_v2f64_from_global_address() {
 ; CHECK-LABEL: load_splat_v2f64_from_global_address:
 ; CHECK:         .functype load_splat_v2f64_from_global_address () -> (v128)
 ; CHECK-NEXT:  # %bb.0:
 ; CHECK-NEXT:    i32.const 0
-; CHECK-NEXT:    v64x2.load_splat gv_f64
+; CHECK-NEXT:    v128.load64_splat gv_f64
 ; CHECK-NEXT:    # fallthrough-return
   %e = load double, double* @gv_f64
   %v1 = insertelement <2 x double> undef, double %e, i32 0
   %v2 = shufflevector <2 x double> %v1, <2 x double> undef, <2 x i32> zeroinitializer
   ret <2 x double> %v2
 }
 
 define void @store_v2f64(<2 x double> %v, <2 x double>* %p) {

llvm/test/CodeGen/WebAssembly/simd-shift-complex-splats.ll

 }
 
 ; CHECK-LABEL: shl_abs_add:
 ; CHECK-NEXT: .functype shl_abs_add (v128, i32, i32) -> (v128)
 ; CHECK-NEXT: i8x16.extract_lane_u $push11=, $0, 0
 ; CHECK-NEXT: i8x16.splat $push1=, $1
 ; CHECK-NEXT: i8x16.splat $push0=, $2
 ; CHECK-NEXT: i8x16.add $push2=, $pop1, $pop0
-; CHECK-NEXT: v8x16.shuffle $push3=, $pop2, $0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+; CHECK-NEXT: i8x16.shuffle $push3=, $pop2, $0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
 ; CHECK-NEXT: i8x16.abs $push101=, $pop3
 ; CHECK-NEXT: local.tee $push100=, $3=, $pop101
 ; CHECK-NEXT: i8x16.extract_lane_u $push9=, $pop100, 0
 ; CHECK-NEXT: i32.const $push5=, 7
 ; CHECK-NEXT: i32.and $push10=, $pop9, $pop5
 ; CHECK-NEXT: i32.shl $push12=, $pop11, $pop10
 ; CHECK-NEXT: i8x16.splat $push13=, $pop12
 ; CHECK-NEXT: i8x16.extract_lane_u $push7=, $0, 1

llvm/test/CodeGen/WebAssembly/simd-shuffle-bitcast.ll

define <4 x i32> @f32x4_splat(float %x) {
   %a = bitcast <4 x float> %vecinit to <4 x i32>
   %b = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> zeroinitializer
   ret <4 x i32> %b
 }
 
 ; CHECK-LABEL: not_a_vec:
 ; CHECK-NEXT: .functype not_a_vec (i64, i64) -> (v128){{$}}
 ; CHECK-NEXT: i64x2.splat $push[[L1:[0-9]+]]=, $0{{$}}
-; CHECK-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $pop[[L1]], $2, 0, 1, 2, 3
+; CHECK-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $pop[[L1]], $2, 0, 1, 2, 3
 ; CHECK-NEXT: return $pop[[R]]
 define <4 x i32> @not_a_vec(i128 %x) {
   %a = bitcast i128 %x to <4 x i32>
   %b = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> zeroinitializer
   ret <4 x i32> %b
 }

llvm/test/CodeGen/WebAssembly/simd.ll

 ; SIMD128-NEXT: i8x16.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 define <16 x i8> @replace_zero_v16i8(<16 x i8> %v, i8 %x) {
   %res = insertelement <16 x i8> %v, i8 %x, i32 0
   ret <16 x i8> %res
 }
 
 ; CHECK-LABEL: shuffle_v16i8:
-; NO-SIMD128-NOT: v8x16
+; NO-SIMD128-NOT: i8x16
 ; SIMD128-NEXT: .functype shuffle_v16i8 (v128, v128) -> (v128){{$}}
-; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
+; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
 ; SIMD128-SAME: 0, 17, 2, 19, 4, 21, 6, 23, 8, 25, 10, 27, 12, 29, 14, 31{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 define <16 x i8> @shuffle_v16i8(<16 x i8> %x, <16 x i8> %y) {
   %res = shufflevector <16 x i8> %x, <16 x i8> %y,
     <16 x i32> <i32 0, i32 17, i32 2, i32 19, i32 4, i32 21, i32 6, i32 23,
                 i32 8, i32 25, i32 10, i32 27, i32 12, i32 29, i32 14, i32 31>
   ret <16 x i8> %res
 }
 
 ; CHECK-LABEL: shuffle_undef_v16i8:
-; NO-SIMD128-NOT: v8x16
+; NO-SIMD128-NOT: i8x16
 ; SIMD128-NEXT: .functype shuffle_undef_v16i8 (v128, v128) -> (v128){{$}}
-; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
+; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
 ; SIMD128-SAME: 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 define <16 x i8> @shuffle_undef_v16i8(<16 x i8> %x, <16 x i8> %y) {
   %res = shufflevector <16 x i8> %x, <16 x i8> %y,
     <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef,
                 i32 undef, i32 undef, i32 undef, i32 undef,
                 i32 undef, i32 undef, i32 undef, i32 undef,
                 i32 undef, i32 undef, i32 undef, i32 undef>

 ; SIMD128-NEXT: i16x8.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 define <8 x i16> @replace_zero_v8i16(<8 x i16> %v, i16 %x) {
   %res = insertelement <8 x i16> %v, i16 %x, i32 0
   ret <8 x i16> %res
 }
 
 ; CHECK-LABEL: shuffle_v8i16:
-; NO-SIMD128-NOT: v8x16
+; NO-SIMD128-NOT: i8x16
 ; SIMD128-NEXT: .functype shuffle_v8i16 (v128, v128) -> (v128){{$}}
-; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
+; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
 ; SIMD128-SAME: 0, 1, 18, 19, 4, 5, 22, 23, 8, 9, 26, 27, 12, 13, 30, 31{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 define <8 x i16> @shuffle_v8i16(<8 x i16> %x, <8 x i16> %y) {
   %res = shufflevector <8 x i16> %x, <8 x i16> %y,
     <8 x i32> <i32 0, i32 9, i32 2, i32 11, i32 4, i32 13, i32 6, i32 15>
   ret <8 x i16> %res
 }
 
 ; CHECK-LABEL: shuffle_undef_v8i16:
-; NO-SIMD128-NOT: v8x16
+; NO-SIMD128-NOT: i8x16
 ; SIMD128-NEXT: .functype shuffle_undef_v8i16 (v128, v128) -> (v128){{$}}
-; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
+; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
 ; SIMD128-SAME: 2, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 define <8 x i16> @shuffle_undef_v8i16(<8 x i16> %x, <8 x i16> %y) {
   %res = shufflevector <8 x i16> %x, <8 x i16> %y,
     <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef,
                i32 undef, i32 undef, i32 undef, i32 undef>
   ret <8 x i16> %res
 }

 ; SIMD128-NEXT: i32x4.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 define <4 x i32> @replace_zero_v4i32(<4 x i32> %v, i32 %x) {
   %res = insertelement <4 x i32> %v, i32 %x, i32 0
   ret <4 x i32> %res
 }
 
 ; CHECK-LABEL: shuffle_v4i32:
-; NO-SIMD128-NOT: v8x16
+; NO-SIMD128-NOT: i8x16
 ; SIMD128-NEXT: .functype shuffle_v4i32 (v128, v128) -> (v128){{$}}
-; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
+; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
 ; SIMD128-SAME: 0, 1, 2, 3, 20, 21, 22, 23, 8, 9, 10, 11, 28, 29, 30, 31{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 define <4 x i32> @shuffle_v4i32(<4 x i32> %x, <4 x i32> %y) {
   %res = shufflevector <4 x i32> %x, <4 x i32> %y,
     <4 x i32> <i32 0, i32 5, i32 2, i32 7>
   ret <4 x i32> %res
 }
 
 ; CHECK-LABEL: shuffle_undef_v4i32:
-; NO-SIMD128-NOT: v8x16
+; NO-SIMD128-NOT: i8x16
 ; SIMD128-NEXT: .functype shuffle_undef_v4i32 (v128, v128) -> (v128){{$}}
-; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
+; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
 ; SIMD128-SAME: 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 define <4 x i32> @shuffle_undef_v4i32(<4 x i32> %x, <4 x i32> %y) {
   %res = shufflevector <4 x i32> %x, <4 x i32> %y,
     <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
   ret <4 x i32> %res
 }
 

 ; SIMD128-NEXT: i64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 define <2 x i64> @replace_zero_v2i64(<2 x i64> %v, i64 %x) {
   %res = insertelement <2 x i64> %v, i64 %x, i32 0
   ret <2 x i64> %res
 }
 
 ; CHECK-LABEL: shuffle_v2i64:
-; NO-SIMD128-NOT: v8x16
+; NO-SIMD128-NOT: i8x16
 ; SIMD128-NEXT: .functype shuffle_v2i64 (v128, v128) -> (v128){{$}}
-; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
+; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
 ; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 24, 25, 26, 27, 28, 29, 30, 31{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 define <2 x i64> @shuffle_v2i64(<2 x i64> %x, <2 x i64> %y) {
   %res = shufflevector <2 x i64> %x, <2 x i64> %y, <2 x i32> <i32 0, i32 3>
   ret <2 x i64> %res
 }
 
 ; CHECK-LABEL: shuffle_undef_v2i64:
-; NO-SIMD128-NOT: v8x16
+; NO-SIMD128-NOT: i8x16
 ; SIMD128-NEXT: .functype shuffle_undef_v2i64 (v128, v128) -> (v128){{$}}
-; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
+; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
 ; SIMD128-SAME: 8, 9, 10, 11, 12, 13, 14, 15, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 define <2 x i64> @shuffle_undef_v2i64(<2 x i64> %x, <2 x i64> %y) {
   %res = shufflevector <2 x i64> %x, <2 x i64> %y,
     <2 x i32> <i32 1, i32 undef>
   ret <2 x i64> %res
 }
 

 ; SIMD128-NEXT: f32x4.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 define <4 x float> @replace_zero_v4f32(<4 x float> %v, float %x) {
   %res = insertelement <4 x float> %v, float %x, i32 0
   ret <4 x float> %res
 }
 
 ; CHECK-LABEL: shuffle_v4f32:
-; NO-SIMD128-NOT: v8x16
+; NO-SIMD128-NOT: i8x16
 ; SIMD128-NEXT: .functype shuffle_v4f32 (v128, v128) -> (v128){{$}}
-; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
+; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
 ; SIMD128-SAME: 0, 1, 2, 3, 20, 21, 22, 23, 8, 9, 10, 11, 28, 29, 30, 31{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 define <4 x float> @shuffle_v4f32(<4 x float> %x, <4 x float> %y) {
   %res = shufflevector <4 x float> %x, <4 x float> %y,
     <4 x i32> <i32 0, i32 5, i32 2, i32 7>
   ret <4 x float> %res
 }
 
 ; CHECK-LABEL: shuffle_undef_v4f32:
-; NO-SIMD128-NOT: v8x16
+; NO-SIMD128-NOT: i8x16
 ; SIMD128-NEXT: .functype shuffle_undef_v4f32 (v128, v128) -> (v128){{$}}
-; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
+; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
 ; SIMD128-SAME: 4, 5, 6, 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 define <4 x float> @shuffle_undef_v4f32(<4 x float> %x, <4 x float> %y) {
   %res = shufflevector <4 x float> %x, <4 x float> %y,
     <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
   ret <4 x float> %res
 }
 

 ; SIMD128-NEXT: f64x2.replace_lane $push[[R:[0-9]+]]=, $0, 0, $1{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 define <2 x double> @replace_zero_v2f64(<2 x double> %v, double %x) {
   %res = insertelement <2 x double> %v, double %x, i32 0
   ret <2 x double> %res
 }
 
 ; CHECK-LABEL: shuffle_v2f64:
-; NO-SIMD128-NOT: v8x16
+; NO-SIMD128-NOT: i8x16
 ; SIMD128-NEXT: .functype shuffle_v2f64 (v128, v128) -> (v128){{$}}
-; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
+; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $1,
 ; SIMD128-SAME: 0, 1, 2, 3, 4, 5, 6, 7, 24, 25, 26, 27, 28, 29, 30, 31{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 define <2 x double> @shuffle_v2f64(<2 x double> %x, <2 x double> %y) {
   %res = shufflevector <2 x double> %x, <2 x double> %y,
     <2 x i32> <i32 0, i32 3>
   ret <2 x double> %res
 }
 
 ; CHECK-LABEL: shuffle_undef_v2f64:
-; NO-SIMD128-NOT: v8x16
+; NO-SIMD128-NOT: i8x16
 ; SIMD128-NEXT: .functype shuffle_undef_v2f64 (v128, v128) -> (v128){{$}}
-; SIMD128-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
+; SIMD128-NEXT: i8x16.shuffle $push[[R:[0-9]+]]=, $0, $0,
 ; SIMD128-SAME: 8, 9, 10, 11, 12, 13, 14, 15, 0, 0, 0, 0, 0, 0, 0, 0{{$}}
 ; SIMD128-NEXT: return $pop[[R]]{{$}}
 define <2 x double> @shuffle_undef_v2f64(<2 x double> %x, <2 x double> %y) {
   %res = shufflevector <2 x double> %x, <2 x double> %y,
     <2 x i32> <i32 1, i32 undef>
   ret <2 x double> %res
 }
 

llvm/test/MC/Disassembler/WebAssembly/wasm.txt

 
 # Prefix byte example:
 # CHECK: i64.trunc_sat_f64_u
 0xFC 0x07
 
 # CHECK: v128.const 50462976, 117835012, 185207048, 252579084
 0xFD 0x0C 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
 
-# CHECK: v8x16.shuffle 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
+# CHECK: i8x16.shuffle 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
 0xFD 0x0D 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
 
 # Check LEB128 encoding of SIMD instructions
 # CHECK: i16x8.all_true
 0xFD 0x83 0x01
 
 # Including non-canonical LEB128 encodings
 # CHECK: i16x8.any_true

llvm/test/MC/WebAssembly/simd-encodings.s

main:
     i32x4.load16x4_u 32
 
     # CHECK: i64x2.load32x2_s 32 # encoding: [0xfd,0x05,0x03,0x20]
     i64x2.load32x2_s 32
 
     # CHECK: i64x2.load32x2_u 32 # encoding: [0xfd,0x06,0x03,0x20]
     i64x2.load32x2_u 32
 
-    # CHECK: v8x16.load_splat 48 # encoding: [0xfd,0x07,0x00,0x30]
-    v8x16.load_splat 48
+    # CHECK: v128.load8_splat 48 # encoding: [0xfd,0x07,0x00,0x30]
+    v128.load8_splat 48
 
-    # CHECK: v16x8.load_splat 48 # encoding: [0xfd,0x08,0x01,0x30]
-    v16x8.load_splat 48
+    # CHECK: v128.load16_splat 48 # encoding: [0xfd,0x08,0x01,0x30]
+    v128.load16_splat 48
 
-    # CHECK: v32x4.load_splat 48 # encoding: [0xfd,0x09,0x02,0x30]
-    v32x4.load_splat 48
+    # CHECK: v128.load32_splat 48 # encoding: [0xfd,0x09,0x02,0x30]
+    v128.load32_splat 48
 
-    # CHECK: v64x2.load_splat 48 # encoding: [0xfd,0x0a,0x03,0x30]
-    v64x2.load_splat 48
+    # CHECK: v128.load64_splat 48 # encoding: [0xfd,0x0a,0x03,0x30]
+    v128.load64_splat 48
 
     # CHECK: v128.store 48 # encoding: [0xfd,0x0b,0x04,0x30]
     v128.store 48
 
     # CHECK: v128.const 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
     # CHECK-SAME: # encoding: [0xfd,0x0c,
     # CHECK-SAME: 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
     # CHECK-SAME: 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f]
main:
     v128.const 0x1.0402p-121, 0x1.0c0a08p-113, 0x1.14121p-105, 0x1.1c1a18p-97
 
     # CHECK: v128.const 0x1.60504030201p-911, 0x1.e0d0c0b0a0908p-783
     # CHECK-SAME: # encoding: [0xfd,0x0c,
     # CHECK-SAME: 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,
     # CHECK-SAME: 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f]
     v128.const 0x1.60504030201p-911, 0x1.e0d0c0b0a0908p-783
 
-    # CHECK: v8x16.shuffle 0, 17, 2, 19, 4, 21, 6, 23,
+    # CHECK: i8x16.shuffle 0, 17, 2, 19, 4, 21, 6, 23,
     # CHECK-SAME:          8, 25, 10, 27, 12, 29, 14, 31
     # CHECK-SAME: # encoding: [0xfd,0x0d,
     # CHECK-SAME: 0x00,0x11,0x02,0x13,0x04,0x15,0x06,0x17,
     # CHECK-SAME: 0x08,0x19,0x0a,0x1b,0x0c,0x1d,0x0e,0x1f]
-    v8x16.shuffle 0, 17, 2, 19, 4, 21, 6, 23, 8, 25, 10, 27, 12, 29, 14, 31
+    i8x16.shuffle 0, 17, 2, 19, 4, 21, 6, 23, 8, 25, 10, 27, 12, 29, 14, 31
 
-    # CHECK: v8x16.swizzle # encoding: [0xfd,0x0e]
-    v8x16.swizzle
+    # CHECK: i8x16.swizzle # encoding: [0xfd,0x0e]
+    i8x16.swizzle
 
     # CHECK: i8x16.splat # encoding: [0xfd,0x0f]
     i8x16.splat
 
     # CHECK: i16x8.splat # encoding: [0xfd,0x10]
     i16x8.splat
 
     # CHECK: i32x4.splat # encoding: [0xfd,0x11]