[VE] Correct VMP allocation in calling conv

[kaz7]

Summary

VE used to allocate VM1, VM2, VMP2 (VM4+VM5), and VM3. This patch
corrects to allocate VM1, VM2, VMP2 (VM4+VM5), and VM6. Also add
a regression test.

llvm/lib/Target/VE/VECallingConv.td

def CC_VE_Fast : CallingConv<[
 
   // vector mask --> generic vector mask registers
   CCIfType<[v256i1],
            CCAssignToReg<[VM1, VM2, VM3, VM4, VM5, VM6, VM7]>>,
 
   // pair of vector mask --> generic vector mask registers
   CCIfType<[v512i1],
            CCAssignToRegWithShadow<[VMP1, VMP2, VMP3],
-                                   [VM1, VM1, VM3]>>,
+                                   [VM1, VM3, VM5]>>,
 
   // Follow the standard C CC for scalars.
   CCDelegateTo<CC_VE_C>
 ]>;
 
 def RetCC_VE_Fast : CallingConv<[
   // vector --> generic vector registers
   CCIfType<[v256i32, v256f32, v256i64, v256f64],
            CCAssignToReg<[V0, V1, V2, V3, V4, V5, V6, V7]>>,
   // TODO: make this conditional on packed mode
   CCIfType<[v512i32, v512f32],
            CCAssignToReg<[V0, V1, V2, V3, V4, V5, V6, V7]>>,
 
   // vector mask --> generic vector mask registers
   CCIfType<[v256i1],
            CCAssignToReg<[VM1, VM2, VM3, VM4, VM5, VM6, VM7]>>,
 
   // pair of vector mask --> generic vector mask registers
   CCIfType<[v512i1],
            CCAssignToRegWithShadow<[VMP1, VMP2, VMP3],
-                                   [VM1, VM1, VM3]>>,
+                                   [VM1, VM3, VM5]>>,
 
   // Follow the standard C CC for scalars.
   CCDelegateTo<RetCC_VE_C>
 ]>;
 
 // Callee-saved registers
 def CSR : CalleeSavedRegs<(add (sequence "SX%u", 18, 33))>;
 def CSR_NoRegs : CalleeSavedRegs<(add)>;
 
 // PreserveAll (clobbers s62,s63) - used for ve_grow_stack
 def CSR_preserve_all : CalleeSavedRegs<(add (sequence "SX%u", 0, 61),
                                             (sequence "V%u", 0, 63),
                                             (sequence "VM%u", 1, 15))>;

llvm/test/CodeGen/VE/Vector/fastcc_callee.ll

 define fastcc <512 x i1> @vreg_arg_v512i1_vmp3(<512 x i1> %vmp1, <512 x i1> %vmp2, <512 x i1> %vmp3, <512 x i1> %vmp4) {
 ; CHECK-LABEL: vreg_arg_v512i1_vmp3:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    andm %vm2, %vm0, %vm6
 ; CHECK-NEXT:    andm %vm3, %vm0, %vm7
 ; CHECK-NEXT:    b.l.t (, %s10)
   ret <512 x i1> %vmp3
 }
+
+define fastcc <256 x i1> @vmp_cc_bug(<256 x i1> %vm1, <256 x i1> %vm2, <512 x i1> %vmp2, <256 x i1> %vm6) {
+; CHECK-LABEL: vmp_cc_bug:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    andm %vm1, %vm0, %vm6
+; CHECK-NEXT:    b.l.t (, %s10)
+  ret <256 x i1> %vm6
+}