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Differential D92174

[VE] Optimize emitSPAdjustment function
ClosedPublic

Authored by kaz7 on Nov 26 2020, 5:33 AM.

Details

Reviewers
simoll
k-ishizaka
Commits
rG3bd78b7cc00d: [VE] Optimize emitSPAdjustment function
Summary

Optimize emitSPAdjustment function to generate as small as possible
instructions to adjust SP.

Diff Detail

Event Timeline

kaz7 created this revision.Nov 26 2020, 5:33 AM
Herald added subscribers: llvm-commits, hiraditya. · View Herald TranscriptNov 26 2020, 5:33 AM
kaz7 requested review of this revision.Nov 26 2020, 5:33 AM
Harbormaster completed remote builds in B80224: Diff 307844.Nov 26 2020, 6:12 AM
simoll added inline comments.Nov 26 2020, 6:54 AM
llvm/lib/Target/VE/VEFrameLowering.cpp
231

typo: Nothing

232–243

Consider factoring this into a separate "LoadImm" function.

kaz7 added inline comments.Nov 27 2020, 3:37 AM
llvm/lib/Target/VE/VEFrameLowering.cpp
231

Thanks.

232–243

This is "addImmediate" to SP and need to specify clobber register also. I think it is not general instructions as you expected.

kaz7 updated this revision to Diff 308011.Nov 27 2020, 3:37 AM

Correct typo in a comment

Harbormaster completed remote builds in B80330: Diff 308011.Nov 27 2020, 4:19 AM
simoll added inline comments.Nov 27 2020, 5:04 AM
llvm/lib/Target/VE/VEFrameLowering.cpp
232–243

So, you could name it emitAddImm(Reg, Imm). The reason i was asking you to consider this, is that putting this into its own function with a telling name would document what you are doing here and make the functionality reuseable. I imagine there may be other places where we need to emit code to increment a register by a constant.

kaz7 added inline comments.Nov 27 2020, 5:15 AM
llvm/lib/Target/VE/VEFrameLowering.cpp
232–243

As I said, it requires clobber register like S13 in this case. I simply don't understand what you really want. I already named like emitSPAdjustment. Should I change this name to emitAddSPImm or something? Or should I make a new function to handle only isInt<7> and isInt<32> cases? Or should I make a new function to handle all cases? If this function generates really generic instructions, I agree with you. However, this isn't IMHO.

simoll accepted this revision.Nov 27 2020, 6:15 AM

It's about making the code more reusable - this is not a stopper for this patch, however.

llvm/lib/Target/VE/VEFrameLowering.cpp
232–243

You could put all of the cases in a function called:

bool emitAddImm(Register TheReg, Imm TheValue, Register ClobberReg)

That function would fail if the ClobberReg is invalid but required. It returns true if the ClobberReg is valid and had to be used to load the immediate. Else, it returns false and the ClobberReg was not necessary to load the immediate. This would be a reusable function.

This revision is now accepted and ready to land.Nov 27 2020, 6:15 AM
kaz7 added inline comments.Nov 27 2020, 2:35 PM
llvm/lib/Target/VE/VEFrameLowering.cpp
232–243

I think that way, creating such a function, also. However, isn't it more generic and resuable that a function uses createVirtualRegister inside?

I have no idea who want to use a function with clobber register this time. Anyway, I'll make such a function if I find other use of emitAddImmWithClobber.

This revision was landed with ongoing or failed builds.Nov 27 2020, 3:06 PM
Closed by commit rG3bd78b7cc00d: [VE] Optimize emitSPAdjustment function (authored by kaz7). · Explain Why
This revision was automatically updated to reflect the committed changes.
kaz7 added a commit: rG3bd78b7cc00d: [VE] Optimize emitSPAdjustment function.

Revision Contents

PathSize
llvm/
lib/
Target/
VE/
49 lines
test/
CodeGen/
VE/
Scalar/
12 lines
56 lines
48 lines
36 lines
24 lines

Diff 308011

llvm/lib/Target/VE/VEFrameLowering.cpp

Show First 20 Lines • Show All 219 Lines • ▼ Show 20 Lines
} }
void VEFrameLowering::emitSPAdjustment(MachineFunction &MF, void VEFrameLowering::emitSPAdjustment(MachineFunction &MF,
MachineBasicBlock &MBB, MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI, MachineBasicBlock::iterator MBBI,
int64_t NumBytes, int64_t NumBytes,
MaybeAlign MaybeAlign) const { MaybeAlign MaybeAlign) const {
DebugLoc DL; DebugLoc DL;
const VEInstrInfo &TII = const VEInstrInfo &TII = *STI.getInstrInfo();
*static_cast<const VEInstrInfo *>(MF.getSubtarget().getInstrInfo());
if (NumBytes >= -64 && NumBytes < 63) { if (NumBytes == 0) {
// Nothing to do here.
simollUnsubmitted
Not Done
ReplyInline Actions

typo: Nothing

simoll: typo: Nothing
kaz7AuthorUnsubmitted
Done
ReplyInline Actions

Thanks.

kaz7: Thanks.
} else if (isInt<7>(NumBytes)) {
// adds.l %s11, NumBytes@lo, %s11
BuildMI(MBB, MBBI, DL, TII.get(VE::ADDSLri), VE::SX11) BuildMI(MBB, MBBI, DL, TII.get(VE::ADDSLri), VE::SX11)
.addReg(VE::SX11) .addReg(VE::SX11)
.addImm(NumBytes); .addImm(NumBytes);
return; } else if (isInt<32>(NumBytes)) {
} // lea %s11, NumBytes@lo(, %s11)
BuildMI(MBB, MBBI, DL, TII.get(VE::LEArii), VE::SX11)
.addReg(VE::SX11)
.addImm(0)
.addImm(Lo_32(NumBytes));
} else {
simollUnsubmitted
Not Done
ReplyInline Actions

Consider factoring this into a separate "LoadImm" function.

simoll: Consider factoring this into a separate "`LoadImm`" function.
kaz7AuthorUnsubmitted
Done
ReplyInline Actions

This is "addImmediate" to SP and need to specify clobber register also. I think it is not general instructions as you expected.

kaz7: This is "addImmediate" to SP and need to specify clobber register also. I think it is not…
simollUnsubmitted
Not Done
ReplyInline Actions

So, you could name it emitAddImm(Reg, Imm). The reason i was asking you to consider this, is that putting this into its own function with a telling name would document what you are doing here and make the functionality reuseable. I imagine there may be other places where we need to emit code to increment a register by a constant.

simoll: So, you could name it `emitAddImm(Reg, Imm)`. The reason i was asking you to consider this, is…
kaz7AuthorUnsubmitted
Done
ReplyInline Actions

As I said, it requires clobber register like S13 in this case. I simply don't understand what you really want. I already named like emitSPAdjustment. Should I change this name to emitAddSPImm or something? Or should I make a new function to handle only isInt<7> and isInt<32> cases? Or should I make a new function to handle all cases? If this function generates really generic instructions, I agree with you. However, this isn't IMHO.

kaz7: As I said, it requires clobber register like S13 in this case. I simply don't understand what…
simollUnsubmitted
Not Done
ReplyInline Actions

You could put all of the cases in a function called:

bool emitAddImm(Register TheReg, Imm TheValue, Register ClobberReg)

That function would fail if the ClobberReg is invalid but required. It returns true if the ClobberReg is valid and had to be used to load the immediate. Else, it returns false and the ClobberReg was not necessary to load the immediate. This would be a reusable function.

simoll: You could put all of the cases in a function called: bool emitAddImm(Register TheReg, Imm…
kaz7AuthorUnsubmitted
Done
ReplyInline Actions

I think that way, creating such a function, also. However, isn't it more generic and resuable that a function uses createVirtualRegister inside?

I have no idea who want to use a function with clobber register this time. Anyway, I'll make such a function if I find other use of emitAddImmWithClobber.

kaz7: I think that way, creating such a function, also. However, isn't it more generic and resuable…
// Emit following codes. This clobbers SX13 which we always know is // Emit following codes. This clobbers SX13 which we always know is
// available here. // available here.
// lea %s13,%lo(NumBytes) // lea %s13, NumBytes@lo
// and %s13,%s13,(32)0 // and %s13, %s13, (32)0
// lea.sl %sp,%hi(NumBytes)(%sp, %s13) // lea.sl %sp, NumBytes@hi(%s13, %sp)
BuildMI(MBB, MBBI, DL, TII.get(VE::LEAzii), VE::SX13) BuildMI(MBB, MBBI, DL, TII.get(VE::LEAzii), VE::SX13)
.addImm(0) .addImm(0)
.addImm(0) .addImm(0)
.addImm(Lo_32(NumBytes)); .addImm(Lo_32(NumBytes));
BuildMI(MBB, MBBI, DL, TII.get(VE::ANDrm), VE::SX13) BuildMI(MBB, MBBI, DL, TII.get(VE::ANDrm), VE::SX13)
.addReg(VE::SX13) .addReg(VE::SX13)
.addImm(M0(32)); .addImm(M0(32));
BuildMI(MBB, MBBI, DL, TII.get(VE::LEASLrri), VE::SX11) BuildMI(MBB, MBBI, DL, TII.get(VE::LEASLrri), VE::SX11)
.addReg(VE::SX11) .addReg(VE::SX11)
.addReg(VE::SX13) .addReg(VE::SX13)
.addImm(Hi_32(NumBytes)); .addImm(Hi_32(NumBytes));
}
if (MaybeAlign) { if (MaybeAlign) {
// and %sp, %sp, Align-1 // and %sp, %sp, Align-1
BuildMI(MBB, MBBI, DL, TII.get(VE::ANDrm), VE::SX11) BuildMI(MBB, MBBI, DL, TII.get(VE::ANDrm), VE::SX11)
.addReg(VE::SX11) .addReg(VE::SX11)
.addImm(M1(64 - Log2_64(MaybeAlign.valueOrOne().value()))); .addImm(M1(64 - Log2_64(MaybeAlign.valueOrOne().value())));
} }
} }
▲ Show 20 Lines • Show All 214 Lines • Show Last 20 Lines

llvm/test/CodeGen/VE/Scalar/function_prologue_epilogue.ll

Show All 27 Lines
; ;
; PIC-LABEL: func_gv: ; PIC-LABEL: func_gv:
; PIC: # %bb.0: ; PIC: # %bb.0:
; PIC-NEXT: st %s9, (, %s11) ; PIC-NEXT: st %s9, (, %s11)
; PIC-NEXT: st %s10, 8(, %s11) ; PIC-NEXT: st %s10, 8(, %s11)
; PIC-NEXT: st %s15, 24(, %s11) ; PIC-NEXT: st %s15, 24(, %s11)
; PIC-NEXT: st %s16, 32(, %s11) ; PIC-NEXT: st %s16, 32(, %s11)
; PIC-NEXT: or %s9, 0, %s11 ; PIC-NEXT: or %s9, 0, %s11
; PIC-NEXT: lea %s13, -176 ; PIC-NEXT: lea %s11, -176(, %s11)
; PIC-NEXT: and %s13, %s13, (32)0
; PIC-NEXT: lea.sl %s11, -1(%s13, %s11)
; PIC-NEXT: brge.l.t %s11, %s8, .LBB1_2 ; PIC-NEXT: brge.l.t %s11, %s8, .LBB1_2
; PIC-NEXT: # %bb.1: ; PIC-NEXT: # %bb.1:
; PIC-NEXT: ld %s61, 24(, %s14) ; PIC-NEXT: ld %s61, 24(, %s14)
; PIC-NEXT: or %s62, 0, %s0 ; PIC-NEXT: or %s62, 0, %s0
; PIC-NEXT: lea %s63, 315 ; PIC-NEXT: lea %s63, 315
; PIC-NEXT: shm.l %s63, (%s61) ; PIC-NEXT: shm.l %s63, (%s61)
; PIC-NEXT: shm.l %s8, 8(%s61) ; PIC-NEXT: shm.l %s8, 8(%s61)
; PIC-NEXT: shm.l %s11, 16(%s61) ; PIC-NEXT: shm.l %s11, 16(%s61)
Show All 23 Lines
define i32 @func_alloca(i32 signext %0) { define i32 @func_alloca(i32 signext %0) {
; CHECK-LABEL: func_alloca: ; CHECK-LABEL: func_alloca:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: st %s9, (, %s11) ; CHECK-NEXT: st %s9, (, %s11)
; CHECK-NEXT: st %s10, 8(, %s11) ; CHECK-NEXT: st %s10, 8(, %s11)
; CHECK-NEXT: st %s15, 24(, %s11) ; CHECK-NEXT: st %s15, 24(, %s11)
; CHECK-NEXT: st %s16, 32(, %s11) ; CHECK-NEXT: st %s16, 32(, %s11)
; CHECK-NEXT: or %s9, 0, %s11 ; CHECK-NEXT: or %s9, 0, %s11
; CHECK-NEXT: lea %s13, -192 ; CHECK-NEXT: lea %s11, -192(, %s11)
; CHECK-NEXT: and %s13, %s13, (32)0
; CHECK-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECK-NEXT: brge.l.t %s11, %s8, .LBB2_2 ; CHECK-NEXT: brge.l.t %s11, %s8, .LBB2_2
; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: ld %s61, 24(, %s14) ; CHECK-NEXT: ld %s61, 24(, %s14)
; CHECK-NEXT: or %s62, 0, %s0 ; CHECK-NEXT: or %s62, 0, %s0
; CHECK-NEXT: lea %s63, 315 ; CHECK-NEXT: lea %s63, 315
; CHECK-NEXT: shm.l %s63, (%s61) ; CHECK-NEXT: shm.l %s63, (%s61)
; CHECK-NEXT: shm.l %s8, 8(%s61) ; CHECK-NEXT: shm.l %s8, 8(%s61)
; CHECK-NEXT: shm.l %s11, 16(%s61) ; CHECK-NEXT: shm.l %s11, 16(%s61)
Show All 10 Lines
; ;
; PIC-LABEL: func_alloca: ; PIC-LABEL: func_alloca:
; PIC: # %bb.0: ; PIC: # %bb.0:
; PIC-NEXT: st %s9, (, %s11) ; PIC-NEXT: st %s9, (, %s11)
; PIC-NEXT: st %s10, 8(, %s11) ; PIC-NEXT: st %s10, 8(, %s11)
; PIC-NEXT: st %s15, 24(, %s11) ; PIC-NEXT: st %s15, 24(, %s11)
; PIC-NEXT: st %s16, 32(, %s11) ; PIC-NEXT: st %s16, 32(, %s11)
; PIC-NEXT: or %s9, 0, %s11 ; PIC-NEXT: or %s9, 0, %s11
; PIC-NEXT: lea %s13, -192 ; PIC-NEXT: lea %s11, -192(, %s11)
; PIC-NEXT: and %s13, %s13, (32)0
; PIC-NEXT: lea.sl %s11, -1(%s13, %s11)
; PIC-NEXT: brge.l.t %s11, %s8, .LBB2_2 ; PIC-NEXT: brge.l.t %s11, %s8, .LBB2_2
; PIC-NEXT: # %bb.1: ; PIC-NEXT: # %bb.1:
; PIC-NEXT: ld %s61, 24(, %s14) ; PIC-NEXT: ld %s61, 24(, %s14)
; PIC-NEXT: or %s62, 0, %s0 ; PIC-NEXT: or %s62, 0, %s0
; PIC-NEXT: lea %s63, 315 ; PIC-NEXT: lea %s63, 315
; PIC-NEXT: shm.l %s63, (%s61) ; PIC-NEXT: shm.l %s63, (%s61)
; PIC-NEXT: shm.l %s8, 8(%s61) ; PIC-NEXT: shm.l %s8, 8(%s61)
; PIC-NEXT: shm.l %s11, 16(%s61) ; PIC-NEXT: shm.l %s11, 16(%s61)
Show All 15 Lines

llvm/test/CodeGen/VE/Scalar/stackframe_align.ll

Show All 11 Lines
define i8* @test_frame7(i8* %0) { define i8* @test_frame7(i8* %0) {
; CHECK-LABEL: test_frame7: ; CHECK-LABEL: test_frame7:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: st %s9, (, %s11) ; CHECK-NEXT: st %s9, (, %s11)
; CHECK-NEXT: st %s10, 8(, %s11) ; CHECK-NEXT: st %s10, 8(, %s11)
; CHECK-NEXT: st %s15, 24(, %s11) ; CHECK-NEXT: st %s15, 24(, %s11)
; CHECK-NEXT: st %s16, 32(, %s11) ; CHECK-NEXT: st %s16, 32(, %s11)
; CHECK-NEXT: or %s9, 0, %s11 ; CHECK-NEXT: or %s9, 0, %s11
; CHECK-NEXT: lea %s13, -192 ; CHECK-NEXT: lea %s11, -192(, %s11)
; CHECK-NEXT: and %s13, %s13, (32)0
; CHECK-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECK-NEXT: brge.l.t %s11, %s8, .LBB0_2 ; CHECK-NEXT: brge.l.t %s11, %s8, .LBB0_2
; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: ld %s61, 24(, %s14) ; CHECK-NEXT: ld %s61, 24(, %s14)
; CHECK-NEXT: or %s62, 0, %s0 ; CHECK-NEXT: or %s62, 0, %s0
; CHECK-NEXT: lea %s63, 315 ; CHECK-NEXT: lea %s63, 315
; CHECK-NEXT: shm.l %s63, (%s61) ; CHECK-NEXT: shm.l %s63, (%s61)
; CHECK-NEXT: shm.l %s8, 8(%s61) ; CHECK-NEXT: shm.l %s8, 8(%s61)
; CHECK-NEXT: shm.l %s11, 16(%s61) ; CHECK-NEXT: shm.l %s11, 16(%s61)
Show All 12 Lines
; ;
; CHECKFP-LABEL: test_frame7: ; CHECKFP-LABEL: test_frame7:
; CHECKFP: # %bb.0: ; CHECKFP: # %bb.0:
; CHECKFP-NEXT: st %s9, (, %s11) ; CHECKFP-NEXT: st %s9, (, %s11)
; CHECKFP-NEXT: st %s10, 8(, %s11) ; CHECKFP-NEXT: st %s10, 8(, %s11)
; CHECKFP-NEXT: st %s15, 24(, %s11) ; CHECKFP-NEXT: st %s15, 24(, %s11)
; CHECKFP-NEXT: st %s16, 32(, %s11) ; CHECKFP-NEXT: st %s16, 32(, %s11)
; CHECKFP-NEXT: or %s9, 0, %s11 ; CHECKFP-NEXT: or %s9, 0, %s11
; CHECKFP-NEXT: lea %s13, -192 ; CHECKFP-NEXT: lea %s11, -192(, %s11)
; CHECKFP-NEXT: and %s13, %s13, (32)0
; CHECKFP-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECKFP-NEXT: brge.l.t %s11, %s8, .LBB0_2 ; CHECKFP-NEXT: brge.l.t %s11, %s8, .LBB0_2
; CHECKFP-NEXT: # %bb.1: ; CHECKFP-NEXT: # %bb.1:
; CHECKFP-NEXT: ld %s61, 24(, %s14) ; CHECKFP-NEXT: ld %s61, 24(, %s14)
; CHECKFP-NEXT: or %s62, 0, %s0 ; CHECKFP-NEXT: or %s62, 0, %s0
; CHECKFP-NEXT: lea %s63, 315 ; CHECKFP-NEXT: lea %s63, 315
; CHECKFP-NEXT: shm.l %s63, (%s61) ; CHECKFP-NEXT: shm.l %s63, (%s61)
; CHECKFP-NEXT: shm.l %s8, 8(%s61) ; CHECKFP-NEXT: shm.l %s8, 8(%s61)
; CHECKFP-NEXT: shm.l %s11, 16(%s61) ; CHECKFP-NEXT: shm.l %s11, 16(%s61)
Show All 23 Lines
define i8* @test_frame7_align8(i8* %0) { define i8* @test_frame7_align8(i8* %0) {
; CHECK-LABEL: test_frame7_align8: ; CHECK-LABEL: test_frame7_align8:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: st %s9, (, %s11) ; CHECK-NEXT: st %s9, (, %s11)
; CHECK-NEXT: st %s10, 8(, %s11) ; CHECK-NEXT: st %s10, 8(, %s11)
; CHECK-NEXT: st %s15, 24(, %s11) ; CHECK-NEXT: st %s15, 24(, %s11)
; CHECK-NEXT: st %s16, 32(, %s11) ; CHECK-NEXT: st %s16, 32(, %s11)
; CHECK-NEXT: or %s9, 0, %s11 ; CHECK-NEXT: or %s9, 0, %s11
; CHECK-NEXT: lea %s13, -192 ; CHECK-NEXT: lea %s11, -192(, %s11)
; CHECK-NEXT: and %s13, %s13, (32)0
; CHECK-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECK-NEXT: brge.l.t %s11, %s8, .LBB1_2 ; CHECK-NEXT: brge.l.t %s11, %s8, .LBB1_2
; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: ld %s61, 24(, %s14) ; CHECK-NEXT: ld %s61, 24(, %s14)
; CHECK-NEXT: or %s62, 0, %s0 ; CHECK-NEXT: or %s62, 0, %s0
; CHECK-NEXT: lea %s63, 315 ; CHECK-NEXT: lea %s63, 315
; CHECK-NEXT: shm.l %s63, (%s61) ; CHECK-NEXT: shm.l %s63, (%s61)
; CHECK-NEXT: shm.l %s8, 8(%s61) ; CHECK-NEXT: shm.l %s8, 8(%s61)
; CHECK-NEXT: shm.l %s11, 16(%s61) ; CHECK-NEXT: shm.l %s11, 16(%s61)
Show All 12 Lines
; ;
; CHECKFP-LABEL: test_frame7_align8: ; CHECKFP-LABEL: test_frame7_align8:
; CHECKFP: # %bb.0: ; CHECKFP: # %bb.0:
; CHECKFP-NEXT: st %s9, (, %s11) ; CHECKFP-NEXT: st %s9, (, %s11)
; CHECKFP-NEXT: st %s10, 8(, %s11) ; CHECKFP-NEXT: st %s10, 8(, %s11)
; CHECKFP-NEXT: st %s15, 24(, %s11) ; CHECKFP-NEXT: st %s15, 24(, %s11)
; CHECKFP-NEXT: st %s16, 32(, %s11) ; CHECKFP-NEXT: st %s16, 32(, %s11)
; CHECKFP-NEXT: or %s9, 0, %s11 ; CHECKFP-NEXT: or %s9, 0, %s11
; CHECKFP-NEXT: lea %s13, -192 ; CHECKFP-NEXT: lea %s11, -192(, %s11)
; CHECKFP-NEXT: and %s13, %s13, (32)0
; CHECKFP-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECKFP-NEXT: brge.l.t %s11, %s8, .LBB1_2 ; CHECKFP-NEXT: brge.l.t %s11, %s8, .LBB1_2
; CHECKFP-NEXT: # %bb.1: ; CHECKFP-NEXT: # %bb.1:
; CHECKFP-NEXT: ld %s61, 24(, %s14) ; CHECKFP-NEXT: ld %s61, 24(, %s14)
; CHECKFP-NEXT: or %s62, 0, %s0 ; CHECKFP-NEXT: or %s62, 0, %s0
; CHECKFP-NEXT: lea %s63, 315 ; CHECKFP-NEXT: lea %s63, 315
; CHECKFP-NEXT: shm.l %s63, (%s61) ; CHECKFP-NEXT: shm.l %s63, (%s61)
; CHECKFP-NEXT: shm.l %s8, 8(%s61) ; CHECKFP-NEXT: shm.l %s8, 8(%s61)
; CHECKFP-NEXT: shm.l %s11, 16(%s61) ; CHECKFP-NEXT: shm.l %s11, 16(%s61)
Show All 23 Lines
define i8* @test_frame16_align16(i8* %0) { define i8* @test_frame16_align16(i8* %0) {
; CHECK-LABEL: test_frame16_align16: ; CHECK-LABEL: test_frame16_align16:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: st %s9, (, %s11) ; CHECK-NEXT: st %s9, (, %s11)
; CHECK-NEXT: st %s10, 8(, %s11) ; CHECK-NEXT: st %s10, 8(, %s11)
; CHECK-NEXT: st %s15, 24(, %s11) ; CHECK-NEXT: st %s15, 24(, %s11)
; CHECK-NEXT: st %s16, 32(, %s11) ; CHECK-NEXT: st %s16, 32(, %s11)
; CHECK-NEXT: or %s9, 0, %s11 ; CHECK-NEXT: or %s9, 0, %s11
; CHECK-NEXT: lea %s13, -192 ; CHECK-NEXT: lea %s11, -192(, %s11)
; CHECK-NEXT: and %s13, %s13, (32)0
; CHECK-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECK-NEXT: brge.l.t %s11, %s8, .LBB2_2 ; CHECK-NEXT: brge.l.t %s11, %s8, .LBB2_2
; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: ld %s61, 24(, %s14) ; CHECK-NEXT: ld %s61, 24(, %s14)
; CHECK-NEXT: or %s62, 0, %s0 ; CHECK-NEXT: or %s62, 0, %s0
; CHECK-NEXT: lea %s63, 315 ; CHECK-NEXT: lea %s63, 315
; CHECK-NEXT: shm.l %s63, (%s61) ; CHECK-NEXT: shm.l %s63, (%s61)
; CHECK-NEXT: shm.l %s8, 8(%s61) ; CHECK-NEXT: shm.l %s8, 8(%s61)
; CHECK-NEXT: shm.l %s11, 16(%s61) ; CHECK-NEXT: shm.l %s11, 16(%s61)
Show All 12 Lines
; ;
; CHECKFP-LABEL: test_frame16_align16: ; CHECKFP-LABEL: test_frame16_align16:
; CHECKFP: # %bb.0: ; CHECKFP: # %bb.0:
; CHECKFP-NEXT: st %s9, (, %s11) ; CHECKFP-NEXT: st %s9, (, %s11)
; CHECKFP-NEXT: st %s10, 8(, %s11) ; CHECKFP-NEXT: st %s10, 8(, %s11)
; CHECKFP-NEXT: st %s15, 24(, %s11) ; CHECKFP-NEXT: st %s15, 24(, %s11)
; CHECKFP-NEXT: st %s16, 32(, %s11) ; CHECKFP-NEXT: st %s16, 32(, %s11)
; CHECKFP-NEXT: or %s9, 0, %s11 ; CHECKFP-NEXT: or %s9, 0, %s11
; CHECKFP-NEXT: lea %s13, -192 ; CHECKFP-NEXT: lea %s11, -192(, %s11)
; CHECKFP-NEXT: and %s13, %s13, (32)0
; CHECKFP-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECKFP-NEXT: brge.l.t %s11, %s8, .LBB2_2 ; CHECKFP-NEXT: brge.l.t %s11, %s8, .LBB2_2
; CHECKFP-NEXT: # %bb.1: ; CHECKFP-NEXT: # %bb.1:
; CHECKFP-NEXT: ld %s61, 24(, %s14) ; CHECKFP-NEXT: ld %s61, 24(, %s14)
; CHECKFP-NEXT: or %s62, 0, %s0 ; CHECKFP-NEXT: or %s62, 0, %s0
; CHECKFP-NEXT: lea %s63, 315 ; CHECKFP-NEXT: lea %s63, 315
; CHECKFP-NEXT: shm.l %s63, (%s61) ; CHECKFP-NEXT: shm.l %s63, (%s61)
; CHECKFP-NEXT: shm.l %s8, 8(%s61) ; CHECKFP-NEXT: shm.l %s8, 8(%s61)
; CHECKFP-NEXT: shm.l %s11, 16(%s61) ; CHECKFP-NEXT: shm.l %s11, 16(%s61)
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define i8* @test_frame16_align32(i8* %0) { define i8* @test_frame16_align32(i8* %0) {
; CHECK-LABEL: test_frame16_align32: ; CHECK-LABEL: test_frame16_align32:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: st %s9, (, %s11) ; CHECK-NEXT: st %s9, (, %s11)
; CHECK-NEXT: st %s10, 8(, %s11) ; CHECK-NEXT: st %s10, 8(, %s11)
; CHECK-NEXT: st %s15, 24(, %s11) ; CHECK-NEXT: st %s15, 24(, %s11)
; CHECK-NEXT: st %s16, 32(, %s11) ; CHECK-NEXT: st %s16, 32(, %s11)
; CHECK-NEXT: or %s9, 0, %s11 ; CHECK-NEXT: or %s9, 0, %s11
; CHECK-NEXT: lea %s13, -224 ; CHECK-NEXT: lea %s11, -224(, %s11)
; CHECK-NEXT: and %s13, %s13, (32)0
; CHECK-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECK-NEXT: and %s11, %s11, (59)1 ; CHECK-NEXT: and %s11, %s11, (59)1
; CHECK-NEXT: brge.l.t %s11, %s8, .LBB3_2 ; CHECK-NEXT: brge.l.t %s11, %s8, .LBB3_2
; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: ld %s61, 24(, %s14) ; CHECK-NEXT: ld %s61, 24(, %s14)
; CHECK-NEXT: or %s62, 0, %s0 ; CHECK-NEXT: or %s62, 0, %s0
; CHECK-NEXT: lea %s63, 315 ; CHECK-NEXT: lea %s63, 315
; CHECK-NEXT: shm.l %s63, (%s61) ; CHECK-NEXT: shm.l %s63, (%s61)
; CHECK-NEXT: shm.l %s8, 8(%s61) ; CHECK-NEXT: shm.l %s8, 8(%s61)
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; ;
; CHECKFP-LABEL: test_frame16_align32: ; CHECKFP-LABEL: test_frame16_align32:
; CHECKFP: # %bb.0: ; CHECKFP: # %bb.0:
; CHECKFP-NEXT: st %s9, (, %s11) ; CHECKFP-NEXT: st %s9, (, %s11)
; CHECKFP-NEXT: st %s10, 8(, %s11) ; CHECKFP-NEXT: st %s10, 8(, %s11)
; CHECKFP-NEXT: st %s15, 24(, %s11) ; CHECKFP-NEXT: st %s15, 24(, %s11)
; CHECKFP-NEXT: st %s16, 32(, %s11) ; CHECKFP-NEXT: st %s16, 32(, %s11)
; CHECKFP-NEXT: or %s9, 0, %s11 ; CHECKFP-NEXT: or %s9, 0, %s11
; CHECKFP-NEXT: lea %s13, -224 ; CHECKFP-NEXT: lea %s11, -224(, %s11)
; CHECKFP-NEXT: and %s13, %s13, (32)0
; CHECKFP-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECKFP-NEXT: and %s11, %s11, (59)1 ; CHECKFP-NEXT: and %s11, %s11, (59)1
; CHECKFP-NEXT: brge.l.t %s11, %s8, .LBB3_2 ; CHECKFP-NEXT: brge.l.t %s11, %s8, .LBB3_2
; CHECKFP-NEXT: # %bb.1: ; CHECKFP-NEXT: # %bb.1:
; CHECKFP-NEXT: ld %s61, 24(, %s14) ; CHECKFP-NEXT: ld %s61, 24(, %s14)
; CHECKFP-NEXT: or %s62, 0, %s0 ; CHECKFP-NEXT: or %s62, 0, %s0
; CHECKFP-NEXT: lea %s63, 315 ; CHECKFP-NEXT: lea %s63, 315
; CHECKFP-NEXT: shm.l %s63, (%s61) ; CHECKFP-NEXT: shm.l %s63, (%s61)
; CHECKFP-NEXT: shm.l %s8, 8(%s61) ; CHECKFP-NEXT: shm.l %s8, 8(%s61)
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define i8* @test_frame32_align32(i8* %0) { define i8* @test_frame32_align32(i8* %0) {
; CHECK-LABEL: test_frame32_align32: ; CHECK-LABEL: test_frame32_align32:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: st %s9, (, %s11) ; CHECK-NEXT: st %s9, (, %s11)
; CHECK-NEXT: st %s10, 8(, %s11) ; CHECK-NEXT: st %s10, 8(, %s11)
; CHECK-NEXT: st %s15, 24(, %s11) ; CHECK-NEXT: st %s15, 24(, %s11)
; CHECK-NEXT: st %s16, 32(, %s11) ; CHECK-NEXT: st %s16, 32(, %s11)
; CHECK-NEXT: or %s9, 0, %s11 ; CHECK-NEXT: or %s9, 0, %s11
; CHECK-NEXT: lea %s13, -224 ; CHECK-NEXT: lea %s11, -224(, %s11)
; CHECK-NEXT: and %s13, %s13, (32)0
; CHECK-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECK-NEXT: and %s11, %s11, (59)1 ; CHECK-NEXT: and %s11, %s11, (59)1
; CHECK-NEXT: brge.l.t %s11, %s8, .LBB4_2 ; CHECK-NEXT: brge.l.t %s11, %s8, .LBB4_2
; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: ld %s61, 24(, %s14) ; CHECK-NEXT: ld %s61, 24(, %s14)
; CHECK-NEXT: or %s62, 0, %s0 ; CHECK-NEXT: or %s62, 0, %s0
; CHECK-NEXT: lea %s63, 315 ; CHECK-NEXT: lea %s63, 315
; CHECK-NEXT: shm.l %s63, (%s61) ; CHECK-NEXT: shm.l %s63, (%s61)
; CHECK-NEXT: shm.l %s8, 8(%s61) ; CHECK-NEXT: shm.l %s8, 8(%s61)
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; ;
; CHECKFP-LABEL: test_frame32_align32: ; CHECKFP-LABEL: test_frame32_align32:
; CHECKFP: # %bb.0: ; CHECKFP: # %bb.0:
; CHECKFP-NEXT: st %s9, (, %s11) ; CHECKFP-NEXT: st %s9, (, %s11)
; CHECKFP-NEXT: st %s10, 8(, %s11) ; CHECKFP-NEXT: st %s10, 8(, %s11)
; CHECKFP-NEXT: st %s15, 24(, %s11) ; CHECKFP-NEXT: st %s15, 24(, %s11)
; CHECKFP-NEXT: st %s16, 32(, %s11) ; CHECKFP-NEXT: st %s16, 32(, %s11)
; CHECKFP-NEXT: or %s9, 0, %s11 ; CHECKFP-NEXT: or %s9, 0, %s11
; CHECKFP-NEXT: lea %s13, -224 ; CHECKFP-NEXT: lea %s11, -224(, %s11)
; CHECKFP-NEXT: and %s13, %s13, (32)0
; CHECKFP-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECKFP-NEXT: and %s11, %s11, (59)1 ; CHECKFP-NEXT: and %s11, %s11, (59)1
; CHECKFP-NEXT: brge.l.t %s11, %s8, .LBB4_2 ; CHECKFP-NEXT: brge.l.t %s11, %s8, .LBB4_2
; CHECKFP-NEXT: # %bb.1: ; CHECKFP-NEXT: # %bb.1:
; CHECKFP-NEXT: ld %s61, 24(, %s14) ; CHECKFP-NEXT: ld %s61, 24(, %s14)
; CHECKFP-NEXT: or %s62, 0, %s0 ; CHECKFP-NEXT: or %s62, 0, %s0
; CHECKFP-NEXT: lea %s63, 315 ; CHECKFP-NEXT: lea %s63, 315
; CHECKFP-NEXT: shm.l %s63, (%s61) ; CHECKFP-NEXT: shm.l %s63, (%s61)
; CHECKFP-NEXT: shm.l %s8, 8(%s61) ; CHECKFP-NEXT: shm.l %s8, 8(%s61)
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define i8* @test_frame_dynalign16(i8* %0, i64 %1) { define i8* @test_frame_dynalign16(i8* %0, i64 %1) {
; CHECK-LABEL: test_frame_dynalign16: ; CHECK-LABEL: test_frame_dynalign16:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: st %s9, (, %s11) ; CHECK-NEXT: st %s9, (, %s11)
; CHECK-NEXT: st %s10, 8(, %s11) ; CHECK-NEXT: st %s10, 8(, %s11)
; CHECK-NEXT: st %s15, 24(, %s11) ; CHECK-NEXT: st %s15, 24(, %s11)
; CHECK-NEXT: st %s16, 32(, %s11) ; CHECK-NEXT: st %s16, 32(, %s11)
; CHECK-NEXT: or %s9, 0, %s11 ; CHECK-NEXT: or %s9, 0, %s11
; CHECK-NEXT: lea %s13, -240 ; CHECK-NEXT: lea %s11, -240(, %s11)
; CHECK-NEXT: and %s13, %s13, (32)0
; CHECK-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECK-NEXT: brge.l.t %s11, %s8, .LBB5_2 ; CHECK-NEXT: brge.l.t %s11, %s8, .LBB5_2
; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: ld %s61, 24(, %s14) ; CHECK-NEXT: ld %s61, 24(, %s14)
; CHECK-NEXT: or %s62, 0, %s0 ; CHECK-NEXT: or %s62, 0, %s0
; CHECK-NEXT: lea %s63, 315 ; CHECK-NEXT: lea %s63, 315
; CHECK-NEXT: shm.l %s63, (%s61) ; CHECK-NEXT: shm.l %s63, (%s61)
; CHECK-NEXT: shm.l %s8, 8(%s61) ; CHECK-NEXT: shm.l %s8, 8(%s61)
; CHECK-NEXT: shm.l %s11, 16(%s61) ; CHECK-NEXT: shm.l %s11, 16(%s61)
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; ;
; CHECKFP-LABEL: test_frame_dynalign16: ; CHECKFP-LABEL: test_frame_dynalign16:
; CHECKFP: # %bb.0: ; CHECKFP: # %bb.0:
; CHECKFP-NEXT: st %s9, (, %s11) ; CHECKFP-NEXT: st %s9, (, %s11)
; CHECKFP-NEXT: st %s10, 8(, %s11) ; CHECKFP-NEXT: st %s10, 8(, %s11)
; CHECKFP-NEXT: st %s15, 24(, %s11) ; CHECKFP-NEXT: st %s15, 24(, %s11)
; CHECKFP-NEXT: st %s16, 32(, %s11) ; CHECKFP-NEXT: st %s16, 32(, %s11)
; CHECKFP-NEXT: or %s9, 0, %s11 ; CHECKFP-NEXT: or %s9, 0, %s11
; CHECKFP-NEXT: lea %s13, -240 ; CHECKFP-NEXT: lea %s11, -240(, %s11)
; CHECKFP-NEXT: and %s13, %s13, (32)0
; CHECKFP-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECKFP-NEXT: brge.l.t %s11, %s8, .LBB5_2 ; CHECKFP-NEXT: brge.l.t %s11, %s8, .LBB5_2
; CHECKFP-NEXT: # %bb.1: ; CHECKFP-NEXT: # %bb.1:
; CHECKFP-NEXT: ld %s61, 24(, %s14) ; CHECKFP-NEXT: ld %s61, 24(, %s14)
; CHECKFP-NEXT: or %s62, 0, %s0 ; CHECKFP-NEXT: or %s62, 0, %s0
; CHECKFP-NEXT: lea %s63, 315 ; CHECKFP-NEXT: lea %s63, 315
; CHECKFP-NEXT: shm.l %s63, (%s61) ; CHECKFP-NEXT: shm.l %s63, (%s61)
; CHECKFP-NEXT: shm.l %s8, 8(%s61) ; CHECKFP-NEXT: shm.l %s8, 8(%s61)
; CHECKFP-NEXT: shm.l %s11, 16(%s61) ; CHECKFP-NEXT: shm.l %s11, 16(%s61)
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; CHECK-LABEL: test_frame16_align16_dynalign32: ; CHECK-LABEL: test_frame16_align16_dynalign32:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: st %s9, (, %s11) ; CHECK-NEXT: st %s9, (, %s11)
; CHECK-NEXT: st %s10, 8(, %s11) ; CHECK-NEXT: st %s10, 8(, %s11)
; CHECK-NEXT: st %s15, 24(, %s11) ; CHECK-NEXT: st %s15, 24(, %s11)
; CHECK-NEXT: st %s16, 32(, %s11) ; CHECK-NEXT: st %s16, 32(, %s11)
; CHECK-NEXT: st %s17, 40(, %s11) ; CHECK-NEXT: st %s17, 40(, %s11)
; CHECK-NEXT: or %s9, 0, %s11 ; CHECK-NEXT: or %s9, 0, %s11
; CHECK-NEXT: lea %s13, -288 ; CHECK-NEXT: lea %s11, -288(, %s11)
; CHECK-NEXT: and %s13, %s13, (32)0
; CHECK-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECK-NEXT: and %s11, %s11, (59)1 ; CHECK-NEXT: and %s11, %s11, (59)1
; CHECK-NEXT: or %s17, 0, %s11 ; CHECK-NEXT: or %s17, 0, %s11
; CHECK-NEXT: brge.l.t %s11, %s8, .LBB6_2 ; CHECK-NEXT: brge.l.t %s11, %s8, .LBB6_2
; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: ld %s61, 24(, %s14) ; CHECK-NEXT: ld %s61, 24(, %s14)
; CHECK-NEXT: or %s62, 0, %s0 ; CHECK-NEXT: or %s62, 0, %s0
; CHECK-NEXT: lea %s63, 315 ; CHECK-NEXT: lea %s63, 315
; CHECK-NEXT: shm.l %s63, (%s61) ; CHECK-NEXT: shm.l %s63, (%s61)
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; CHECKFP-LABEL: test_frame16_align16_dynalign32: ; CHECKFP-LABEL: test_frame16_align16_dynalign32:
; CHECKFP: # %bb.0: ; CHECKFP: # %bb.0:
; CHECKFP-NEXT: st %s9, (, %s11) ; CHECKFP-NEXT: st %s9, (, %s11)
; CHECKFP-NEXT: st %s10, 8(, %s11) ; CHECKFP-NEXT: st %s10, 8(, %s11)
; CHECKFP-NEXT: st %s15, 24(, %s11) ; CHECKFP-NEXT: st %s15, 24(, %s11)
; CHECKFP-NEXT: st %s16, 32(, %s11) ; CHECKFP-NEXT: st %s16, 32(, %s11)
; CHECKFP-NEXT: st %s17, 40(, %s11) ; CHECKFP-NEXT: st %s17, 40(, %s11)
; CHECKFP-NEXT: or %s9, 0, %s11 ; CHECKFP-NEXT: or %s9, 0, %s11
; CHECKFP-NEXT: lea %s13, -288 ; CHECKFP-NEXT: lea %s11, -288(, %s11)
; CHECKFP-NEXT: and %s13, %s13, (32)0
; CHECKFP-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECKFP-NEXT: and %s11, %s11, (59)1 ; CHECKFP-NEXT: and %s11, %s11, (59)1
; CHECKFP-NEXT: or %s17, 0, %s11 ; CHECKFP-NEXT: or %s17, 0, %s11
; CHECKFP-NEXT: brge.l.t %s11, %s8, .LBB6_2 ; CHECKFP-NEXT: brge.l.t %s11, %s8, .LBB6_2
; CHECKFP-NEXT: # %bb.1: ; CHECKFP-NEXT: # %bb.1:
; CHECKFP-NEXT: ld %s61, 24(, %s14) ; CHECKFP-NEXT: ld %s61, 24(, %s14)
; CHECKFP-NEXT: or %s62, 0, %s0 ; CHECKFP-NEXT: or %s62, 0, %s0
; CHECKFP-NEXT: lea %s63, 315 ; CHECKFP-NEXT: lea %s63, 315
; CHECKFP-NEXT: shm.l %s63, (%s61) ; CHECKFP-NEXT: shm.l %s63, (%s61)
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llvm/test/CodeGen/VE/Scalar/stackframe_call.ll

Show All 14 Lines
define i8* @test_frame0(i8* %0, i8* %1) { define i8* @test_frame0(i8* %0, i8* %1) {
; CHECK-LABEL: test_frame0: ; CHECK-LABEL: test_frame0:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: st %s9, (, %s11) ; CHECK-NEXT: st %s9, (, %s11)
; CHECK-NEXT: st %s10, 8(, %s11) ; CHECK-NEXT: st %s10, 8(, %s11)
; CHECK-NEXT: st %s15, 24(, %s11) ; CHECK-NEXT: st %s15, 24(, %s11)
; CHECK-NEXT: st %s16, 32(, %s11) ; CHECK-NEXT: st %s16, 32(, %s11)
; CHECK-NEXT: or %s9, 0, %s11 ; CHECK-NEXT: or %s9, 0, %s11
; CHECK-NEXT: lea %s13, -240 ; CHECK-NEXT: lea %s11, -240(, %s11)
; CHECK-NEXT: and %s13, %s13, (32)0
; CHECK-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECK-NEXT: brge.l.t %s11, %s8, .LBB0_2 ; CHECK-NEXT: brge.l.t %s11, %s8, .LBB0_2
; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: ld %s61, 24(, %s14) ; CHECK-NEXT: ld %s61, 24(, %s14)
; CHECK-NEXT: or %s62, 0, %s0 ; CHECK-NEXT: or %s62, 0, %s0
; CHECK-NEXT: lea %s63, 315 ; CHECK-NEXT: lea %s63, 315
; CHECK-NEXT: shm.l %s63, (%s61) ; CHECK-NEXT: shm.l %s63, (%s61)
; CHECK-NEXT: shm.l %s8, 8(%s61) ; CHECK-NEXT: shm.l %s8, 8(%s61)
; CHECK-NEXT: shm.l %s11, 16(%s61) ; CHECK-NEXT: shm.l %s11, 16(%s61)
Show All 13 Lines
; ;
; PIC-LABEL: test_frame0: ; PIC-LABEL: test_frame0:
; PIC: # %bb.0: ; PIC: # %bb.0:
; PIC-NEXT: st %s9, (, %s11) ; PIC-NEXT: st %s9, (, %s11)
; PIC-NEXT: st %s10, 8(, %s11) ; PIC-NEXT: st %s10, 8(, %s11)
; PIC-NEXT: st %s15, 24(, %s11) ; PIC-NEXT: st %s15, 24(, %s11)
; PIC-NEXT: st %s16, 32(, %s11) ; PIC-NEXT: st %s16, 32(, %s11)
; PIC-NEXT: or %s9, 0, %s11 ; PIC-NEXT: or %s9, 0, %s11
; PIC-NEXT: lea %s13, -240 ; PIC-NEXT: lea %s11, -240(, %s11)
; PIC-NEXT: and %s13, %s13, (32)0
; PIC-NEXT: lea.sl %s11, -1(%s13, %s11)
; PIC-NEXT: brge.l.t %s11, %s8, .LBB0_2 ; PIC-NEXT: brge.l.t %s11, %s8, .LBB0_2
; PIC-NEXT: # %bb.1: ; PIC-NEXT: # %bb.1:
; PIC-NEXT: ld %s61, 24(, %s14) ; PIC-NEXT: ld %s61, 24(, %s14)
; PIC-NEXT: or %s62, 0, %s0 ; PIC-NEXT: or %s62, 0, %s0
; PIC-NEXT: lea %s63, 315 ; PIC-NEXT: lea %s63, 315
; PIC-NEXT: shm.l %s63, (%s61) ; PIC-NEXT: shm.l %s63, (%s61)
; PIC-NEXT: shm.l %s8, 8(%s61) ; PIC-NEXT: shm.l %s8, 8(%s61)
; PIC-NEXT: shm.l %s11, 16(%s61) ; PIC-NEXT: shm.l %s11, 16(%s61)
Show All 25 Lines
define i8* @test_frame32(i8* %0) { define i8* @test_frame32(i8* %0) {
; CHECK-LABEL: test_frame32: ; CHECK-LABEL: test_frame32:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: st %s9, (, %s11) ; CHECK-NEXT: st %s9, (, %s11)
; CHECK-NEXT: st %s10, 8(, %s11) ; CHECK-NEXT: st %s10, 8(, %s11)
; CHECK-NEXT: st %s15, 24(, %s11) ; CHECK-NEXT: st %s15, 24(, %s11)
; CHECK-NEXT: st %s16, 32(, %s11) ; CHECK-NEXT: st %s16, 32(, %s11)
; CHECK-NEXT: or %s9, 0, %s11 ; CHECK-NEXT: or %s9, 0, %s11
; CHECK-NEXT: lea %s13, -272 ; CHECK-NEXT: lea %s11, -272(, %s11)
; CHECK-NEXT: and %s13, %s13, (32)0
; CHECK-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECK-NEXT: brge.l.t %s11, %s8, .LBB1_2 ; CHECK-NEXT: brge.l.t %s11, %s8, .LBB1_2
; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: ld %s61, 24(, %s14) ; CHECK-NEXT: ld %s61, 24(, %s14)
; CHECK-NEXT: or %s62, 0, %s0 ; CHECK-NEXT: or %s62, 0, %s0
; CHECK-NEXT: lea %s63, 315 ; CHECK-NEXT: lea %s63, 315
; CHECK-NEXT: shm.l %s63, (%s61) ; CHECK-NEXT: shm.l %s63, (%s61)
; CHECK-NEXT: shm.l %s8, 8(%s61) ; CHECK-NEXT: shm.l %s8, 8(%s61)
; CHECK-NEXT: shm.l %s11, 16(%s61) ; CHECK-NEXT: shm.l %s11, 16(%s61)
Show All 15 Lines
; ;
; PIC-LABEL: test_frame32: ; PIC-LABEL: test_frame32:
; PIC: # %bb.0: ; PIC: # %bb.0:
; PIC-NEXT: st %s9, (, %s11) ; PIC-NEXT: st %s9, (, %s11)
; PIC-NEXT: st %s10, 8(, %s11) ; PIC-NEXT: st %s10, 8(, %s11)
; PIC-NEXT: st %s15, 24(, %s11) ; PIC-NEXT: st %s15, 24(, %s11)
; PIC-NEXT: st %s16, 32(, %s11) ; PIC-NEXT: st %s16, 32(, %s11)
; PIC-NEXT: or %s9, 0, %s11 ; PIC-NEXT: or %s9, 0, %s11
; PIC-NEXT: lea %s13, -272 ; PIC-NEXT: lea %s11, -272(, %s11)
; PIC-NEXT: and %s13, %s13, (32)0
; PIC-NEXT: lea.sl %s11, -1(%s13, %s11)
; PIC-NEXT: brge.l.t %s11, %s8, .LBB1_2 ; PIC-NEXT: brge.l.t %s11, %s8, .LBB1_2
; PIC-NEXT: # %bb.1: ; PIC-NEXT: # %bb.1:
; PIC-NEXT: ld %s61, 24(, %s14) ; PIC-NEXT: ld %s61, 24(, %s14)
; PIC-NEXT: or %s62, 0, %s0 ; PIC-NEXT: or %s62, 0, %s0
; PIC-NEXT: lea %s63, 315 ; PIC-NEXT: lea %s63, 315
; PIC-NEXT: shm.l %s63, (%s61) ; PIC-NEXT: shm.l %s63, (%s61)
; PIC-NEXT: shm.l %s8, 8(%s61) ; PIC-NEXT: shm.l %s8, 8(%s61)
; PIC-NEXT: shm.l %s11, 16(%s61) ; PIC-NEXT: shm.l %s11, 16(%s61)
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; CHECK-LABEL: test_align32: ; CHECK-LABEL: test_align32:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: st %s9, (, %s11) ; CHECK-NEXT: st %s9, (, %s11)
; CHECK-NEXT: st %s10, 8(, %s11) ; CHECK-NEXT: st %s10, 8(, %s11)
; CHECK-NEXT: st %s15, 24(, %s11) ; CHECK-NEXT: st %s15, 24(, %s11)
; CHECK-NEXT: st %s16, 32(, %s11) ; CHECK-NEXT: st %s16, 32(, %s11)
; CHECK-NEXT: st %s17, 40(, %s11) ; CHECK-NEXT: st %s17, 40(, %s11)
; CHECK-NEXT: or %s9, 0, %s11 ; CHECK-NEXT: or %s9, 0, %s11
; CHECK-NEXT: lea %s13, -288 ; CHECK-NEXT: lea %s11, -288(, %s11)
; CHECK-NEXT: and %s13, %s13, (32)0
; CHECK-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECK-NEXT: and %s11, %s11, (59)1 ; CHECK-NEXT: and %s11, %s11, (59)1
; CHECK-NEXT: or %s17, 0, %s11 ; CHECK-NEXT: or %s17, 0, %s11
; CHECK-NEXT: brge.l.t %s11, %s8, .LBB2_2 ; CHECK-NEXT: brge.l.t %s11, %s8, .LBB2_2
; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: ld %s61, 24(, %s14) ; CHECK-NEXT: ld %s61, 24(, %s14)
; CHECK-NEXT: or %s62, 0, %s0 ; CHECK-NEXT: or %s62, 0, %s0
; CHECK-NEXT: lea %s63, 315 ; CHECK-NEXT: lea %s63, 315
; CHECK-NEXT: shm.l %s63, (%s61) ; CHECK-NEXT: shm.l %s63, (%s61)
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; PIC-LABEL: test_align32: ; PIC-LABEL: test_align32:
; PIC: # %bb.0: ; PIC: # %bb.0:
; PIC-NEXT: st %s9, (, %s11) ; PIC-NEXT: st %s9, (, %s11)
; PIC-NEXT: st %s10, 8(, %s11) ; PIC-NEXT: st %s10, 8(, %s11)
; PIC-NEXT: st %s15, 24(, %s11) ; PIC-NEXT: st %s15, 24(, %s11)
; PIC-NEXT: st %s16, 32(, %s11) ; PIC-NEXT: st %s16, 32(, %s11)
; PIC-NEXT: st %s17, 40(, %s11) ; PIC-NEXT: st %s17, 40(, %s11)
; PIC-NEXT: or %s9, 0, %s11 ; PIC-NEXT: or %s9, 0, %s11
; PIC-NEXT: lea %s13, -288 ; PIC-NEXT: lea %s11, -288(, %s11)
; PIC-NEXT: and %s13, %s13, (32)0
; PIC-NEXT: lea.sl %s11, -1(%s13, %s11)
; PIC-NEXT: and %s11, %s11, (59)1 ; PIC-NEXT: and %s11, %s11, (59)1
; PIC-NEXT: or %s17, 0, %s11 ; PIC-NEXT: or %s17, 0, %s11
; PIC-NEXT: brge.l.t %s11, %s8, .LBB2_2 ; PIC-NEXT: brge.l.t %s11, %s8, .LBB2_2
; PIC-NEXT: # %bb.1: ; PIC-NEXT: # %bb.1:
; PIC-NEXT: ld %s61, 24(, %s14) ; PIC-NEXT: ld %s61, 24(, %s14)
; PIC-NEXT: or %s62, 0, %s0 ; PIC-NEXT: or %s62, 0, %s0
; PIC-NEXT: lea %s63, 315 ; PIC-NEXT: lea %s63, 315
; PIC-NEXT: shm.l %s63, (%s61) ; PIC-NEXT: shm.l %s63, (%s61)
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define i8* @test_frame0_var(i8* %0, i8* %1) { define i8* @test_frame0_var(i8* %0, i8* %1) {
; CHECK-LABEL: test_frame0_var: ; CHECK-LABEL: test_frame0_var:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: st %s9, (, %s11) ; CHECK-NEXT: st %s9, (, %s11)
; CHECK-NEXT: st %s10, 8(, %s11) ; CHECK-NEXT: st %s10, 8(, %s11)
; CHECK-NEXT: st %s15, 24(, %s11) ; CHECK-NEXT: st %s15, 24(, %s11)
; CHECK-NEXT: st %s16, 32(, %s11) ; CHECK-NEXT: st %s16, 32(, %s11)
; CHECK-NEXT: or %s9, 0, %s11 ; CHECK-NEXT: or %s9, 0, %s11
; CHECK-NEXT: lea %s13, -240 ; CHECK-NEXT: lea %s11, -240(, %s11)
; CHECK-NEXT: and %s13, %s13, (32)0
; CHECK-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECK-NEXT: brge.l.t %s11, %s8, .LBB3_2 ; CHECK-NEXT: brge.l.t %s11, %s8, .LBB3_2
; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: ld %s61, 24(, %s14) ; CHECK-NEXT: ld %s61, 24(, %s14)
; CHECK-NEXT: or %s62, 0, %s0 ; CHECK-NEXT: or %s62, 0, %s0
; CHECK-NEXT: lea %s63, 315 ; CHECK-NEXT: lea %s63, 315
; CHECK-NEXT: shm.l %s63, (%s61) ; CHECK-NEXT: shm.l %s63, (%s61)
; CHECK-NEXT: shm.l %s8, 8(%s61) ; CHECK-NEXT: shm.l %s8, 8(%s61)
; CHECK-NEXT: shm.l %s11, 16(%s61) ; CHECK-NEXT: shm.l %s11, 16(%s61)
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; ;
; PIC-LABEL: test_frame0_var: ; PIC-LABEL: test_frame0_var:
; PIC: # %bb.0: ; PIC: # %bb.0:
; PIC-NEXT: st %s9, (, %s11) ; PIC-NEXT: st %s9, (, %s11)
; PIC-NEXT: st %s10, 8(, %s11) ; PIC-NEXT: st %s10, 8(, %s11)
; PIC-NEXT: st %s15, 24(, %s11) ; PIC-NEXT: st %s15, 24(, %s11)
; PIC-NEXT: st %s16, 32(, %s11) ; PIC-NEXT: st %s16, 32(, %s11)
; PIC-NEXT: or %s9, 0, %s11 ; PIC-NEXT: or %s9, 0, %s11
; PIC-NEXT: lea %s13, -240 ; PIC-NEXT: lea %s11, -240(, %s11)
; PIC-NEXT: and %s13, %s13, (32)0
; PIC-NEXT: lea.sl %s11, -1(%s13, %s11)
; PIC-NEXT: brge.l.t %s11, %s8, .LBB3_2 ; PIC-NEXT: brge.l.t %s11, %s8, .LBB3_2
; PIC-NEXT: # %bb.1: ; PIC-NEXT: # %bb.1:
; PIC-NEXT: ld %s61, 24(, %s14) ; PIC-NEXT: ld %s61, 24(, %s14)
; PIC-NEXT: or %s62, 0, %s0 ; PIC-NEXT: or %s62, 0, %s0
; PIC-NEXT: lea %s63, 315 ; PIC-NEXT: lea %s63, 315
; PIC-NEXT: shm.l %s63, (%s61) ; PIC-NEXT: shm.l %s63, (%s61)
; PIC-NEXT: shm.l %s8, 8(%s61) ; PIC-NEXT: shm.l %s8, 8(%s61)
; PIC-NEXT: shm.l %s11, 16(%s61) ; PIC-NEXT: shm.l %s11, 16(%s61)
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define i8* @test_frame32_var(i8* %0) { define i8* @test_frame32_var(i8* %0) {
; CHECK-LABEL: test_frame32_var: ; CHECK-LABEL: test_frame32_var:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: st %s9, (, %s11) ; CHECK-NEXT: st %s9, (, %s11)
; CHECK-NEXT: st %s10, 8(, %s11) ; CHECK-NEXT: st %s10, 8(, %s11)
; CHECK-NEXT: st %s15, 24(, %s11) ; CHECK-NEXT: st %s15, 24(, %s11)
; CHECK-NEXT: st %s16, 32(, %s11) ; CHECK-NEXT: st %s16, 32(, %s11)
; CHECK-NEXT: or %s9, 0, %s11 ; CHECK-NEXT: or %s9, 0, %s11
; CHECK-NEXT: lea %s13, -272 ; CHECK-NEXT: lea %s11, -272(, %s11)
; CHECK-NEXT: and %s13, %s13, (32)0
; CHECK-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECK-NEXT: brge.l.t %s11, %s8, .LBB4_2 ; CHECK-NEXT: brge.l.t %s11, %s8, .LBB4_2
; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: ld %s61, 24(, %s14) ; CHECK-NEXT: ld %s61, 24(, %s14)
; CHECK-NEXT: or %s62, 0, %s0 ; CHECK-NEXT: or %s62, 0, %s0
; CHECK-NEXT: lea %s63, 315 ; CHECK-NEXT: lea %s63, 315
; CHECK-NEXT: shm.l %s63, (%s61) ; CHECK-NEXT: shm.l %s63, (%s61)
; CHECK-NEXT: shm.l %s8, 8(%s61) ; CHECK-NEXT: shm.l %s8, 8(%s61)
; CHECK-NEXT: shm.l %s11, 16(%s61) ; CHECK-NEXT: shm.l %s11, 16(%s61)
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; ;
; PIC-LABEL: test_frame32_var: ; PIC-LABEL: test_frame32_var:
; PIC: # %bb.0: ; PIC: # %bb.0:
; PIC-NEXT: st %s9, (, %s11) ; PIC-NEXT: st %s9, (, %s11)
; PIC-NEXT: st %s10, 8(, %s11) ; PIC-NEXT: st %s10, 8(, %s11)
; PIC-NEXT: st %s15, 24(, %s11) ; PIC-NEXT: st %s15, 24(, %s11)
; PIC-NEXT: st %s16, 32(, %s11) ; PIC-NEXT: st %s16, 32(, %s11)
; PIC-NEXT: or %s9, 0, %s11 ; PIC-NEXT: or %s9, 0, %s11
; PIC-NEXT: lea %s13, -272 ; PIC-NEXT: lea %s11, -272(, %s11)
; PIC-NEXT: and %s13, %s13, (32)0
; PIC-NEXT: lea.sl %s11, -1(%s13, %s11)
; PIC-NEXT: brge.l.t %s11, %s8, .LBB4_2 ; PIC-NEXT: brge.l.t %s11, %s8, .LBB4_2
; PIC-NEXT: # %bb.1: ; PIC-NEXT: # %bb.1:
; PIC-NEXT: ld %s61, 24(, %s14) ; PIC-NEXT: ld %s61, 24(, %s14)
; PIC-NEXT: or %s62, 0, %s0 ; PIC-NEXT: or %s62, 0, %s0
; PIC-NEXT: lea %s63, 315 ; PIC-NEXT: lea %s63, 315
; PIC-NEXT: shm.l %s63, (%s61) ; PIC-NEXT: shm.l %s63, (%s61)
; PIC-NEXT: shm.l %s8, 8(%s61) ; PIC-NEXT: shm.l %s8, 8(%s61)
; PIC-NEXT: shm.l %s11, 16(%s61) ; PIC-NEXT: shm.l %s11, 16(%s61)
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; CHECK-LABEL: test_align32_var: ; CHECK-LABEL: test_align32_var:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: st %s9, (, %s11) ; CHECK-NEXT: st %s9, (, %s11)
; CHECK-NEXT: st %s10, 8(, %s11) ; CHECK-NEXT: st %s10, 8(, %s11)
; CHECK-NEXT: st %s15, 24(, %s11) ; CHECK-NEXT: st %s15, 24(, %s11)
; CHECK-NEXT: st %s16, 32(, %s11) ; CHECK-NEXT: st %s16, 32(, %s11)
; CHECK-NEXT: st %s17, 40(, %s11) ; CHECK-NEXT: st %s17, 40(, %s11)
; CHECK-NEXT: or %s9, 0, %s11 ; CHECK-NEXT: or %s9, 0, %s11
; CHECK-NEXT: lea %s13, -288 ; CHECK-NEXT: lea %s11, -288(, %s11)
; CHECK-NEXT: and %s13, %s13, (32)0
; CHECK-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECK-NEXT: and %s11, %s11, (59)1 ; CHECK-NEXT: and %s11, %s11, (59)1
; CHECK-NEXT: or %s17, 0, %s11 ; CHECK-NEXT: or %s17, 0, %s11
; CHECK-NEXT: brge.l.t %s11, %s8, .LBB5_2 ; CHECK-NEXT: brge.l.t %s11, %s8, .LBB5_2
; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: ld %s61, 24(, %s14) ; CHECK-NEXT: ld %s61, 24(, %s14)
; CHECK-NEXT: or %s62, 0, %s0 ; CHECK-NEXT: or %s62, 0, %s0
; CHECK-NEXT: lea %s63, 315 ; CHECK-NEXT: lea %s63, 315
; CHECK-NEXT: shm.l %s63, (%s61) ; CHECK-NEXT: shm.l %s63, (%s61)
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; PIC-LABEL: test_align32_var: ; PIC-LABEL: test_align32_var:
; PIC: # %bb.0: ; PIC: # %bb.0:
; PIC-NEXT: st %s9, (, %s11) ; PIC-NEXT: st %s9, (, %s11)
; PIC-NEXT: st %s10, 8(, %s11) ; PIC-NEXT: st %s10, 8(, %s11)
; PIC-NEXT: st %s15, 24(, %s11) ; PIC-NEXT: st %s15, 24(, %s11)
; PIC-NEXT: st %s16, 32(, %s11) ; PIC-NEXT: st %s16, 32(, %s11)
; PIC-NEXT: st %s17, 40(, %s11) ; PIC-NEXT: st %s17, 40(, %s11)
; PIC-NEXT: or %s9, 0, %s11 ; PIC-NEXT: or %s9, 0, %s11
; PIC-NEXT: lea %s13, -288 ; PIC-NEXT: lea %s11, -288(, %s11)
; PIC-NEXT: and %s13, %s13, (32)0
; PIC-NEXT: lea.sl %s11, -1(%s13, %s11)
; PIC-NEXT: and %s11, %s11, (59)1 ; PIC-NEXT: and %s11, %s11, (59)1
; PIC-NEXT: or %s17, 0, %s11 ; PIC-NEXT: or %s17, 0, %s11
; PIC-NEXT: brge.l.t %s11, %s8, .LBB5_2 ; PIC-NEXT: brge.l.t %s11, %s8, .LBB5_2
; PIC-NEXT: # %bb.1: ; PIC-NEXT: # %bb.1:
; PIC-NEXT: ld %s61, 24(, %s14) ; PIC-NEXT: ld %s61, 24(, %s14)
; PIC-NEXT: or %s62, 0, %s0 ; PIC-NEXT: or %s62, 0, %s0
; PIC-NEXT: lea %s63, 315 ; PIC-NEXT: lea %s63, 315
; PIC-NEXT: shm.l %s63, (%s61) ; PIC-NEXT: shm.l %s63, (%s61)
▲ Show 20 Lines • Show All 50 Lines • Show Last 20 Lines

llvm/test/CodeGen/VE/Scalar/stackframe_nocall.ll

Show All 28 Lines
define nonnull i8* @test_frame32(i8* nocapture readonly %0) { define nonnull i8* @test_frame32(i8* nocapture readonly %0) {
; CHECK-LABEL: test_frame32: ; CHECK-LABEL: test_frame32:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: st %s9, (, %s11) ; CHECK-NEXT: st %s9, (, %s11)
; CHECK-NEXT: st %s10, 8(, %s11) ; CHECK-NEXT: st %s10, 8(, %s11)
; CHECK-NEXT: st %s15, 24(, %s11) ; CHECK-NEXT: st %s15, 24(, %s11)
; CHECK-NEXT: st %s16, 32(, %s11) ; CHECK-NEXT: st %s16, 32(, %s11)
; CHECK-NEXT: or %s9, 0, %s11 ; CHECK-NEXT: or %s9, 0, %s11
; CHECK-NEXT: lea %s13, -208 ; CHECK-NEXT: lea %s11, -208(, %s11)
; CHECK-NEXT: and %s13, %s13, (32)0
; CHECK-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECK-NEXT: brge.l.t %s11, %s8, .LBB1_2 ; CHECK-NEXT: brge.l.t %s11, %s8, .LBB1_2
; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: ld %s61, 24(, %s14) ; CHECK-NEXT: ld %s61, 24(, %s14)
; CHECK-NEXT: or %s62, 0, %s0 ; CHECK-NEXT: or %s62, 0, %s0
; CHECK-NEXT: lea %s63, 315 ; CHECK-NEXT: lea %s63, 315
; CHECK-NEXT: shm.l %s63, (%s61) ; CHECK-NEXT: shm.l %s63, (%s61)
; CHECK-NEXT: shm.l %s8, 8(%s61) ; CHECK-NEXT: shm.l %s8, 8(%s61)
; CHECK-NEXT: shm.l %s11, 16(%s61) ; CHECK-NEXT: shm.l %s11, 16(%s61)
Show All 12 Lines
; ;
; PIC-LABEL: test_frame32: ; PIC-LABEL: test_frame32:
; PIC: # %bb.0: ; PIC: # %bb.0:
; PIC-NEXT: st %s9, (, %s11) ; PIC-NEXT: st %s9, (, %s11)
; PIC-NEXT: st %s10, 8(, %s11) ; PIC-NEXT: st %s10, 8(, %s11)
; PIC-NEXT: st %s15, 24(, %s11) ; PIC-NEXT: st %s15, 24(, %s11)
; PIC-NEXT: st %s16, 32(, %s11) ; PIC-NEXT: st %s16, 32(, %s11)
; PIC-NEXT: or %s9, 0, %s11 ; PIC-NEXT: or %s9, 0, %s11
; PIC-NEXT: lea %s13, -208 ; PIC-NEXT: lea %s11, -208(, %s11)
; PIC-NEXT: and %s13, %s13, (32)0
; PIC-NEXT: lea.sl %s11, -1(%s13, %s11)
; PIC-NEXT: brge.l.t %s11, %s8, .LBB1_2 ; PIC-NEXT: brge.l.t %s11, %s8, .LBB1_2
; PIC-NEXT: # %bb.1: ; PIC-NEXT: # %bb.1:
; PIC-NEXT: ld %s61, 24(, %s14) ; PIC-NEXT: ld %s61, 24(, %s14)
; PIC-NEXT: or %s62, 0, %s0 ; PIC-NEXT: or %s62, 0, %s0
; PIC-NEXT: lea %s63, 315 ; PIC-NEXT: lea %s63, 315
; PIC-NEXT: shm.l %s63, (%s61) ; PIC-NEXT: shm.l %s63, (%s61)
; PIC-NEXT: shm.l %s8, 8(%s61) ; PIC-NEXT: shm.l %s8, 8(%s61)
; PIC-NEXT: shm.l %s11, 16(%s61) ; PIC-NEXT: shm.l %s11, 16(%s61)
Show All 29 Lines
; CHECK-LABEL: test_align32: ; CHECK-LABEL: test_align32:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: st %s9, (, %s11) ; CHECK-NEXT: st %s9, (, %s11)
; CHECK-NEXT: st %s10, 8(, %s11) ; CHECK-NEXT: st %s10, 8(, %s11)
; CHECK-NEXT: st %s15, 24(, %s11) ; CHECK-NEXT: st %s15, 24(, %s11)
; CHECK-NEXT: st %s16, 32(, %s11) ; CHECK-NEXT: st %s16, 32(, %s11)
; CHECK-NEXT: st %s17, 40(, %s11) ; CHECK-NEXT: st %s17, 40(, %s11)
; CHECK-NEXT: or %s9, 0, %s11 ; CHECK-NEXT: or %s9, 0, %s11
; CHECK-NEXT: lea %s13, -288 ; CHECK-NEXT: lea %s11, -288(, %s11)
; CHECK-NEXT: and %s13, %s13, (32)0
; CHECK-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECK-NEXT: and %s11, %s11, (59)1 ; CHECK-NEXT: and %s11, %s11, (59)1
; CHECK-NEXT: or %s17, 0, %s11 ; CHECK-NEXT: or %s17, 0, %s11
; CHECK-NEXT: brge.l.t %s11, %s8, .LBB2_2 ; CHECK-NEXT: brge.l.t %s11, %s8, .LBB2_2
; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: ld %s61, 24(, %s14) ; CHECK-NEXT: ld %s61, 24(, %s14)
; CHECK-NEXT: or %s62, 0, %s0 ; CHECK-NEXT: or %s62, 0, %s0
; CHECK-NEXT: lea %s63, 315 ; CHECK-NEXT: lea %s63, 315
; CHECK-NEXT: shm.l %s63, (%s61) ; CHECK-NEXT: shm.l %s63, (%s61)
Show All 27 Lines
; PIC-LABEL: test_align32: ; PIC-LABEL: test_align32:
; PIC: # %bb.0: ; PIC: # %bb.0:
; PIC-NEXT: st %s9, (, %s11) ; PIC-NEXT: st %s9, (, %s11)
; PIC-NEXT: st %s10, 8(, %s11) ; PIC-NEXT: st %s10, 8(, %s11)
; PIC-NEXT: st %s15, 24(, %s11) ; PIC-NEXT: st %s15, 24(, %s11)
; PIC-NEXT: st %s16, 32(, %s11) ; PIC-NEXT: st %s16, 32(, %s11)
; PIC-NEXT: st %s17, 40(, %s11) ; PIC-NEXT: st %s17, 40(, %s11)
; PIC-NEXT: or %s9, 0, %s11 ; PIC-NEXT: or %s9, 0, %s11
; PIC-NEXT: lea %s13, -288 ; PIC-NEXT: lea %s11, -288(, %s11)
; PIC-NEXT: and %s13, %s13, (32)0
; PIC-NEXT: lea.sl %s11, -1(%s13, %s11)
; PIC-NEXT: and %s11, %s11, (59)1 ; PIC-NEXT: and %s11, %s11, (59)1
; PIC-NEXT: or %s17, 0, %s11 ; PIC-NEXT: or %s17, 0, %s11
; PIC-NEXT: brge.l.t %s11, %s8, .LBB2_2 ; PIC-NEXT: brge.l.t %s11, %s8, .LBB2_2
; PIC-NEXT: # %bb.1: ; PIC-NEXT: # %bb.1:
; PIC-NEXT: ld %s61, 24(, %s14) ; PIC-NEXT: ld %s61, 24(, %s14)
; PIC-NEXT: or %s62, 0, %s0 ; PIC-NEXT: or %s62, 0, %s0
; PIC-NEXT: lea %s63, 315 ; PIC-NEXT: lea %s63, 315
; PIC-NEXT: shm.l %s63, (%s61) ; PIC-NEXT: shm.l %s63, (%s61)
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
; ;
; PIC-LABEL: test_frame0_var: ; PIC-LABEL: test_frame0_var:
; PIC: # %bb.0: ; PIC: # %bb.0:
; PIC-NEXT: st %s9, (, %s11) ; PIC-NEXT: st %s9, (, %s11)
; PIC-NEXT: st %s10, 8(, %s11) ; PIC-NEXT: st %s10, 8(, %s11)
; PIC-NEXT: st %s15, 24(, %s11) ; PIC-NEXT: st %s15, 24(, %s11)
; PIC-NEXT: st %s16, 32(, %s11) ; PIC-NEXT: st %s16, 32(, %s11)
; PIC-NEXT: or %s9, 0, %s11 ; PIC-NEXT: or %s9, 0, %s11
; PIC-NEXT: lea %s13, -176 ; PIC-NEXT: lea %s11, -176(, %s11)
; PIC-NEXT: and %s13, %s13, (32)0
; PIC-NEXT: lea.sl %s11, -1(%s13, %s11)
; PIC-NEXT: brge.l.t %s11, %s8, .LBB3_2 ; PIC-NEXT: brge.l.t %s11, %s8, .LBB3_2
; PIC-NEXT: # %bb.1: ; PIC-NEXT: # %bb.1:
; PIC-NEXT: ld %s61, 24(, %s14) ; PIC-NEXT: ld %s61, 24(, %s14)
; PIC-NEXT: or %s62, 0, %s0 ; PIC-NEXT: or %s62, 0, %s0
; PIC-NEXT: lea %s63, 315 ; PIC-NEXT: lea %s63, 315
; PIC-NEXT: shm.l %s63, (%s61) ; PIC-NEXT: shm.l %s63, (%s61)
; PIC-NEXT: shm.l %s8, 8(%s61) ; PIC-NEXT: shm.l %s8, 8(%s61)
; PIC-NEXT: shm.l %s11, 16(%s61) ; PIC-NEXT: shm.l %s11, 16(%s61)
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define nonnull i8* @test_frame32_var(i8* nocapture readnone %0) { define nonnull i8* @test_frame32_var(i8* nocapture readnone %0) {
; CHECK-LABEL: test_frame32_var: ; CHECK-LABEL: test_frame32_var:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: st %s9, (, %s11) ; CHECK-NEXT: st %s9, (, %s11)
; CHECK-NEXT: st %s10, 8(, %s11) ; CHECK-NEXT: st %s10, 8(, %s11)
; CHECK-NEXT: st %s15, 24(, %s11) ; CHECK-NEXT: st %s15, 24(, %s11)
; CHECK-NEXT: st %s16, 32(, %s11) ; CHECK-NEXT: st %s16, 32(, %s11)
; CHECK-NEXT: or %s9, 0, %s11 ; CHECK-NEXT: or %s9, 0, %s11
; CHECK-NEXT: lea %s13, -208 ; CHECK-NEXT: lea %s11, -208(, %s11)
; CHECK-NEXT: and %s13, %s13, (32)0
; CHECK-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECK-NEXT: brge.l.t %s11, %s8, .LBB4_2 ; CHECK-NEXT: brge.l.t %s11, %s8, .LBB4_2
; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: ld %s61, 24(, %s14) ; CHECK-NEXT: ld %s61, 24(, %s14)
; CHECK-NEXT: or %s62, 0, %s0 ; CHECK-NEXT: or %s62, 0, %s0
; CHECK-NEXT: lea %s63, 315 ; CHECK-NEXT: lea %s63, 315
; CHECK-NEXT: shm.l %s63, (%s61) ; CHECK-NEXT: shm.l %s63, (%s61)
; CHECK-NEXT: shm.l %s8, 8(%s61) ; CHECK-NEXT: shm.l %s8, 8(%s61)
; CHECK-NEXT: shm.l %s11, 16(%s61) ; CHECK-NEXT: shm.l %s11, 16(%s61)
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; ;
; PIC-LABEL: test_frame32_var: ; PIC-LABEL: test_frame32_var:
; PIC: # %bb.0: ; PIC: # %bb.0:
; PIC-NEXT: st %s9, (, %s11) ; PIC-NEXT: st %s9, (, %s11)
; PIC-NEXT: st %s10, 8(, %s11) ; PIC-NEXT: st %s10, 8(, %s11)
; PIC-NEXT: st %s15, 24(, %s11) ; PIC-NEXT: st %s15, 24(, %s11)
; PIC-NEXT: st %s16, 32(, %s11) ; PIC-NEXT: st %s16, 32(, %s11)
; PIC-NEXT: or %s9, 0, %s11 ; PIC-NEXT: or %s9, 0, %s11
; PIC-NEXT: lea %s13, -208 ; PIC-NEXT: lea %s11, -208(, %s11)
; PIC-NEXT: and %s13, %s13, (32)0
; PIC-NEXT: lea.sl %s11, -1(%s13, %s11)
; PIC-NEXT: brge.l.t %s11, %s8, .LBB4_2 ; PIC-NEXT: brge.l.t %s11, %s8, .LBB4_2
; PIC-NEXT: # %bb.1: ; PIC-NEXT: # %bb.1:
; PIC-NEXT: ld %s61, 24(, %s14) ; PIC-NEXT: ld %s61, 24(, %s14)
; PIC-NEXT: or %s62, 0, %s0 ; PIC-NEXT: or %s62, 0, %s0
; PIC-NEXT: lea %s63, 315 ; PIC-NEXT: lea %s63, 315
; PIC-NEXT: shm.l %s63, (%s61) ; PIC-NEXT: shm.l %s63, (%s61)
; PIC-NEXT: shm.l %s8, 8(%s61) ; PIC-NEXT: shm.l %s8, 8(%s61)
; PIC-NEXT: shm.l %s11, 16(%s61) ; PIC-NEXT: shm.l %s11, 16(%s61)
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; CHECK-LABEL: test_align32_var: ; CHECK-LABEL: test_align32_var:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: st %s9, (, %s11) ; CHECK-NEXT: st %s9, (, %s11)
; CHECK-NEXT: st %s10, 8(, %s11) ; CHECK-NEXT: st %s10, 8(, %s11)
; CHECK-NEXT: st %s15, 24(, %s11) ; CHECK-NEXT: st %s15, 24(, %s11)
; CHECK-NEXT: st %s16, 32(, %s11) ; CHECK-NEXT: st %s16, 32(, %s11)
; CHECK-NEXT: st %s17, 40(, %s11) ; CHECK-NEXT: st %s17, 40(, %s11)
; CHECK-NEXT: or %s9, 0, %s11 ; CHECK-NEXT: or %s9, 0, %s11
; CHECK-NEXT: lea %s13, -288 ; CHECK-NEXT: lea %s11, -288(, %s11)
; CHECK-NEXT: and %s13, %s13, (32)0
; CHECK-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECK-NEXT: and %s11, %s11, (59)1 ; CHECK-NEXT: and %s11, %s11, (59)1
; CHECK-NEXT: or %s17, 0, %s11 ; CHECK-NEXT: or %s17, 0, %s11
; CHECK-NEXT: brge.l.t %s11, %s8, .LBB5_2 ; CHECK-NEXT: brge.l.t %s11, %s8, .LBB5_2
; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: ld %s61, 24(, %s14) ; CHECK-NEXT: ld %s61, 24(, %s14)
; CHECK-NEXT: or %s62, 0, %s0 ; CHECK-NEXT: or %s62, 0, %s0
; CHECK-NEXT: lea %s63, 315 ; CHECK-NEXT: lea %s63, 315
; CHECK-NEXT: shm.l %s63, (%s61) ; CHECK-NEXT: shm.l %s63, (%s61)
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; PIC-LABEL: test_align32_var: ; PIC-LABEL: test_align32_var:
; PIC: # %bb.0: ; PIC: # %bb.0:
; PIC-NEXT: st %s9, (, %s11) ; PIC-NEXT: st %s9, (, %s11)
; PIC-NEXT: st %s10, 8(, %s11) ; PIC-NEXT: st %s10, 8(, %s11)
; PIC-NEXT: st %s15, 24(, %s11) ; PIC-NEXT: st %s15, 24(, %s11)
; PIC-NEXT: st %s16, 32(, %s11) ; PIC-NEXT: st %s16, 32(, %s11)
; PIC-NEXT: st %s17, 40(, %s11) ; PIC-NEXT: st %s17, 40(, %s11)
; PIC-NEXT: or %s9, 0, %s11 ; PIC-NEXT: or %s9, 0, %s11
; PIC-NEXT: lea %s13, -288 ; PIC-NEXT: lea %s11, -288(, %s11)
; PIC-NEXT: and %s13, %s13, (32)0
; PIC-NEXT: lea.sl %s11, -1(%s13, %s11)
; PIC-NEXT: and %s11, %s11, (59)1 ; PIC-NEXT: and %s11, %s11, (59)1
; PIC-NEXT: or %s17, 0, %s11 ; PIC-NEXT: or %s17, 0, %s11
; PIC-NEXT: brge.l.t %s11, %s8, .LBB5_2 ; PIC-NEXT: brge.l.t %s11, %s8, .LBB5_2
; PIC-NEXT: # %bb.1: ; PIC-NEXT: # %bb.1:
; PIC-NEXT: ld %s61, 24(, %s14) ; PIC-NEXT: ld %s61, 24(, %s14)
; PIC-NEXT: or %s62, 0, %s0 ; PIC-NEXT: or %s62, 0, %s0
; PIC-NEXT: lea %s63, 315 ; PIC-NEXT: lea %s63, 315
; PIC-NEXT: shm.l %s63, (%s61) ; PIC-NEXT: shm.l %s63, (%s61)
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llvm/test/CodeGen/VE/Scalar/stackframe_size.ll

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define i8* @test_frame8(i8* %0) { define i8* @test_frame8(i8* %0) {
; CHECK-LABEL: test_frame8: ; CHECK-LABEL: test_frame8:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: st %s9, (, %s11) ; CHECK-NEXT: st %s9, (, %s11)
; CHECK-NEXT: st %s10, 8(, %s11) ; CHECK-NEXT: st %s10, 8(, %s11)
; CHECK-NEXT: st %s15, 24(, %s11) ; CHECK-NEXT: st %s15, 24(, %s11)
; CHECK-NEXT: st %s16, 32(, %s11) ; CHECK-NEXT: st %s16, 32(, %s11)
; CHECK-NEXT: or %s9, 0, %s11 ; CHECK-NEXT: or %s9, 0, %s11
; CHECK-NEXT: lea %s13, -192 ; CHECK-NEXT: lea %s11, -192(, %s11)
; CHECK-NEXT: and %s13, %s13, (32)0
; CHECK-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECK-NEXT: brge.l.t %s11, %s8, .LBB1_2 ; CHECK-NEXT: brge.l.t %s11, %s8, .LBB1_2
; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: ld %s61, 24(, %s14) ; CHECK-NEXT: ld %s61, 24(, %s14)
; CHECK-NEXT: or %s62, 0, %s0 ; CHECK-NEXT: or %s62, 0, %s0
; CHECK-NEXT: lea %s63, 315 ; CHECK-NEXT: lea %s63, 315
; CHECK-NEXT: shm.l %s63, (%s61) ; CHECK-NEXT: shm.l %s63, (%s61)
; CHECK-NEXT: shm.l %s8, 8(%s61) ; CHECK-NEXT: shm.l %s8, 8(%s61)
; CHECK-NEXT: shm.l %s11, 16(%s61) ; CHECK-NEXT: shm.l %s11, 16(%s61)
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define i8* @test_frame16(i8* %0) { define i8* @test_frame16(i8* %0) {
; CHECK-LABEL: test_frame16: ; CHECK-LABEL: test_frame16:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: st %s9, (, %s11) ; CHECK-NEXT: st %s9, (, %s11)
; CHECK-NEXT: st %s10, 8(, %s11) ; CHECK-NEXT: st %s10, 8(, %s11)
; CHECK-NEXT: st %s15, 24(, %s11) ; CHECK-NEXT: st %s15, 24(, %s11)
; CHECK-NEXT: st %s16, 32(, %s11) ; CHECK-NEXT: st %s16, 32(, %s11)
; CHECK-NEXT: or %s9, 0, %s11 ; CHECK-NEXT: or %s9, 0, %s11
; CHECK-NEXT: lea %s13, -192 ; CHECK-NEXT: lea %s11, -192(, %s11)
; CHECK-NEXT: and %s13, %s13, (32)0
; CHECK-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECK-NEXT: brge.l.t %s11, %s8, .LBB2_2 ; CHECK-NEXT: brge.l.t %s11, %s8, .LBB2_2
; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: ld %s61, 24(, %s14) ; CHECK-NEXT: ld %s61, 24(, %s14)
; CHECK-NEXT: or %s62, 0, %s0 ; CHECK-NEXT: or %s62, 0, %s0
; CHECK-NEXT: lea %s63, 315 ; CHECK-NEXT: lea %s63, 315
; CHECK-NEXT: shm.l %s63, (%s61) ; CHECK-NEXT: shm.l %s63, (%s61)
; CHECK-NEXT: shm.l %s8, 8(%s61) ; CHECK-NEXT: shm.l %s8, 8(%s61)
; CHECK-NEXT: shm.l %s11, 16(%s61) ; CHECK-NEXT: shm.l %s11, 16(%s61)
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define i8* @test_frame32(i8* %0) { define i8* @test_frame32(i8* %0) {
; CHECK-LABEL: test_frame32: ; CHECK-LABEL: test_frame32:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: st %s9, (, %s11) ; CHECK-NEXT: st %s9, (, %s11)
; CHECK-NEXT: st %s10, 8(, %s11) ; CHECK-NEXT: st %s10, 8(, %s11)
; CHECK-NEXT: st %s15, 24(, %s11) ; CHECK-NEXT: st %s15, 24(, %s11)
; CHECK-NEXT: st %s16, 32(, %s11) ; CHECK-NEXT: st %s16, 32(, %s11)
; CHECK-NEXT: or %s9, 0, %s11 ; CHECK-NEXT: or %s9, 0, %s11
; CHECK-NEXT: lea %s13, -208 ; CHECK-NEXT: lea %s11, -208(, %s11)
; CHECK-NEXT: and %s13, %s13, (32)0
; CHECK-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECK-NEXT: brge.l.t %s11, %s8, .LBB3_2 ; CHECK-NEXT: brge.l.t %s11, %s8, .LBB3_2
; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: ld %s61, 24(, %s14) ; CHECK-NEXT: ld %s61, 24(, %s14)
; CHECK-NEXT: or %s62, 0, %s0 ; CHECK-NEXT: or %s62, 0, %s0
; CHECK-NEXT: lea %s63, 315 ; CHECK-NEXT: lea %s63, 315
; CHECK-NEXT: shm.l %s63, (%s61) ; CHECK-NEXT: shm.l %s63, (%s61)
; CHECK-NEXT: shm.l %s8, 8(%s61) ; CHECK-NEXT: shm.l %s8, 8(%s61)
; CHECK-NEXT: shm.l %s11, 16(%s61) ; CHECK-NEXT: shm.l %s11, 16(%s61)
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define i8* @test_frame64(i8* %0) { define i8* @test_frame64(i8* %0) {
; CHECK-LABEL: test_frame64: ; CHECK-LABEL: test_frame64:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: st %s9, (, %s11) ; CHECK-NEXT: st %s9, (, %s11)
; CHECK-NEXT: st %s10, 8(, %s11) ; CHECK-NEXT: st %s10, 8(, %s11)
; CHECK-NEXT: st %s15, 24(, %s11) ; CHECK-NEXT: st %s15, 24(, %s11)
; CHECK-NEXT: st %s16, 32(, %s11) ; CHECK-NEXT: st %s16, 32(, %s11)
; CHECK-NEXT: or %s9, 0, %s11 ; CHECK-NEXT: or %s9, 0, %s11
; CHECK-NEXT: lea %s13, -240 ; CHECK-NEXT: lea %s11, -240(, %s11)
; CHECK-NEXT: and %s13, %s13, (32)0
; CHECK-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECK-NEXT: brge.l.t %s11, %s8, .LBB4_2 ; CHECK-NEXT: brge.l.t %s11, %s8, .LBB4_2
; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: ld %s61, 24(, %s14) ; CHECK-NEXT: ld %s61, 24(, %s14)
; CHECK-NEXT: or %s62, 0, %s0 ; CHECK-NEXT: or %s62, 0, %s0
; CHECK-NEXT: lea %s63, 315 ; CHECK-NEXT: lea %s63, 315
; CHECK-NEXT: shm.l %s63, (%s61) ; CHECK-NEXT: shm.l %s63, (%s61)
; CHECK-NEXT: shm.l %s8, 8(%s61) ; CHECK-NEXT: shm.l %s8, 8(%s61)
; CHECK-NEXT: shm.l %s11, 16(%s61) ; CHECK-NEXT: shm.l %s11, 16(%s61)
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define i8* @test_frame128(i8* %0) { define i8* @test_frame128(i8* %0) {
; CHECK-LABEL: test_frame128: ; CHECK-LABEL: test_frame128:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: st %s9, (, %s11) ; CHECK-NEXT: st %s9, (, %s11)
; CHECK-NEXT: st %s10, 8(, %s11) ; CHECK-NEXT: st %s10, 8(, %s11)
; CHECK-NEXT: st %s15, 24(, %s11) ; CHECK-NEXT: st %s15, 24(, %s11)
; CHECK-NEXT: st %s16, 32(, %s11) ; CHECK-NEXT: st %s16, 32(, %s11)
; CHECK-NEXT: or %s9, 0, %s11 ; CHECK-NEXT: or %s9, 0, %s11
; CHECK-NEXT: lea %s13, -304 ; CHECK-NEXT: lea %s11, -304(, %s11)
; CHECK-NEXT: and %s13, %s13, (32)0
; CHECK-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECK-NEXT: brge.l.t %s11, %s8, .LBB5_2 ; CHECK-NEXT: brge.l.t %s11, %s8, .LBB5_2
; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: ld %s61, 24(, %s14) ; CHECK-NEXT: ld %s61, 24(, %s14)
; CHECK-NEXT: or %s62, 0, %s0 ; CHECK-NEXT: or %s62, 0, %s0
; CHECK-NEXT: lea %s63, 315 ; CHECK-NEXT: lea %s63, 315
; CHECK-NEXT: shm.l %s63, (%s61) ; CHECK-NEXT: shm.l %s63, (%s61)
; CHECK-NEXT: shm.l %s8, 8(%s61) ; CHECK-NEXT: shm.l %s8, 8(%s61)
; CHECK-NEXT: shm.l %s11, 16(%s61) ; CHECK-NEXT: shm.l %s11, 16(%s61)
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define i8* @test_frame65536(i8* %0) { define i8* @test_frame65536(i8* %0) {
; CHECK-LABEL: test_frame65536: ; CHECK-LABEL: test_frame65536:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: st %s9, (, %s11) ; CHECK-NEXT: st %s9, (, %s11)
; CHECK-NEXT: st %s10, 8(, %s11) ; CHECK-NEXT: st %s10, 8(, %s11)
; CHECK-NEXT: st %s15, 24(, %s11) ; CHECK-NEXT: st %s15, 24(, %s11)
; CHECK-NEXT: st %s16, 32(, %s11) ; CHECK-NEXT: st %s16, 32(, %s11)
; CHECK-NEXT: or %s9, 0, %s11 ; CHECK-NEXT: or %s9, 0, %s11
; CHECK-NEXT: lea %s13, -65712 ; CHECK-NEXT: lea %s11, -65712(, %s11)
; CHECK-NEXT: and %s13, %s13, (32)0
; CHECK-NEXT: lea.sl %s11, -1(%s13, %s11)
; CHECK-NEXT: brge.l.t %s11, %s8, .LBB6_2 ; CHECK-NEXT: brge.l.t %s11, %s8, .LBB6_2
; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: ld %s61, 24(, %s14) ; CHECK-NEXT: ld %s61, 24(, %s14)
; CHECK-NEXT: or %s62, 0, %s0 ; CHECK-NEXT: or %s62, 0, %s0
; CHECK-NEXT: lea %s63, 315 ; CHECK-NEXT: lea %s63, 315
; CHECK-NEXT: shm.l %s63, (%s61) ; CHECK-NEXT: shm.l %s63, (%s61)
; CHECK-NEXT: shm.l %s8, 8(%s61) ; CHECK-NEXT: shm.l %s8, 8(%s61)
; CHECK-NEXT: shm.l %s11, 16(%s61) ; CHECK-NEXT: shm.l %s11, 16(%s61)
▲ Show 20 Lines • Show All 57 Lines • Show Last 20 Lines