[llvm-mca] Fix processing thumb instruction set

[evgeny777]

Summary

ATM, there are two kind of problems with thumb instructions (both cause assertion in InstrBuilder)

1. Incorrect detection of variadic ops

Some thumb instructions (like tMOVSr) have less number of operands in their MCInstrDesc than MCInst.getNumOperands(). This makes llvm-mca beleive those are variadic, while they're not.

2. Detcting more explicit defs than there actually are.

This happens because Thumb target defines CPSR (s_cc_out) as output operand (ARM target defines it as input),

[andreadb]

llvm/lib/MCA/InstrBuilder.cpp

305–306

Does it mean that the OptionalDef operand for Thumb instructions is always at index NumExplicitDefs-1 (rather than at index MCDesc.getNumOperands() - 1)?
Is the OptionalDef already counted as an explicit operand? That's really odd...

This change breaks the assumptions made by the loop at line 348. The assumption is that implicit definitions always follow explicit definitions. By decreasing NumExplicitDefs you are also affecting how that loop iterates over the implicit definitions.

About the code comment: it should mention the issue with the optional def being already counted as an explicit definition.

308

Shouldn't we update also TotalDefs? Otherwise we reserve the wrong number of writes at line 312.

310–311

Some Thumb instructions (like tMOVSr) have less number of operands in their MCInstrDesc than MCInst.getNumOperands()

Could you elaborate this a bit more? It is a bit concerning that there is a mismatch in the number of operands. What are exactly these extra operands?

I need to understand if the assumptions made by this algorithm are still valid. Specifically, I need to understand if all of the assumptions described in the comment starting at line 256 are still valid. Can we still guarantee that "Uses always start at index #(MCDesc.getNumDefs())"? Is the order of writes still preserved?

312

See my previous comment about the value ot TotalDefs.

349

After your change, NumExplicitDefs may no longer match the value of MCDesc.getNumDefs().
The value of Index is incorrect computed for Thumb instructions that have an optional def. For those instructions, when CurrentDef is zero, Index references the OptionalDef operand.

[evgeny777]

llvm/lib/MCA/InstrBuilder.cpp

305–306

Does it mean that the OptionalDef operand for Thumb instructions is always at index NumExplicitDefs-1

Yes, for Thumb1 only. Thumb2 instructions follow ARM rules
Just look at any Thumb1 instruction definition, which modifies CPSR:

def tADC {  // InstructionEncoding
//...
  dag OutOperandList = (outs tGPR:$Rdn, s_cc_out:$s);
//...
}

Unfortunately moving s_cc_out from the end of output operand list to the beginning of input operand list breaks too many things

Is the OptionalDef already counted as an explicit operand? That's really odd.

Yes, because it's in the output operand list

This change breaks the assumptions made by the loop at line 348. The assumption is that implicit definitions always follow explicit definitions.

Thumb1 instructions with optional def do not have implicit operands, however I'll fix this in upcoming update

308

I think we do a fixup in the end of populateWrites function

ID.Writes.resize(CurrentDef);

310–311

Could you elaborate this a bit more? It is a bit concerning that there is a mismatch in the number of operands. What are exactly these extra operands?

If you look at tMOVSr you'll find out that it has 4 operands. For instance movs r2, r3 is assembled to:

<MCInst #4275 tMOVSr <MCOperand Reg:74> <MCOperand Reg:75> <MCOperand Imm:14> <MCOperand Reg:0>>

The last two args are, I beleive, built-in ARMCC::AL predicate

However tMOVSr definition lists only 2 arguments:

def tMOVSr {  // InstructionEncoding
// ...
  dag OutOperandList = (outs tGPR:$Rd);
  dag InOperandList = (ins tGPR:$Rm);
// ...
}

InstrBuilder incorrectly treats tMOVSr as variadic, because 4 != 2

[evgeny777]

• Added check for Thumb1, because Thumb2 instructions follow different encoding rules
• Added comments

[dmgreen]

llvm/lib/MCA/InstrBuilder.cpp

251

Please don't rely on ThumbFrm, a lot of those flags are legacy and should be removed.

I was hoping that this wouldn't have to say "if (thumb)" anywhere, even if the instructions are a little odd. Can it check the position of the optional def instead? So it detects instructions like this, without having to be target dependent.

305–306

Yes. Optional Defs are a little unfortunate, but have been around for a long time and I wouldn't recommend the major changes needed to alter how they work.

310–311

This one sounds like a bug to me. Maybe in the AsmParsing? MOVS can't be used in IT blocks, so probably shouldn't use predicated. If you look at PR36658.mir, it looks like $r1 = tMOVSr $r0, implicit-def dead $cpsr

[evgeny777]

llvm/lib/MCA/InstrBuilder.cpp

251

Can it check the position of the optional def instead

Do you have an idea how to do this? One has to distinguish
a) Instruction that writes to single register and optionally modifies CPSR (Thumb1)
b) Instruction that writes to two registers and optionally modifies CPSR (ARM, Thumb2)

310–311

This one sounds like a bug to me

May be. I tried to address this in disassembler, but it broke a lot of stuff.

Here is a piece from ARMDisassembler.cpp

// A few instructions actually have predicates encoded in them.  Don't
// try to overwrite it if we're seeing one of those.
switch (MI.getOpcode()) {
  case ARM::tBcc:
  case ARM::t2Bcc:
  case ARM::tCBZ:
  case ARM::tCBNZ:
  case ARM::tCPS:
  case ARM::t2CPS3p:
  case ARM::t2CPS2p:
  case ARM::t2CPS1p:
  case ARM::t2CSEL:
  case ARM::t2CSINC:
  case ARM::t2CSINV:
  case ARM::t2CSNEG:
  case ARM::tMOVSr:
  case ARM::tSETEND:

[andreadb]

Thanks for the updated patch.

I wonder if we could use MCOperandInfo::isOptionalDef() to identify the index of an optional definition.
That being said, I leave the review of IsThumb1OptDefInst to you and @dmgreen as I am not very familiar with the MC lowering of Thumb1 instructions.
The rest of the patch looks good to me.

llvm/lib/MCA/InstrBuilder.cpp

308

You are right. That should be enough. Thanks for checking.

[dmgreen]

llvm/lib/MCA/InstrBuilder.cpp

251

Can we just check which operand it is? Use MCDesc.OpInfo[i].isOptionalDef()? Can we just skip it in that case?

310–311

It's possibly this code from ARMAsmParser:

TmpInst.setOpcode(Inst.getOperand(4).getReg() ? ARM::tMOVSr : ARM::tMOVr);
TmpInst.addOperand(Inst.getOperand(0));
TmpInst.addOperand(Inst.getOperand(1));
TmpInst.addOperand(Inst.getOperand(2));
TmpInst.addOperand(Inst.getOperand(3));

[evgeny777]

Addressed. Thanks for insights!

[dmgreen]

llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp

10312 ↗

(On Diff #307254)

Do you mind pulling this out into it's own review. I think it's fine, but just in case it probably deserves to be it's own patch.

The test can stay here, so long as there is some test for movs rm, rn.

[andreadb]

A couple of minor nits. Otherwise the llvm-mca change looks good.
Thanks.

llvm/lib/MCA/InstrBuilder.cpp

261–263

This comment should be updated now.

By default, the optional register definition is still expected to be the last operand. However, it can also be one of the explicit defs.
The rest of this logic still works under the assumption that instructions can only declare a single optional register definition at most.

317

Instead of -1, you could just default to MCDesc.getNumOperands() - 1.
That way, the statement at line 381 becomes a simple assignment with no conditional expression.

[evgeny777]

Addressed. Revision now depends on D92029

[andreadb]

LGTM

llvm/lib/MCA/InstrBuilder.cpp

323–324

This comment can be removed. It is no longer a Thumb1 thing only.

llvm/lib/MCA/InstrBuilder.cpp

if (I == MCI.getNumOperands() || !Op.isReg()) {
       return make_error<InstructionError<MCInst>>(Message, MCI);
     }
   }
 
   return ErrorSuccess();
 }
 
 void InstrBuilder::populateWrites(InstrDesc &ID, const MCInst &MCI,
                                   unsigned SchedClassID) {
   const MCInstrDesc &MCDesc = MCII.get(MCI.getOpcode());
   const MCSchedModel &SM = STI.getSchedModel();
   const MCSchedClassDesc &SCDesc = *SM.getSchedClassDesc(SchedClassID);
 
   // Assumptions made by this algorithm:
   //  1. The number of explicit and implicit register definitions in a MCInst
   //     matches the number of explicit and implicit definitions according to
   //     the opcode descriptor (MCInstrDesc).
   //  2. Uses start at index #(MCDesc.getNumDefs()).
   //  3. There can only be a single optional register definition, an it is
   //     always the last operand of the sequence (excluding extra operands
   //     contributed by variadic opcodes).
   //
   // These assumptions work quite well for most out-of-order in-tree targets
   // like x86. This is mainly because the vast majority of instructions is
   // expanded to MCInst using a straightforward lowering logic that preserves
   // the ordering of the operands.
   //
   // About assumption 1.
   // The algorithm allows non-register operands between register operand
void InstrBuilder::populateWrites(InstrDesc &ID, const MCInst &MCI,
   // That means, register R1 from the example is both read and written.
   unsigned NumExplicitDefs = MCDesc.getNumDefs();
   unsigned NumImplicitDefs = MCDesc.getNumImplicitDefs();
   unsigned NumWriteLatencyEntries = SCDesc.NumWriteLatencyEntries;
   unsigned TotalDefs = NumExplicitDefs + NumImplicitDefs;
   if (MCDesc.hasOptionalDef())
     TotalDefs++;
 
-  unsigned NumVariadicOps = MCI.getNumOperands() - MCDesc.getNumOperands();
+  bool IsThumb = STI.getTargetTriple().isThumb();
+  // Thumb target specifies CPSR (s_cc_out) as an output operand
+  if (IsThumb && MCDesc.hasOptionalDef())
+    NumExplicitDefs--;
+
+  unsigned NumVariadicOps =
+      MCDesc.isVariadic() ? MCI.getNumOperands() - MCDesc.getNumOperands() : 0;
   ID.Writes.resize(TotalDefs + NumVariadicOps);
   // Iterate over the operands list, and skip non-register operands.
   // The first NumExplicitDefs register operands are expected to be register
   // definitions.
   unsigned CurrentDef = 0;
   unsigned i = 0;
   for (; i < MCI.getNumOperands() && CurrentDef < NumExplicitDefs; ++i) {
     const MCOperand &Op = MCI.getOperand(i);
     if (!Op.isReg())
       continue;
 
     WriteDescriptor &Write = ID.Writes[CurrentDef];
     Write.OpIndex = i;
     if (CurrentDef < NumWriteLatencyEntries) {
       const MCWriteLatencyEntry &WLE =
           *STI.getWriteLatencyEntry(&SCDesc, CurrentDef);
       // Conservatively default to MaxLatency.
       Write.Latency =
           WLE.Cycles < 0 ? ID.MaxLatency : static_cast<unsigned>(WLE.Cycles);
       Write.SClassOrWriteResourceID = WLE.WriteResourceID;
     } else {
       // Assign a default latency for this write.
       Write.Latency = ID.MaxLatency;
       Write.SClassOrWriteResourceID = 0;
     }
     Write.IsOptionalDef = false;
     LLVM_DEBUG({
       dbgs() << "\t\t[Def]    OpIdx=" << Write.OpIndex
              << ", Latency=" << Write.Latency
              << ", WriteResourceID=" << Write.SClassOrWriteResourceID << '\n';
     });
     CurrentDef++;
   }
 
   assert(CurrentDef == NumExplicitDefs &&
          "Expected more register operand definitions.");
   for (CurrentDef = 0; CurrentDef < NumImplicitDefs; ++CurrentDef) {
     unsigned Index = NumExplicitDefs + CurrentDef;
     WriteDescriptor &Write = ID.Writes[Index];
     Write.OpIndex = ~CurrentDef;
     Write.RegisterID = MCDesc.getImplicitDefs()[CurrentDef];
     if (Index < NumWriteLatencyEntries) {
       const MCWriteLatencyEntry &WLE =
           *STI.getWriteLatencyEntry(&SCDesc, Index);
       // Conservatively default to MaxLatency.
       Write.Latency =
LLVM_DEBUG({
              << ", PhysReg=" << MRI.getName(Write.RegisterID)
              << ", Latency=" << Write.Latency
              << ", WriteResourceID=" << Write.SClassOrWriteResourceID << '\n';
     });
   }
 
   if (MCDesc.hasOptionalDef()) {
     WriteDescriptor &Write = ID.Writes[NumExplicitDefs + NumImplicitDefs];
-    Write.OpIndex = MCDesc.getNumOperands() - 1;
+    Write.OpIndex = IsThumb ? NumExplicitDefs : MCDesc.getNumOperands() - 1;
     // Assign a default latency for this write.
     Write.Latency = ID.MaxLatency;
     Write.SClassOrWriteResourceID = 0;
     Write.IsOptionalDef = true;
     LLVM_DEBUG({
       dbgs() << "\t\t[Def][O] OpIdx=" << Write.OpIndex
              << ", Latency=" << Write.Latency
              << ", WriteResourceID=" << Write.SClassOrWriteResourceID << '\n';

llvm/test/tools/llvm-mca/ARM/cortex-a57-thumb.s

+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=thumbv8 -mcpu=cortex-a57 -instruction-tables < %s | FileCheck %s
+
+  .text
+  adc r0, r1, #4
+  adcs  r0, r1, #0
+  adc r1, r2, #255
+  adc r3, r7, #5570645
+  adc r8, r12, #2852170240
+  adc r9, r7, #2779096485
+  adc r5, r3, #2264924160
+  adc r4, r2, #2139095040
+  adc r4, r2, #1664
+  adc.w r4, r5, r6
+  adcs.w  r4, r5, r6
+  adc.w r9, r1, r3
+  adcs.w  r9, r1, r3
+  adc.w r0, r1, r3, ror #4
+  adcs.w  r0, r1, r3, lsl #7
+  adc.w r0, r1, r3, lsr #31
+  adcs.w  r0, r1, r3, asr #32
+  itet  eq
+  addeq r1, r2, #4
+  addwne  r5, r3, #1023
+  addweq  r4, r5, #293
+  add.w r2, sp, #1024
+  add.w r2, r8, #65280
+  addw  r2, r3, #257
+  add.w r12, r6, #256
+  addw  r12, r6, #256
+  adds.w  r1, r2, #496
+  add.w r1, r2, r8
+  add.w r5, r9, r2, asr #32
+  adds.w  r7, r3, r1, lsl #31
+  adds.w  r0, r3, r6, lsr #25
+  add.w r4, r8, r1, ror #12
+  adr.w r11, #-3270
+  adr.w r11, #-826
+  subw  r1, pc, #0
+  adr.w r0, #1024
+  and r2, r5, #1044480
+  ands  r3, r12, #15
+  and r1, r1, #255
+  and.w r4, r9, r8
+  and.w r1, r4, r8, asr #3
+  ands.w  r2, r1, r7, lsl #1
+  ands.w  r4, r5, r2, lsr #20
+  and.w r9, r12, r1, ror #17
+  asr.w r2, r3, #12
+  asrs.w  r8, r3, #32
+  asrs.w  r2, r3, #1
+  asr.w r2, r3, #4
+  asrs.w  r2, r12, #15
+  asr.w r3, r3, #19
+  asrs.w  r8, r8, #2
+  asrs.w  r7, r7, #5
+  asr.w r12, r12, #21
+  asr.w r3, r4, r2
+  asr.w r1, r1, r2
+  asrs.w  r3, r4, r8
+  bmi.w #-183396
+  b.w #208962
+  b.w #-16777216
+  bfc r5, #3, #17
+  it  lo
+  bfclo r5, #3, #17
+  bfi r5, r2, #3, #17
+  it  ne
+  bfine r5, r2, #3, #17
+  bfi r6, r0, #0, #32
+  bfi r6, r0, #31, #1
+  bic r10, r1, #15
+  bic.w r12, r3, r6
+  bic.w r11, r2, r6, lsl #12
+  bic.w r8, r4, r1, lsr #11
+  bic.w r7, r5, r7, lsr #15
+  bic.w r6, r7, r9, asr #32
+  bic.w r5, r6, r8, ror #1
+  bic r1, r1, #15
+  bic.w r1, r1, r1
+  bic.w r4, r4, r2, lsl #31
+  bic.w r6, r6, r3, lsr #12
+  bic.w r7, r7, r4, lsr #7
+  bic.w r8, r8, r5, asr #15
+  bic.w r12, r12, r6, ror #29
+  bxj r5
+  it  ne
+  bxjne r7
+  cbnz  r7, #6
+  cbnz  r7, #12
+  cbz r4, #64
+  strh  r6, [r5, #14]
+  asrs  r7, r2, #4
+  strh  r6, [r7, #14]
+  itett ne
+  cmpne r7, #243
+  addeq r7, r1, r2
+  itttt lt
+  cmplt r7, #243
+  uxthlt  r7, r1
+  strhlt  r2, [r7, #22]
+  lsrlt r1, r6, #3
+  uxthne  r7, r7
+  strh  r2, [r7, #22]
+  asrs  r1, r6, #7
+  lsrs  r1, r6, #31
+  adds  r7, r1, r0
+  lsls  r3, r5, #27
+  asrs  r7, r1, #4
+  strh  r3, [r5, #54]
+  asrs  r7, r5, #4
+  str r6, [sp, #940]
+  adds  r7, r5, #4
+  str r6, [sp, #940]
+  asrs  r7, r5, #4
+  adr r6, #940
+  asrs  r7, r5, #4
+  cmp r7, #182
+  cmp.w r5, #65280
+  cmp.w r4, r12
+  cmp.w r9, r6, lsl #12
+  cmp.w r3, r7, lsr #31
+  cmp.w sp, r6, lsr #1
+  cmp.w r2, r5, asr #24
+  cmp.w r1, r4, ror #15
+  dbg #5
+  dbg #0
+  dbg #15
+  dmb sy
+  dmb st
+  dmb ld
+  dmb #0xc
+  dmb ish
+  dmb ishst
+  dmb ishld
+  dmb #0x8
+  dmb nsh
+  dmb nshst
+  dmb nshld
+  dmb #0x4
+  dmb osh
+  dmb oshst
+  dmb oshld
+  dmb #0x0
+  dsb sy
+  dsb st
+  dsb ld
+  dsb #0xc
+  dsb ish
+  dsb ishst
+  dsb ishld
+  dsb #0x8
+  dsb nsh
+  dsb nshst
+  dsb nshld
+  pssbb
+  dsb osh
+  dsb oshst
+  dsb oshld
+  ssbb
+  eor r4, r5, #61440
+  eor.w r4, r5, r6
+  eor.w r4, r5, r6, lsl #5
+  eor.w r4, r5, r6, lsr #5
+  eor.w r4, r5, r6, lsr #5
+  eor.w r4, r5, r6, asr #5
+  eor.w r4, r5, r6, ror #5
+  isb sy
+  isb #0xa
+  iteet eq
+  addeq r0, r1, r2
+  nopne
+  subne r5, r6, r7
+  addeq r1, r2, #4
+  ittee ls
+  addls r0, r1, r2
+  nopls
+  subhi r5, r6, r7
+  addhi r1, r2, #4
+  ldm.w  r4, {r4, r5, r8, r9}
+  ldm.w r4, {r5, r6}
+  ldm.w r5!, {r3, r8}
+  ldm.w  r4, {r4, r5, r8, r9}
+  ldm.w r4, {r5, r6}
+  ldm.w r5!, {r3, r8}
+  ldm.w r5!, {r1, r2}
+  ldm.w r2, {r1, r2}
+  ldm.w  r4, {r4, r5, r8, r9}
+  ldm.w r4, {r5, r6}
+  ldm.w r5!, {r3, r8}
+  ldm.w  r4, {r4, r5, r8, r9}
+  ldm.w r4, {r5, r6}
+  ldm.w r5!, {r3, r8}
+  ldm.w r5!, {r3, r8}
+  ldmdb  r4, {r4, r5, r8, r9}
+  ldmdb r4, {r5, r6}
+  ldmdb r5!, {r3, r8}
+  ldmdb r5!, {r3, r8}
+  ldr r5, [r5, #-4]
+  ldr r5, [r6, #32]
+  ldr.w r5, [r6, #33]
+  ldr.w r5, [r6, #257]
+  ldr.w pc, [r7, #257]
+  ldr.w r4, [pc, #-0]
+  ldr.w r2, [pc, #-40]
+  ldr.w r1, [pc, #1024]
+  ldr.w r1, [r8, r1]
+  ldr.w r4, [r5, r2]
+  ldr.w  r6, [r0, r2, lsl #3]
+  ldr.w  r8, [r8, r2, lsl #2]
+  ldr.w  r7, [sp, r2, lsl #1]
+  ldr.w r7, [sp, r2]
+  ldr pc, [sp], #12
+  ldr r2, [r4, #255]!
+  ldr r8, [sp, #4]!
+  ldr lr, [sp, #-4]!
+  ldr lr, [sp, #0]!
+  ldr r2, [r4], #255
+  ldr r8, [sp], #4
+  ldr lr, [sp], #-4
+  ldrb  r5, [r5, #-4]
+  ldrb.w  r5, [r6, #32]
+  ldrb.w  r5, [r6, #33]
+  ldrb.w  r5, [r6, #257]
+  ldrb.w  lr, [r7, #257]
+  ldrb.w  r1, [r8, r1]
+  ldrb.w  r4, [r5, r2]
+  ldrb.w  r6, [r0, r2, lsl #3]
+  ldrb.w  r8, [r8, r2, lsl #2]
+  ldrb.w  r7, [sp, r2, lsl #1]
+  ldrb.w  r7, [sp, r2]
+  ldrb  r5, [r8, #255]!
+  ldrb  r2, [r5, #4]!
+  ldrb  r1, [r4, #-4]!
+  ldrb  r1, [r4, #0]!
+  ldrb  lr, [r3], #255
+  ldrb  r9, [r2], #4
+  ldrb  r3, [sp], #-4
+  ldrb.w  r6, [pc, #-0]
+  ldrb.w  r10, [pc, #227]
+  ldrb.w  r5, [pc, #0]
+  ldrbt r1, [r2]
+  ldrbt r1, [r8]
+  ldrbt r1, [r8, #3]
+  ldrbt r1, [r8, #255]
+  ldrd  r3, r5, [r6, #24]
+  ldrd  r3, r5, [r6, #24]!
+  ldrd  r3, r5, [r6], #4
+  ldrd  r3, r5, [r6], #-8
+  ldrd  r3, r5, [r6]
+  ldrd  r8, r1, [r3]
+  ldrd  r0, r1, [r2], #-0
+  ldrd  r0, r1, [r2, #-0]!
+  ldrd  r0, r1, [r2, #0]!
+  ldrd  r0, r1, [r2, #-0]
+  ldrd  r1, r1, [r0], #0
+  ldrex r1, [r4]
+  ldrex r8, [r4]
+  ldrex r2, [sp, #128]
+  ldrexb  r5, [r7]
+  ldrexh  r9, [r12]
+  ldrexd  r9, r3, [r4]
+  ldrh  r5, [r5, #-4]
+  ldrh  r5, [r6, #32]
+  ldrh.w  r5, [r6, #33]
+  ldrh.w  r5, [r6, #257]
+  ldrh.w  lr, [r7, #257]
+  ldrh.w  r1, [r8, r1]
+  ldrh.w  r4, [r5, r2]
+  ldrh.w  r6, [r0, r2, lsl #3]
+  ldrh.w  r8, [r8, r2, lsl #2]
+  ldrh.w  r7, [sp, r2, lsl #1]
+  ldrh.w  r7, [sp, r2]
+  ldrh  r5, [r8, #255]!
+  ldrh  r2, [r5, #4]!
+  ldrh  r1, [r4, #-4]!
+  ldrh  r1, [r4, #0]!
+  ldrh  lr, [r3], #255
+  ldrh  r9, [r2], #4
+  ldrh  r3, [sp], #-4
+  ldrh.w  r7, [pc, #-0]
+  ldrh.w  r5, [pc, #121]
+  ldrh.w  r4, [pc, #0]
+  ldrsb r5, [r5, #-4]
+  ldrsb.w r5, [r6, #32]
+  ldrsb.w r5, [r6, #33]
+  ldrsb.w r5, [r6, #257]
+  ldrsb.w lr, [r7, #257]
+  ldrsb.w r1, [r8, r1]
+  ldrsb.w r4, [r5, r2]
+  ldrsb.w  r6, [r0, r2, lsl #3]
+  ldrsb.w  r8, [r8, r2, lsl #2]
+  ldrsb.w  r7, [sp, r2, lsl #1]
+  ldrsb.w r7, [sp, r2]
+  ldrsb r5, [r8, #255]!
+  ldrsb r2, [r5, #4]!
+  ldrsb r1, [r4, #-4]!
+  ldrsb r1, [r4, #0]!
+  ldrsb lr, [r3], #255
+  ldrsb r9, [r2], #4
+  ldrsb r3, [sp], #-4
+  ldrsb.w r0, [pc, #-0]
+  ldrsb.w r12, [pc, #80]
+  ldrsb.w r3, [pc, #0]
+  ldrsbt  r1, [r2]
+  ldrsbt  r1, [r8]
+  ldrsbt  r1, [r8, #3]
+  ldrsbt  r1, [r8, #255]
+  ldrsh r5, [r5, #-4]
+  ldrsh.w r5, [r6, #32]
+  ldrsh.w r5, [r6, #33]
+  ldrsh.w r5, [r6, #257]
+  ldrsh.w lr, [r7, #257]
+  ldrsh r10, [r5, #-0]
+  ldrsh.w r1, [r8, r1]
+  ldrsh.w r4, [r5, r2]
+  ldrsh.w  r6, [r0, r2, lsl #3]
+  ldrsh.w  r8, [r8, r2, lsl #2]
+  ldrsh.w  r7, [sp, r2, lsl #1]
+  ldrsh.w r7, [sp, r2]
+  ldrsh r5, [r8, #255]!
+  ldrsh r2, [r5, #4]!
+  ldrsh r1, [r4, #-4]!
+  ldrsh r1, [r4, #0]!
+  ldrsh lr, [r3], #255
+  ldrsh r9, [r2], #4
+  ldrsh r3, [sp], #-4
+  ldrsh.w r0, [pc, #-0]
+  ldrsh.w r10, [pc, #-231]
+  ldrsh.w r6, [pc, #0]
+  ldrsht  r1, [r2]
+  ldrsht  r1, [r8]
+  ldrsht  r1, [r8, #3]
+  ldrsht  r1, [r8, #255]
+  ldrt  r1, [r2]
+  ldrt  r2, [r6]
+  ldrt  r3, [r7, #3]
+  ldrt  r4, [r9, #255]
+  lsl.w r2, r3, #12
+  lsls.w  r8, r3, #31
+  lsls.w  r2, r3, #1
+  lsl.w r2, r3, #4
+  lsls.w  r2, r12, #15
+  lsl.w r3, r3, #19
+  lsls.w  r8, r8, #2
+  lsls.w  r7, r7, #5
+  lsl.w r12, r12, #21
+  lsl.w r3, r4, r2
+  lsl.w r1, r1, r2
+  lsls.w  r3, r4, r8
+  lsr.w r2, r3, #12
+  lsrs.w  r8, r3, #32
+  lsrs.w  r2, r3, #1
+  lsr.w r2, r3, #4
+  lsrs.w  r2, r12, #15
+  lsr.w r3, r3, #19
+  lsrs.w  r8, r8, #2
+  lsrs.w  r7, r7, #5
+  lsr.w r12, r12, #21
+  lsr.w r3, r4, r2
+  lsr.w r1, r1, r2
+  lsrs.w  r3, r4, r8
+  str r1, [sp, #952]
+  movs  r1, #87
+  str r1, [sp, #1016]
+  add r7, r10
+  ldrsb r1, [r6, r7]
+  ldrsb r1, [r6, r7]
+  mla r1, r2, r3, r4
+  mls r1, r2, r3, r4
+  movs  r1, #21
+  movs.w  r1, #21
+  movs.w  r8, #21
+  movw  r0, #65535
+  movw  r1, #43777
+  movw  r1, #43792
+  mov.w r0, #66846720
+  mov.w r0, #66846720
+  movs.w  r0, #66846720
+  movt  r3, #7
+  movt  r6, #65535
+  it  eq
+  movteq  r4, #4080
+  mrc  p14, #0, r1, c1, c2, #4
+  str r2, [sp, #1016]
+  strb  r6, [r3, r0]
+  asrs  r4, r5, #7
+  strb  r7, [r2, r1]
+  asrs  r4, r7, #7
+  mrs r8, apsr
+  mrs r8, spsr
+  msr APSR_nzcvq, r1
+  msr APSR_g, r2
+  msr APSR_nzcvq, r3
+  msr APSR_nzcvq, r4
+  msr APSR_nzcvqg, r5
+  msr CPSR_fc, r6
+  msr CPSR_c, r7
+  msr CPSR_x, r8
+  msr CPSR_fc, r9
+  msr CPSR_fc, r11
+  msr CPSR_fsx, r12
+  msr SPSR_fc, r0
+  msr SPSR_fsxc, r5
+  msr CPSR_fsxc, r8
+  muls  r3, r4, r3
+  mul r3, r4, r3
+  mul r3, r4, r6
+  it  eq
+  muleq r3, r4, r5
+  mvns  r8, #21
+  mvn r0, #66846720
+  mvns  r0, #66846720
+  itte  eq
+  mvnseq  r1, #12
+  mvneq r1, #12
+  mvnne r1, #12
+  mvn.w r2, r3
+  mvns  r2, r3
+  mvn.w r5, r6, lsl #19
+  mvn.w r5, r6, lsr #9
+  mvn.w r5, r6, asr #4
+  mvn.w r5, r6, ror #6
+  mvn.w r5, r6, rrx
+  it  eq
+  mvneq r2, r3
+  nop.w
+  orn r4, r5, #61440
+  orn r4, r5, r6
+  orns  r4, r5, r6
+  orn r4, r5, r6, lsl #5
+  orns  r4, r5, r6, lsr #5
+  orn r4, r5, r6, lsr #5
+  orns  r4, r5, r6, asr #5
+  orn r4, r5, r6, ror #5
+  orr r4, r5, #61440
+  orr.w r4, r5, r6
+  orr.w r4, r5, r6, lsl #5
+  orrs.w  r4, r5, r6, lsr #5
+  orr.w r4, r5, r6, lsr #5
+  orrs.w  r4, r5, r6, asr #5
+  orr.w r4, r5, r6, ror #5
+  pkhbt r2, r2, r3
+  pkhbt r2, r2, r3, lsl #31
+  pkhbt r2, r2, r3, lsl #15
+  pkhtb r2, r2, r3, asr #31
+  pkhtb r2, r2, r3, asr #15
+  pld [r5, #-4]
+  pld [r6, #32]
+  pld [r6, #33]
+  pld [r6, #257]
+  pld [r7, #257]
+  pld [r8, r1]
+  pld [r5, r2]
+  pld [r0, r2, lsl #3]
+  pld [r8, r2, lsl #2]
+  pld [sp, r2, lsl #1]
+  pld [sp, r2]
+  pld [pc, #-0]
+  pld [pc, #455]
+  pld [pc, #0]
+  pli [r5, #-4]
+  pli [r6, #32]
+  pli [r6, #33]
+  pli [r6, #257]
+  pli [r7, #257]
+  pli [r8, r1]
+  pli [r5, r2]
+  pli [r0, r2, lsl #3]
+  pli [r8, r2, lsl #2]
+  pli [sp, r2, lsl #1]
+  pli [sp, r2]
+  pli [pc, #-0]
+  pli [pc, #-328]
+  pli [pc, #0]
+  qadd  r1, r2, r3
+  qadd16  r1, r2, r3
+  qadd8 r1, r2, r3
+  itte  gt
+  qaddgt  r1, r2, r3
+  qadd16gt  r1, r2, r3
+  qadd8le r1, r2, r3
+  qdadd r6, r7, r8
+  qdsub r6, r7, r8
+  itt hi
+  qdaddhi r6, r7, r8
+  qdsubhi r6, r7, r8
+  qsax  r9, r12, r0
+  it  eq
+  qsaxeq  r9, r12, r0
+  qsub  r1, r2, r3
+  qsub16  r1, r2, r3
+  qsub8 r1, r2, r3
+  itet  le
+  qsuble  r1, r2, r3
+  qsub16gt  r1, r2, r3
+  qsub8le r1, r2, r3
+  rbit  r1, r2
+  it  ne
+  rbitne  r1, r2
+  rev.w r1, r2
+  rev.w r2, r8
+  itt ne
+  revne r1, r2
+  revne.w r1, r8
+  rev16.w r1, r2
+  rev16.w r2, r8
+  itt ne
+  rev16ne r1, r2
+  rev16ne.w r1, r8
+  revsh.w r1, r2
+  revsh.w r2, r8
+  itt ne
+  revshne r1, r2
+  revshne.w r1, r8
+  ror.w r2, r3, #12
+  rors.w  r8, r3, #31
+  rors.w  r2, r3, #1
+  ror.w r2, r3, #4
+  rors.w  r2, r12, #15
+  ror.w r3, r3, #19
+  rors.w  r8, r8, #2
+  rors.w  r7, r7, #5
+  ror.w r12, r12, #21
+  ror.w r3, r4, r2
+  ror.w r1, r1, r2
+  rors.w  r3, r4, r8
+  rrx r1, r2
+  rrxs  r1, r2
+  ite lt
+  rrxlt r9, r12
+  rrxsge  r8, r3
+  rsb.w r2, r5, #1044480
+  rsbs.w  r3, r12, #15
+  rsb.w r1, r1, #255
+  rsb r4, r4, r8
+  rsb r4, r9, r8
+  rsb r1, r4, r8, asr #3
+  rsbs  r2, r1, r7, lsl #1
+  sadd16  r3, r4, r8
+  it  ne
+  sadd16ne  r3, r4, r8
+  sadd8 r3, r4, r8
+  it  ne
+  sadd8ne r3, r4, r8
+  sasx  r9, r2, r7
+  it  ne
+  sasxne  r2, r5, r6
+  sbc r0, r1, #4
+  sbcs  r0, r1, #0
+  sbc r1, r2, #255
+  sbc r3, r7, #5570645
+  sbc r8, r12, #2852170240
+  sbc r9, r7, #2779096485
+  sbc r5, r3, #2264924160
+  sbc r4, r2, #2139095040
+  sbc r4, r2, #1664
+  sbc.w r4, r5, r6
+  sbcs.w  r4, r5, r6
+  sbc.w r9, r1, r3
+  sbcs.w  r9, r1, r3
+  sbc.w r0, r1, r3, ror #4
+  sbcs.w  r0, r1, r3, lsl #7
+  sbc.w r0, r1, r3, lsr #31
+  sbcs.w  r0, r1, r3, asr #32
+  sbfx  r4, r5, #16, #1
+  it  gt
+  sbfxgt  r4, r5, #16, #16
+  sel r5, r9, r2
+  it  le
+  selle r5, r9, r2
+  sev.w
+  it  eq
+  seveq.w
+  sadd16  r1, r2, r3
+  sadd8 r1, r2, r3
+  ite gt
+  sadd16gt  r1, r2, r3
+  sadd8le r1, r2, r3
+  shasx r4, r8, r2
+  it  gt
+  shasxgt r4, r8, r2
+  shsax r4, r8, r2
+  it  gt
+  shsaxgt r4, r8, r2
+  shsub16 r4, r8, r2
+  shsub8  r4, r8, r2
+  itt gt
+  shsub16gt r4, r8, r2
+  shsub8gt  r4, r8, r2
+  smlabb  r3, r1, r9, r0
+  smlabt  r5, r6, r4, r1
+  smlatb  r4, r2, r3, r2
+  smlatt  r8, r3, r8, r4
+  itete gt
+  smlabbgt  r3, r1, r9, r0
+  smlabtle  r5, r6, r4, r1
+  smlatbgt  r4, r2, r3, r2
+  smlattle  r8, r3, r8, r4
+  smlad r2, r3, r5, r8
+  smladx  r2, r3, r5, r8
+  itt hi
+  smladhi r2, r3, r5, r8
+  smladxhi  r2, r3, r5, r8
+  smlal r2, r3, r5, r8
+  it  eq
+  smlaleq r2, r3, r5, r8
+  smlalbb r3, r1, r9, r0
+  smlalbt r5, r6, r4, r1
+  smlaltb r4, r2, r3, r2
+  smlaltt r8, r3, r8, r4
+  iteet ge
+  smlalbbge r3, r1, r9, r0
+  smlalbtlt r5, r6, r4, r1
+  smlaltblt r4, r2, r3, r2
+  smlalttge r8, r3, r8, r4
+  smlald  r2, r3, r5, r8
+  smlaldx r2, r3, r5, r8
+  ite eq
+  smlaldeq  r2, r3, r5, r8
+  smlaldxne r2, r3, r5, r8
+  smlawb  r2, r3, r10, r8
+  smlawt  r8, r3, r5, r9
+  ite eq
+  smlawbeq  r2, r7, r5, r8
+  smlawtne  r1, r3, r0, r8
+  smlsd r2, r3, r5, r8
+  smlsdx  r2, r3, r5, r8
+  ite le
+  smlsdle r2, r3, r5, r8
+  smlsdxgt  r2, r3, r5, r8
+  smlsld  r2, r9, r5, r1
+  smlsldx r4, r11, r2, r8
+  ite ge
+  smlsldge  r8, r2, r5, r6
+  smlsldxlt r1, r0, r3, r8
+  smmla r1, r2, r3, r4
+  smmlar  r4, r3, r2, r1
+  ite lo
+  smmlalo r1, r2, r3, r4
+  smmlarhs  r4, r3, r2, r1
+  smmls r1, r2, r3, r4
+  smmlsr  r4, r3, r2, r1
+  ite lo
+  smmlslo r1, r2, r3, r4
+  smmlsrhs  r4, r3, r2, r1
+  ssat  r9, #30, r0, asr #2
+  str r10, [r11], #0
+  strd  r1, r1, [r0], #0
+  strd  r6, r3, [r5], #-8
+  strd  r8, r5, [r5], #-0
+  strd  r7, r4, [r5], #-4
+  strd  r0, r1, [r2, #-0]!
+  strd  r0, r1, [r2, #0]!
+  strd  r0, r1, [r2, #-0]
+  strex r1, r8, [r4]
+  strex r8, r2, [r4]
+  strex  r2, r12, [sp, #128]
+  strexb  r5, r1, [r7]
+  strexh  r9, r7, [r12]
+  strexd  r9, r3, r6, [r4]
+  strh  r5, [r5, #-4]
+  strh  r5, [r6, #32]
+  strh.w  r5, [r6, #33]
+  strh.w  r5, [r6, #257]
+  strh.w  lr, [r7, #257]
+  strh  r5, [r8, #255]!
+  strh  r2, [r5, #4]!
+  strh  r1, [r4, #-4]!
+  strh  r1, [r4, #0]!
+  strh  lr, [r3], #255
+  strh  r9, [r2], #4
+  strh  r3, [sp], #-4
+  strh.w  r1, [r8, r1]
+  strh.w  r4, [r5, r2]
+  strh.w  r6, [r0, r2, lsl #3]
+  strh.w  r8, [r8, r2, lsl #2]
+  strh.w  r7, [sp, r2, lsl #1]
+  strh.w  r7, [sp, r2]
+  strht r1, [r2]
+  strht r1, [r8]
+  strht r1, [r8, #3]
+  strht r1, [r8, #255]
+  strt  r1, [r2]
+  strt  r1, [r8]
+  strt  r1, [r8, #3]
+  strt  r1, [r8, #255]
+  itet  eq
+  subeq r1, r2, #4
+  subwne  r5, r3, #1023
+  subweq  r4, r5, #293
+  sub.w r2, sp, #1024
+  sub.w r2, r8, #65280
+  subw  r2, r3, #257
+  sub.w r12, r6, #256
+  subw  r12, r6, #256
+  subs.w  r1, r2, #496
+  subs  pc, lr, #4
+  sub.w r4, r5, r6
+  sub.w r4, r5, r6, lsl #5
+  sub.w r4, r5, r6, lsr #5
+  sub.w r4, r5, r6, lsr #5
+  sub.w r4, r5, r6, asr #5
+  sub.w r4, r5, r6, ror #5
+  sub.w r5, r2, r12, rrx
+  svc #0
+  ite eq
+  svceq #255
+  svcne #33
+  sxtab r2, r3, r4
+  sxtab r4, r5, r6
+  it  lt
+  sxtablt r6, r2, r9, ror #8
+  sxtab r5, r1, r4, ror #16
+  sxtab r7, r8, r3, ror #24
+  sxtab16 r6, r2, r7
+  sxtab16 r3, r5, r8, ror #8
+  sxtab16 r3, r2, r1, ror #16
+  ite ne
+  sxtab16ne r0, r1, r4
+  sxtab16eq r1, r2, r3, ror #24
+  sxtah r1, r3, r9
+  sxtah r3, r8, r3, ror #8
+  sxtah r9, r3, r3, ror #24
+  ite hi
+  sxtahhi r6, r1, r6
+  sxtahls r2, r2, r4, ror #16
+  sxtb  r5, r6
+  sxtb.w  r6, r9, ror #8
+  sxtb.w  r8, r3, ror #24
+  ite ge
+  sxtbge  r2, r4
+  sxtblt.w  r5, r1, ror #16
+  sxtb16  r1, r4
+  sxtb16  r6, r7
+  sxtb16  r3, r1, ror #16
+  ite hs
+  sxtb16hs  r3, r5, ror #8
+  sxtb16lo  r2, r3, ror #24
+  sxth  r1, r6
+  sxth.w  r3, r8, ror #8
+  sxth.w  r9, r3, ror #24
+  itt ne
+  sxthne.w  r3, r9
+  sxthne.w  r2, r2, ror #16
+  sxtb  r5, r6
+  sxtb.w  r6, r9, ror #8
+  sxtb.w  r8, r3, ror #24
+  ite ge
+  sxtbge  r2, r4
+  sxtblt.w  r5, r1, ror #16
+  sxtb16  r1, r4
+  sxtb16  r6, r7
+  sxtb16  r3, r1, ror #16
+  ite hs
+  sxtb16hs  r3, r5, ror #8
+  sxtb16lo  r2, r3, ror #24
+  sxth  r1, r6
+  sxth.w  r3, r8, ror #8
+  sxth.w  r9, r3, ror #24
+  itt ne
+  sxthne.w  r3, r9
+  sxthne.w  r2, r2, ror #16
+  tbb [r3, r8]
+  tbh [r3, r8, lsl #1]
+  it  eq
+  tbbeq [r3, r8]
+  it  hs
+  tbhhs [r3, r8, lsl #1]
+  teq.w r5, #61440
+  teq.w r4, r5
+  teq.w r4, r5, lsl #5
+  teq.w r4, r5, lsr #5
+  teq.w r4, r5, lsr #5
+  teq.w r4, r5, asr #5
+  teq.w r4, r5, ror #5
+  tst.w r5, #61440
+  tst r2, r5
+  tst.w r3, r12, lsl #5
+  tst.w r4, r11, lsr #4
+  tst.w r5, r10, lsr #12
+  tst.w r6, r9, asr #30
+  tst.w r7, r8, ror #2
+  uadd16  r1, r2, r3
+  uadd8 r1, r2, r3
+  ite gt
+  uadd16gt  r1, r2, r3
+  uadd8le r1, r2, r3
+  uasx  r9, r12, r0
+  it  eq
+  uasxeq  r9, r12, r0
+  uasx  r9, r12, r0
+  it  eq
+  uasxeq  r9, r12, r0
+  ubfx  r4, r5, #16, #1
+  it  gt
+  ubfxgt  r4, r5, #16, #16
+  uhadd16 r4, r8, r2
+  uhadd8  r4, r8, r2
+  itt gt
+  uhadd16gt r4, r8, r2
+  uhadd8gt  r4, r8, r2
+  uhasx r4, r1, r5
+  uhsax r5, r6, r6
+  itt gt
+  uhasxgt r6, r9, r8
+  uhsaxgt r7, r8, r12
+  uhsub16 r5, r8, r3
+  uhsub8  r1, r7, r6
+  itt lt
+  uhsub16lt r4, r9, r12
+  uhsub8lt  r3, r1, r5
+  umaal r3, r4, r5, r6
+  it  lt
+  umaallt r3, r4, r5, r6
+  umlal r2, r4, r6, r8
+  it  gt
+  umlalgt r6, r1, r2, r6
+  umull r2, r4, r6, r8
+  it  gt
+  umullgt r6, r1, r2, r6
+  uqadd16 r1, r2, r3
+  uqadd8  r3, r4, r8
+  ite gt
+  uqadd16gt r4, r7, r9
+  uqadd8le  r8, r1, r2
+  uqasx r1, r2, r3
+  uqsax r3, r4, r8
+  ite gt
+  uqasxgt r4, r7, r9
+  uqsaxle r8, r1, r2
+  uqsub8  r8, r2, r9
+  uqsub16 r1, r9, r7
+  ite gt
+  uqsub8gt  r3, r1, r6
+  uqsub16le r4, r6, r4
+  usad8 r1, r9, r7
+  usada8  r8, r2, r9, r12
+  ite gt
+  usada8gt  r3, r1, r6, r9
+  usad8le r4, r6, r4
+  usat  r8, #1, r10
+  usat  r8, #4, r10
+  usat  r8, #5, r10, lsl #31
+  usat  r8, #16, r10, asr #1
+  usat16  r2, #2, r7
+  usat16  r3, #15, r5
+  usax  r2, r3, r4
+  it  ne
+  usaxne  r6, r1, r9
+  usax  r2, r3, r4
+  it  ne
+  usaxne  r6, r1, r9
+  usub16  r4, r2, r7
+  usub8 r1, r8, r5
+  ite hi
+  usub16hi  r1, r1, r3
+  usub8ls r9, r2, r3
+  uxtab r2, r3, r4
+  uxtab r4, r5, r6
+  it  lt
+  uxtablt r6, r2, r9, ror #8
+  uxtab r5, r1, r4, ror #16
+  uxtab r7, r8, r3, ror #24
+  it  ge
+  uxtab16ge r0, r1, r4
+  uxtab16 r6, r2, r7
+  uxtab16 r3, r5, r8, ror #8
+  uxtab16 r3, r2, r1, ror #16
+  it  eq
+  uxtab16eq r1, r2, r3, ror #24
+  uxtah r1, r3, r9
+  it  hi
+  uxtahhi r6, r1, r6
+  uxtah r3, r8, r3, ror #8
+  it  lo
+  uxtahlo r2, r2, r4, ror #16
+  uxtah r9, r3, r3, ror #24
+  it  ge
+  uxtbge  r2, r4
+  uxtb  r5, r6
+  uxtb.w  r6, r9, ror #8
+  it  lo
+  uxtblo.w  r5, r1, ror #16
+  uxtb.w  r8, r3, ror #24
+  uxtb16  r1, r4
+  uxtb16  r6, r7
+  it  hs
+  uxtb16hs  r3, r5, ror #8
+  uxtb16  r3, r1, ror #16
+  it  ge
+  uxtb16ge  r2, r3, ror #24
+  it  ne
+  uxthne.w  r3, r9
+  uxth  r1, r6
+  uxth.w  r3, r8, ror #8
+  it  le
+  uxthle.w  r2, r2, ror #16
+  uxth.w  r9, r3, ror #24
+  wfe
+  wfi
+  yield
+  itet  lt
+  wfelt
+  wfige
+  yieldlt
+  hint  #6
+  hint.w  #6
+  hint.w  #102
+
+# CHECK:      Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+# CHECK-NEXT:  1      1     0.50                        adc r0, r1, #4
+# CHECK-NEXT:  1      1     0.50                        adcs  r0, r1, #0
+# CHECK-NEXT:  1      1     0.50                        adc r1, r2, #255
+# CHECK-NEXT:  1      1     0.50                        adc r3, r7, #5570645
+# CHECK-NEXT:  1      1     0.50                        adc r8, r12, #2852170240
+# CHECK-NEXT:  1      1     0.50                        adc r9, r7, #2779096485
+# CHECK-NEXT:  1      1     0.50                        adc r5, r3, #2264924160
+# CHECK-NEXT:  1      1     0.50                        adc r4, r2, #2139095040
+# CHECK-NEXT:  1      1     0.50                        adc r4, r2, #1664
+# CHECK-NEXT:  1      1     0.50                        adc.w r4, r5, r6
+# CHECK-NEXT:  1      1     0.50                        adcs.w  r4, r5, r6
+# CHECK-NEXT:  1      1     0.50                        adc.w r9, r1, r3
+# CHECK-NEXT:  1      1     0.50                        adcs.w  r9, r1, r3
+# CHECK-NEXT:  1      2     1.00                        adc.w r0, r1, r3, ror #4
+# CHECK-NEXT:  1      2     1.00                        adcs.w  r0, r1, r3, lsl #7
+# CHECK-NEXT:  1      2     1.00                        adc.w r0, r1, r3, lsr #31
+# CHECK-NEXT:  1      2     1.00                        adcs.w  r0, r1, r3, asr #32
+# CHECK-NEXT:  0      0     0.00                  U     itet  eq
+# CHECK-NEXT:  1      1     0.50                        addeq r1, r2, #4
+# CHECK-NEXT:  1      1     0.50                        addwne  r5, r3, #1023
+# CHECK-NEXT:  1      1     0.50                        addweq  r4, r5, #293
+# CHECK-NEXT:  1      1     0.50                        add.w r2, sp, #1024
+# CHECK-NEXT:  1      1     0.50                        add.w r2, r8, #65280
+# CHECK-NEXT:  1      1     0.50                        addw  r2, r3, #257
+# CHECK-NEXT:  1      1     0.50                        add.w r12, r6, #256
+# CHECK-NEXT:  1      1     0.50                        addw  r12, r6, #256
+# CHECK-NEXT:  1      1     0.50                        adds.w  r1, r2, #496
+# CHECK-NEXT:  1      1     0.50                        add.w r1, r2, r8
+# CHECK-NEXT:  1      2     1.00                        add.w r5, r9, r2, asr #32
+# CHECK-NEXT:  1      2     1.00                        adds.w  r7, r3, r1, lsl #31
+# CHECK-NEXT:  1      2     1.00                        adds.w  r0, r3, r6, lsr #25
+# CHECK-NEXT:  1      2     1.00                        add.w r4, r8, r1, ror #12
+# CHECK-NEXT:  1      1     0.50                  U     adr.w r11, #-3270
+# CHECK-NEXT:  1      1     0.50                  U     adr.w r11, #-826
+# CHECK-NEXT:  1      1     0.50                        subw  r1, pc, #0
+# CHECK-NEXT:  1      1     0.50                  U     adr.w r0, #1024
+# CHECK-NEXT:  1      1     0.50                        and r2, r5, #1044480
+# CHECK-NEXT:  1      1     0.50                        ands  r3, r12, #15
+# CHECK-NEXT:  1      1     0.50                        and r1, r1, #255
+# CHECK-NEXT:  1      1     0.50                        and.w r4, r9, r8
+# CHECK-NEXT:  1      2     1.00                        and.w r1, r4, r8, asr #3
+# CHECK-NEXT:  1      2     1.00                        ands.w  r2, r1, r7, lsl #1
+# CHECK-NEXT:  1      2     1.00                        ands.w  r4, r5, r2, lsr #20
+# CHECK-NEXT:  1      2     1.00                        and.w r9, r12, r1, ror #17
+# CHECK-NEXT:  1      1     0.50                        asr.w r2, r3, #12
+# CHECK-NEXT:  1      2     1.00                        asrs.w  r8, r3, #32
+# CHECK-NEXT:  1      2     1.00                        asrs.w  r2, r3, #1
+# CHECK-NEXT:  1      1     0.50                        asr.w r2, r3, #4
+# CHECK-NEXT:  1      2     1.00                        asrs.w  r2, r12, #15
+# CHECK-NEXT:  1      1     0.50                        asr.w r3, r3, #19
+# CHECK-NEXT:  1      2     1.00                        asrs.w  r8, r8, #2
+# CHECK-NEXT:  1      2     1.00                        asrs.w  r7, r7, #5
+# CHECK-NEXT:  1      1     0.50                        asr.w r12, r12, #21
+# CHECK-NEXT:  1      1     0.50                        asr.w r3, r4, r2
+# CHECK-NEXT:  1      1     0.50                        asr.w r1, r1, r2
+# CHECK-NEXT:  1      2     1.00                        asrs.w  r3, r4, r8
+# CHECK-NEXT:  1      1     1.00                  U     bmi.w #-183396
+# CHECK-NEXT:  1      1     1.00                        b.w #208962
+# CHECK-NEXT:  1      1     1.00                        b.w #-16777216
+# CHECK-NEXT:  1      2     1.00                        bfc r5, #3, #17
+# CHECK-NEXT:  0      0     0.00                  U     it  lo
+# CHECK-NEXT:  1      2     1.00                        bfclo r5, #3, #17
+# CHECK-NEXT:  1      2     1.00                        bfi r5, r2, #3, #17
+# CHECK-NEXT:  0      0     0.00                  U     it  ne
+# CHECK-NEXT:  1      2     1.00                        bfine r5, r2, #3, #17
+# CHECK-NEXT:  1      2     1.00                        bfi r6, r0, #0, #32
+# CHECK-NEXT:  1      2     1.00                        bfi r6, r0, #31, #1
+# CHECK-NEXT:  1      1     0.50                        bic r10, r1, #15
+# CHECK-NEXT:  1      1     0.50                        bic.w r12, r3, r6
+# CHECK-NEXT:  1      2     1.00                        bic.w r11, r2, r6, lsl #12
+# CHECK-NEXT:  1      2     1.00                        bic.w r8, r4, r1, lsr #11
+# CHECK-NEXT:  1      2     1.00                        bic.w r7, r5, r7, lsr #15
+# CHECK-NEXT:  1      2     1.00                        bic.w r6, r7, r9, asr #32
+# CHECK-NEXT:  1      2     1.00                        bic.w r5, r6, r8, ror #1
+# CHECK-NEXT:  1      1     0.50                        bic r1, r1, #15
+# CHECK-NEXT:  1      1     0.50                        bic.w r1, r1, r1
+# CHECK-NEXT:  1      2     1.00                        bic.w r4, r4, r2, lsl #31
+# CHECK-NEXT:  1      2     1.00                        bic.w r6, r6, r3, lsr #12
+# CHECK-NEXT:  1      2     1.00                        bic.w r7, r7, r4, lsr #7
+# CHECK-NEXT:  1      2     1.00                        bic.w r8, r8, r5, asr #15
+# CHECK-NEXT:  1      2     1.00                        bic.w r12, r12, r6, ror #29
+# CHECK-NEXT:  2      3     1.00                  U     bxj r5
+# CHECK-NEXT:  0      0     0.00                  U     it  ne
+# CHECK-NEXT:  2      3     1.00                  U     bxjne r7
+# CHECK-NEXT:  1      1     1.00                  U     cbnz  r7, #6
+# CHECK-NEXT:  1      1     1.00                  U     cbnz  r7, #12
+# CHECK-NEXT:  1      1     1.00                  U     cbz r4, #64
+# CHECK-NEXT:  1      1     1.00           *            strh  r6, [r5, #14]
+# CHECK-NEXT:  1      2     1.00                        asrs  r7, r2, #4
+# CHECK-NEXT:  1      1     1.00           *            strh  r6, [r7, #14]
+# CHECK-NEXT:  0      0     0.00                  U     itett ne
+# CHECK-NEXT:  1      1     0.50                        cmpne r7, #243
+# CHECK-NEXT:  1      1     0.50                        addeq r7, r1, r2
+# CHECK-NEXT:  1      1     1.00           *            strh  r2, [r7, #22]
+# CHECK-NEXT:  1      2     1.00                        asrs  r1, r6, #7
+# CHECK-NEXT:  1      2     1.00                        lsrs  r1, r6, #31
+# CHECK-NEXT:  1      1     0.50                        adds  r7, r1, r0
+# CHECK-NEXT:  1      2     1.00                        lsls  r3, r5, #27
+# CHECK-NEXT:  1      2     1.00                        asrs  r7, r1, #4
+# CHECK-NEXT:  1      1     1.00           *            strh  r3, [r5, #54]
+# CHECK-NEXT:  1      2     1.00                        asrs  r7, r5, #4
+# CHECK-NEXT:  1      1     1.00           *            str r6, [sp, #940]
+# CHECK-NEXT:  1      1     0.50                        adds  r7, r5, #4
+# CHECK-NEXT:  1      1     1.00           *            str r6, [sp, #940]
+# CHECK-NEXT:  1      2     1.00                        asrs  r7, r5, #4
+# CHECK-NEXT:  1      1     0.50                  U     adr r6, #940
+# CHECK-NEXT:  1      2     1.00                        asrs  r7, r5, #4
+# CHECK-NEXT:  1      1     0.50                        cmp r7, #182
+# CHECK-NEXT:  1      1     0.50                        cmp.w r5, #65280
+# CHECK-NEXT:  1      1     0.50                        cmp.w r4, r12
+# CHECK-NEXT:  1      2     1.00                        cmp.w r9, r6, lsl #12
+# CHECK-NEXT:  1      2     1.00                        cmp.w r3, r7, lsr #31
+# CHECK-NEXT:  1      2     1.00                        cmp.w sp, r6, lsr #1
+# CHECK-NEXT:  1      2     1.00                        cmp.w r2, r5, asr #24
+# CHECK-NEXT:  1      2     1.00                        cmp.w r1, r4, ror #15
+# CHECK-NEXT:  0      0     0.00    *      *      U     dbg #5
+# CHECK-NEXT:  0      0     0.00    *      *      U     dbg #0
+# CHECK-NEXT:  0      0     0.00    *      *      U     dbg #15
+# CHECK-NEXT:  0      0     0.00    *      *      U     dmb sy
+# CHECK-NEXT:  0      0     0.00    *      *      U     dmb st
+# CHECK-NEXT:  0      0     0.00    *      *      U     dmb ld
+# CHECK-NEXT:  0      0     0.00    *      *      U     dmb #0xc
+# CHECK-NEXT:  0      0     0.00    *      *      U     dmb ish
+# CHECK-NEXT:  0      0     0.00    *      *      U     dmb ishst
+# CHECK-NEXT:  0      0     0.00    *      *      U     dmb ishld
+# CHECK-NEXT:  0      0     0.00    *      *      U     dmb #0x8
+# CHECK-NEXT:  0      0     0.00    *      *      U     dmb nsh
+# CHECK-NEXT:  0      0     0.00    *      *      U     dmb nshst
+# CHECK-NEXT:  0      0     0.00    *      *      U     dmb nshld
+# CHECK-NEXT:  0      0     0.00    *      *      U     dmb #0x4
+# CHECK-NEXT:  0      0     0.00    *      *      U     dmb osh
+# CHECK-NEXT:  0      0     0.00    *      *      U     dmb oshst
+# CHECK-NEXT:  0      0     0.00    *      *      U     dmb oshld
+# CHECK-NEXT:  0      0     0.00    *      *      U     dmb #0x0
+# CHECK-NEXT:  0      0     0.00    *      *      U     dsb sy
+# CHECK-NEXT:  0      0     0.00    *      *      U     dsb st
+# CHECK-NEXT:  0      0     0.00    *      *      U     dsb ld
+# CHECK-NEXT:  0      0     0.00    *      *      U     dsb #0xc
+# CHECK-NEXT:  0      0     0.00    *      *      U     dsb ish
+# CHECK-NEXT:  0      0     0.00    *      *      U     dsb ishst
+# CHECK-NEXT:  0      0     0.00    *      *      U     dsb ishld
+# CHECK-NEXT:  0      0     0.00    *      *      U     dsb #0x8
+# CHECK-NEXT:  0      0     0.00    *      *      U     dsb nsh
+# CHECK-NEXT:  0      0     0.00    *      *      U     dsb nshst
+# CHECK-NEXT:  0      0     0.00    *      *      U     dsb nshld
+# CHECK-NEXT:  0      0     0.00    *      *      U     pssbb
+# CHECK-NEXT:  0      0     0.00    *      *      U     dsb osh
+# CHECK-NEXT:  0      0     0.00    *      *      U     dsb oshst
+# CHECK-NEXT:  0      0     0.00    *      *      U     dsb oshld
+# CHECK-NEXT:  0      0     0.00    *      *      U     ssbb
+# CHECK-NEXT:  1      1     0.50                        eor r4, r5, #61440
+# CHECK-NEXT:  1      1     0.50                        eor.w r4, r5, r6
+# CHECK-NEXT:  1      2     1.00                        eor.w r4, r5, r6, lsl #5
+# CHECK-NEXT:  1      2     1.00                        eor.w r4, r5, r6, lsr #5
+# CHECK-NEXT:  1      2     1.00                        eor.w r4, r5, r6, lsr #5
+# CHECK-NEXT:  1      2     1.00                        eor.w r4, r5, r6, asr #5
+# CHECK-NEXT:  1      2     1.00                        eor.w r4, r5, r6, ror #5
+# CHECK-NEXT:  0      0     0.00    *      *      U     isb sy
+# CHECK-NEXT:  0      0     0.00    *      *      U     isb #0xa
+# CHECK-NEXT:  0      0     0.00                  U     iteet eq
+# CHECK-NEXT:  1      1     0.50                        addeq r0, r1, r2
+# CHECK-NEXT:  0      0     0.00    *      *      U     nopne
+# CHECK-NEXT:  1      1     0.50                        subne r5, r6, r7
+# CHECK-NEXT:  1      1     0.50                        addeq r1, r2, #4
+# CHECK-NEXT:  0      0     0.00                  U     ittee ls
+# CHECK-NEXT:  1      1     0.50                        addls r0, r1, r2
+# CHECK-NEXT:  0      0     0.00    *      *      U     nopls
+# CHECK-NEXT:  1      1     0.50                        subhi r5, r6, r7
+# CHECK-NEXT:  1      1     0.50                        addhi r1, r2, #4
+# CHECK-NEXT:  8      5     4.00    *                   ldm.w r4, {r4, r5, r8, r9}
+# CHECK-NEXT:  2      3     2.00    *                   ldm.w r4, {r5, r6}
+# CHECK-NEXT:  4      3     2.00    *                   ldm.w r5!, {r3, r8}
+# CHECK-NEXT:  8      5     4.00    *                   ldm.w r4, {r4, r5, r8, r9}
+# CHECK-NEXT:  2      3     2.00    *                   ldm.w r4, {r5, r6}
+# CHECK-NEXT:  4      3     2.00    *                   ldm.w r5!, {r3, r8}
+# CHECK-NEXT:  4      3     2.00    *                   ldm.w r5!, {r1, r2}
+# CHECK-NEXT:  4      4     2.00    *                   ldm.w r2, {r1, r2}
+# CHECK-NEXT:  8      5     4.00    *                   ldm.w r4, {r4, r5, r8, r9}
+# CHECK-NEXT:  2      3     2.00    *                   ldm.w r4, {r5, r6}
+# CHECK-NEXT:  4      3     2.00    *                   ldm.w r5!, {r3, r8}
+# CHECK-NEXT:  8      5     4.00    *                   ldm.w r4, {r4, r5, r8, r9}
+# CHECK-NEXT:  2      3     2.00    *                   ldm.w r4, {r5, r6}
+# CHECK-NEXT:  4      3     2.00    *                   ldm.w r5!, {r3, r8}
+# CHECK-NEXT:  4      3     2.00    *                   ldm.w r5!, {r3, r8}
+# CHECK-NEXT:  8      5     4.00    *                   ldmdb r4, {r4, r5, r8, r9}
+# CHECK-NEXT:  2      3     2.00    *                   ldmdb r4, {r5, r6}
+# CHECK-NEXT:  4      3     2.00    *                   ldmdb r5!, {r3, r8}
+# CHECK-NEXT:  4      3     2.00    *                   ldmdb r5!, {r3, r8}
+# CHECK-NEXT:  1      4     1.00    *                   ldr r5, [r5, #-4]
+# CHECK-NEXT:  1      4     1.00    *                   ldr r5, [r6, #32]
+# CHECK-NEXT:  1      4     1.00    *                   ldr.w r5, [r6, #33]
+# CHECK-NEXT:  1      4     1.00    *                   ldr.w r5, [r6, #257]
+# CHECK-NEXT:  1      4     1.00    *                   ldr.w pc, [r7, #257]
+# CHECK-NEXT:  1      4     1.00    *                   ldr.w r4, [pc, #-0]
+# CHECK-NEXT:  1      4     1.00    *                   ldr.w r2, [pc, #-40]
+# CHECK-NEXT:  1      4     1.00    *                   ldr.w r1, [pc, #1024]
+# CHECK-NEXT:  1      4     1.00    *                   ldr.w r1, [r8, r1]
+# CHECK-NEXT:  1      4     1.00    *                   ldr.w r4, [r5, r2]
+# CHECK-NEXT:  1      4     1.00    *                   ldr.w r6, [r0, r2, lsl #3]
+# CHECK-NEXT:  1      4     1.00    *                   ldr.w r8, [r8, r2, lsl #2]
+# CHECK-NEXT:  1      4     1.00    *                   ldr.w r7, [sp, r2, lsl #1]
+# CHECK-NEXT:  1      4     1.00    *                   ldr.w r7, [sp, r2]
+# CHECK-NEXT:  1      4     1.00    *                   ldr pc, [sp], #12
+# CHECK-NEXT:  1      4     1.00    *                   ldr r2, [r4, #255]!
+# CHECK-NEXT:  1      4     1.00    *                   ldr r8, [sp, #4]!
+# CHECK-NEXT:  1      4     1.00    *                   ldr lr, [sp, #-4]!
+# CHECK-NEXT:  1      4     1.00    *                   ldr lr, [sp, #0]!
+# CHECK-NEXT:  1      4     1.00    *                   ldr r2, [r4], #255
+# CHECK-NEXT:  1      4     1.00    *                   ldr r8, [sp], #4
+# CHECK-NEXT:  1      4     1.00    *                   ldr lr, [sp], #-4
+# CHECK-NEXT:  1      4     1.00    *                   ldrb  r5, [r5, #-4]
+# CHECK-NEXT:  1      4     1.00    *                   ldrb.w  r5, [r6, #32]
+# CHECK-NEXT:  1      4     1.00    *                   ldrb.w  r5, [r6, #33]
+# CHECK-NEXT:  1      4     1.00    *                   ldrb.w  r5, [r6, #257]
+# CHECK-NEXT:  1      4     1.00    *                   ldrb.w  lr, [r7, #257]
+# CHECK-NEXT:  1      4     1.00    *                   ldrb.w  r1, [r8, r1]
+# CHECK-NEXT:  1      4     1.00    *                   ldrb.w  r4, [r5, r2]
+# CHECK-NEXT:  1      4     1.00    *                   ldrb.w  r6, [r0, r2, lsl #3]
+# CHECK-NEXT:  1      4     1.00    *                   ldrb.w  r8, [r8, r2, lsl #2]
+# CHECK-NEXT:  1      4     1.00    *                   ldrb.w  r7, [sp, r2, lsl #1]
+# CHECK-NEXT:  1      4     1.00    *                   ldrb.w  r7, [sp, r2]
+# CHECK-NEXT:  2      4     1.00    *                   ldrb  r5, [r8, #255]!
+# CHECK-NEXT:  2      4     1.00    *                   ldrb  r2, [r5, #4]!
+# CHECK-NEXT:  2      4     1.00    *                   ldrb  r1, [r4, #-4]!
+# CHECK-NEXT:  2      4     1.00    *                   ldrb  r1, [r4, #0]!
+# CHECK-NEXT:  2      4     1.00    *                   ldrb  lr, [r3], #255
+# CHECK-NEXT:  2      4     1.00    *                   ldrb  r9, [r2], #4
+# CHECK-NEXT:  2      4     1.00    *                   ldrb  r3, [sp], #-4
+# CHECK-NEXT:  1      4     1.00    *                   ldrb.w  r6, [pc, #-0]
+# CHECK-NEXT:  1      4     1.00    *                   ldrb.w  r10, [pc, #227]
+# CHECK-NEXT:  1      4     1.00    *                   ldrb.w  r5, [pc]
+# CHECK-NEXT:  1      4     1.00                  U     ldrbt r1, [r2]
+# CHECK-NEXT:  1      4     1.00                  U     ldrbt r1, [r8]
+# CHECK-NEXT:  1      4     1.00                  U     ldrbt r1, [r8, #3]
+# CHECK-NEXT:  1      4     1.00                  U     ldrbt r1, [r8, #255]
+# CHECK-NEXT:  2      4     2.00    *                   ldrd  r3, r5, [r6, #24]
+# CHECK-NEXT:  4      4     2.00    *                   ldrd  r3, r5, [r6, #24]!
+# CHECK-NEXT:  4      4     2.00    *                   ldrd  r3, r5, [r6], #4
+# CHECK-NEXT:  4      4     2.00    *                   ldrd  r3, r5, [r6], #-8
+# CHECK-NEXT:  2      4     2.00    *                   ldrd  r3, r5, [r6]
+# CHECK-NEXT:  2      4     2.00    *                   ldrd  r8, r1, [r3]
+# CHECK-NEXT:  4      4     2.00    *                   ldrd  r0, r1, [r2], #-0
+# CHECK-NEXT:  4      4     2.00    *                   ldrd  r0, r1, [r2, #-0]!
+# CHECK-NEXT:  4      4     2.00    *                   ldrd  r0, r1, [r2, #0]!
+# CHECK-NEXT:  2      4     2.00    *                   ldrd  r0, r1, [r2, #-0]
+# CHECK-NEXT:  0      0     0.00    *      *      U     ldrex r1, [r4]
+# CHECK-NEXT:  0      0     0.00    *      *      U     ldrex r8, [r4]
+# CHECK-NEXT:  0      0     0.00    *      *      U     ldrex r2, [sp, #128]
+# CHECK-NEXT:  0      0     0.00    *      *      U     ldrexb  r5, [r7]
+# CHECK-NEXT:  0      0     0.00    *      *      U     ldrexh  r9, [r12]
+# CHECK-NEXT:  0      0     0.00    *             U     ldrexd  r9, r3, [r4]
+# CHECK-NEXT:  1      4     1.00    *                   ldrh  r5, [r5, #-4]
+# CHECK-NEXT:  1      4     1.00    *                   ldrh  r5, [r6, #32]
+# CHECK-NEXT:  1      4     1.00    *                   ldrh.w  r5, [r6, #33]
+# CHECK-NEXT:  1      4     1.00    *                   ldrh.w  r5, [r6, #257]
+# CHECK-NEXT:  1      4     1.00    *                   ldrh.w  lr, [r7, #257]
+# CHECK-NEXT:  1      4     1.00    *                   ldrh.w  r1, [r8, r1]
+# CHECK-NEXT:  1      4     1.00    *                   ldrh.w  r4, [r5, r2]
+# CHECK-NEXT:  1      4     1.00    *                   ldrh.w  r6, [r0, r2, lsl #3]
+# CHECK-NEXT:  1      4     1.00    *                   ldrh.w  r8, [r8, r2, lsl #2]
+# CHECK-NEXT:  1      4     1.00    *                   ldrh.w  r7, [sp, r2, lsl #1]
+# CHECK-NEXT:  1      4     1.00    *                   ldrh.w  r7, [sp, r2]
+# CHECK-NEXT:  1      4     1.00    *                   ldrh  r5, [r8, #255]!
+# CHECK-NEXT:  1      4     1.00    *                   ldrh  r2, [r5, #4]!
+# CHECK-NEXT:  1      4     1.00    *                   ldrh  r1, [r4, #-4]!
+# CHECK-NEXT:  1      4     1.00    *                   ldrh  r1, [r4, #0]!
+# CHECK-NEXT:  1      4     1.00    *                   ldrh  lr, [r3], #255
+# CHECK-NEXT:  1      4     1.00    *                   ldrh  r9, [r2], #4
+# CHECK-NEXT:  1      4     1.00    *                   ldrh  r3, [sp], #-4
+# CHECK-NEXT:  1      4     1.00    *                   ldrh.w  r7, [pc, #-0]
+# CHECK-NEXT:  1      4     1.00    *                   ldrh.w  r5, [pc, #121]
+# CHECK-NEXT:  1      4     1.00    *                   ldrh.w  r4, [pc]
+# CHECK-NEXT:  1      4     1.00    *                   ldrsb r5, [r5, #-4]
+# CHECK-NEXT:  1      4     1.00    *                   ldrsb.w r5, [r6, #32]
+# CHECK-NEXT:  1      4     1.00    *                   ldrsb.w r5, [r6, #33]
+# CHECK-NEXT:  1      4     1.00    *                   ldrsb.w r5, [r6, #257]
+# CHECK-NEXT:  1      4     1.00    *                   ldrsb.w lr, [r7, #257]
+# CHECK-NEXT:  1      4     1.00    *                   ldrsb.w r1, [r8, r1]
+# CHECK-NEXT:  1      4     1.00    *                   ldrsb.w r4, [r5, r2]
+# CHECK-NEXT:  1      4     1.00    *                   ldrsb.w r6, [r0, r2, lsl #3]
+# CHECK-NEXT:  1      4     1.00    *                   ldrsb.w r8, [r8, r2, lsl #2]
+# CHECK-NEXT:  1      4     1.00    *                   ldrsb.w r7, [sp, r2, lsl #1]
+# CHECK-NEXT:  1      4     1.00    *                   ldrsb.w r7, [sp, r2]
+# CHECK-NEXT:  1      4     1.00    *                   ldrsb r5, [r8, #255]!
+# CHECK-NEXT:  1      4     1.00    *                   ldrsb r2, [r5, #4]!
+# CHECK-NEXT:  1      4     1.00    *                   ldrsb r1, [r4, #-4]!
+# CHECK-NEXT:  1      4     1.00    *                   ldrsb r1, [r4, #0]!
+# CHECK-NEXT:  1      4     1.00    *                   ldrsb lr, [r3], #255
+# CHECK-NEXT:  1      4     1.00    *                   ldrsb r9, [r2], #4
+# CHECK-NEXT:  1      4     1.00    *                   ldrsb r3, [sp], #-4
+# CHECK-NEXT:  1      4     1.00    *                   ldrsb.w r0, [pc, #-0]
+# CHECK-NEXT:  1      4     1.00    *                   ldrsb.w r12, [pc, #80]
+# CHECK-NEXT:  1      4     1.00    *                   ldrsb.w r3, [pc]
+# CHECK-NEXT:  1      4     1.00                  U     ldrsbt  r1, [r2]
+# CHECK-NEXT:  1      4     1.00                  U     ldrsbt  r1, [r8]
+# CHECK-NEXT:  1      4     1.00                  U     ldrsbt  r1, [r8, #3]
+# CHECK-NEXT:  1      4     1.00                  U     ldrsbt  r1, [r8, #255]
+# CHECK-NEXT:  1      4     1.00    *                   ldrsh r5, [r5, #-4]
+# CHECK-NEXT:  1      4     1.00    *                   ldrsh.w r5, [r6, #32]
+# CHECK-NEXT:  1      4     1.00    *                   ldrsh.w r5, [r6, #33]
+# CHECK-NEXT:  1      4     1.00    *                   ldrsh.w r5, [r6, #257]
+# CHECK-NEXT:  1      4     1.00    *                   ldrsh.w lr, [r7, #257]
+# CHECK-NEXT:  1      4     1.00    *                   ldrsh r10, [r5, #-0]
+# CHECK-NEXT:  1      4     1.00    *                   ldrsh.w r1, [r8, r1]
+# CHECK-NEXT:  1      4     1.00    *                   ldrsh.w r4, [r5, r2]
+# CHECK-NEXT:  1      4     1.00    *                   ldrsh.w r6, [r0, r2, lsl #3]
+# CHECK-NEXT:  1      4     1.00    *                   ldrsh.w r8, [r8, r2, lsl #2]
+# CHECK-NEXT:  1      4     1.00    *                   ldrsh.w r7, [sp, r2, lsl #1]
+# CHECK-NEXT:  1      4     1.00    *                   ldrsh.w r7, [sp, r2]
+# CHECK-NEXT:  1      4     1.00    *                   ldrsh r5, [r8, #255]!
+# CHECK-NEXT:  1      4     1.00    *                   ldrsh r2, [r5, #4]!
+# CHECK-NEXT:  1      4     1.00    *                   ldrsh r1, [r4, #-4]!
+# CHECK-NEXT:  1      4     1.00    *                   ldrsh r1, [r4, #0]!
+# CHECK-NEXT:  1      4     1.00    *                   ldrsh lr, [r3], #255
+# CHECK-NEXT:  1      4     1.00    *                   ldrsh r9, [r2], #4
+# CHECK-NEXT:  1      4     1.00    *                   ldrsh r3, [sp], #-4
+# CHECK-NEXT:  1      4     1.00    *                   ldrsh.w r0, [pc, #-0]
+# CHECK-NEXT:  1      4     1.00    *                   ldrsh.w r10, [pc, #-231]
+# CHECK-NEXT:  1      4     1.00    *                   ldrsh.w r6, [pc]
+# CHECK-NEXT:  1      4     1.00                  U     ldrsht  r1, [r2]
+# CHECK-NEXT:  1      4     1.00                  U     ldrsht  r1, [r8]
+# CHECK-NEXT:  1      4     1.00                  U     ldrsht  r1, [r8, #3]
+# CHECK-NEXT:  1      4     1.00                  U     ldrsht  r1, [r8, #255]
+# CHECK-NEXT:  1      4     1.00                  U     ldrt  r1, [r2]
+# CHECK-NEXT:  1      4     1.00                  U     ldrt  r2, [r6]
+# CHECK-NEXT:  1      4     1.00                  U     ldrt  r3, [r7, #3]
+# CHECK-NEXT:  1      4     1.00                  U     ldrt  r4, [r9, #255]
+# CHECK-NEXT:  1      1     0.50                        lsl.w r2, r3, #12
+# CHECK-NEXT:  1      2     1.00                        lsls.w  r8, r3, #31
+# CHECK-NEXT:  1      2     1.00                        lsls.w  r2, r3, #1
+# CHECK-NEXT:  1      1     0.50                        lsl.w r2, r3, #4
+# CHECK-NEXT:  1      2     1.00                        lsls.w  r2, r12, #15
+# CHECK-NEXT:  1      1     0.50                        lsl.w r3, r3, #19
+# CHECK-NEXT:  1      2     1.00                        lsls.w  r8, r8, #2
+# CHECK-NEXT:  1      2     1.00                        lsls.w  r7, r7, #5
+# CHECK-NEXT:  1      1     0.50                        lsl.w r12, r12, #21
+# CHECK-NEXT:  1      1     0.50                        lsl.w r3, r4, r2
+# CHECK-NEXT:  1      1     0.50                        lsl.w r1, r1, r2
+# CHECK-NEXT:  1      2     1.00                        lsls.w  r3, r4, r8
+# CHECK-NEXT:  1      1     0.50                        lsr.w r2, r3, #12
+# CHECK-NEXT:  1      2     1.00                        lsrs.w  r8, r3, #32
+# CHECK-NEXT:  1      2     1.00                        lsrs.w  r2, r3, #1
+# CHECK-NEXT:  1      1     0.50                        lsr.w r2, r3, #4
+# CHECK-NEXT:  1      2     1.00                        lsrs.w  r2, r12, #15
+# CHECK-NEXT:  1      1     0.50                        lsr.w r3, r3, #19
+# CHECK-NEXT:  1      2     1.00                        lsrs.w  r8, r8, #2
+# CHECK-NEXT:  1      2     1.00                        lsrs.w  r7, r7, #5
+# CHECK-NEXT:  1      1     0.50                        lsr.w r12, r12, #21
+# CHECK-NEXT:  1      1     0.50                        lsr.w r3, r4, r2
+# CHECK-NEXT:  1      1     0.50                        lsr.w r1, r1, r2
+# CHECK-NEXT:  1      2     1.00                        lsrs.w  r3, r4, r8
+# CHECK-NEXT:  1      1     1.00           *            str r1, [sp, #952]
+# CHECK-NEXT:  1      1     0.50                        movs  r1, #87
+# CHECK-NEXT:  1      1     1.00           *            str r1, [sp, #1016]
+# CHECK-NEXT:  1      1     0.50                        add r7, r10
+# CHECK-NEXT:  1      4     1.00    *                   ldrsb r1, [r6, r7]
+# CHECK-NEXT:  1      4     1.00    *                   ldrsb r1, [r6, r7]
+# CHECK-NEXT:  1      3     1.00                        mla r1, r2, r3, r4
+# CHECK-NEXT:  1      3     1.00                        mls r1, r2, r3, r4
+# CHECK-NEXT:  1      1     0.50                        movs  r1, #21
+# CHECK-NEXT:  1      2     1.00                        movs.w  r1, #21
+# CHECK-NEXT:  1      2     1.00                        movs.w  r8, #21
+# CHECK-NEXT:  1      1     0.50                        movw  r0, #65535
+# CHECK-NEXT:  1      1     0.50                        movw  r1, #43777
+# CHECK-NEXT:  1      1     0.50                        movw  r1, #43792
+# CHECK-NEXT:  1      1     0.50                        mov.w r0, #66846720
+# CHECK-NEXT:  1      1     0.50                        mov.w r0, #66846720
+# CHECK-NEXT:  1      2     1.00                        movs.w  r0, #66846720
+# CHECK-NEXT:  1      1     0.50                        movt  r3, #7
+# CHECK-NEXT:  1      1     0.50                        movt  r6, #65535
+# CHECK-NEXT:  0      0     0.00                  U     it  eq
+# CHECK-NEXT:  1      1     0.50                        movteq  r4, #4080
+# CHECK-NEXT:  0      0     0.00    *      *      U     mrc p14, #0, r1, c1, c2, #4
+# CHECK-NEXT:  1      1     1.00           *            str r2, [sp, #1016]
+# CHECK-NEXT:  1      1     1.00           *            strb  r6, [r3, r0]
+# CHECK-NEXT:  1      2     1.00                        asrs  r4, r5, #7
+# CHECK-NEXT:  1      1     1.00           *            strb  r7, [r2, r1]
+# CHECK-NEXT:  1      2     1.00                        asrs  r4, r7, #7
+# CHECK-NEXT:  0      0     0.00                  U     mrs r8, apsr
+# CHECK-NEXT:  0      0     0.00                  U     mrs r8, spsr
+# CHECK-NEXT:  0      0     0.00                  U     msr APSR_nzcvq, r1
+# CHECK-NEXT:  0      0     0.00                  U     msr APSR_g, r2
+# CHECK-NEXT:  0      0     0.00                  U     msr APSR_nzcvq, r3
+# CHECK-NEXT:  0      0     0.00                  U     msr APSR_nzcvq, r4
+# CHECK-NEXT:  0      0     0.00                  U     msr APSR_nzcvqg, r5
+# CHECK-NEXT:  0      0     0.00                  U     msr CPSR_fc, r6
+# CHECK-NEXT:  0      0     0.00                  U     msr CPSR_c, r7
+# CHECK-NEXT:  0      0     0.00                  U     msr CPSR_x, r8
+# CHECK-NEXT:  0      0     0.00                  U     msr CPSR_fc, r9
+# CHECK-NEXT:  0      0     0.00                  U     msr CPSR_fc, r11
+# CHECK-NEXT:  0      0     0.00                  U     msr CPSR_fsx, r12
+# CHECK-NEXT:  0      0     0.00                  U     msr SPSR_fc, r0
+# CHECK-NEXT:  0      0     0.00                  U     msr SPSR_fsxc, r5
+# CHECK-NEXT:  0      0     0.00                  U     msr CPSR_fsxc, r8
+# CHECK-NEXT:  1      3     1.00                        muls  r3, r4, r3
+# CHECK-NEXT:  1      3     1.00                        mul r3, r4, r3
+# CHECK-NEXT:  1      3     1.00                        mul r3, r4, r6
+# CHECK-NEXT:  0      0     0.00                  U     it  eq
+# CHECK-NEXT:  1      3     1.00                        muleq r3, r4, r5
+# CHECK-NEXT:  1      1     0.50                        mvns  r8, #21
+# CHECK-NEXT:  1      1     0.50                        mvn r0, #66846720
+# CHECK-NEXT:  1      1     0.50                        mvns  r0, #66846720
+# CHECK-NEXT:  0      0     0.00                  U     itte  eq
+# CHECK-NEXT:  1      1     0.50                        mvnseq  r1, #12
+# CHECK-NEXT:  1      1     0.50                        mvneq r1, #12
+# CHECK-NEXT:  1      1     0.50                        mvnne r1, #12
+# CHECK-NEXT:  1      1     0.50                        mvn.w r2, r3
+# CHECK-NEXT:  1      1     0.50                        mvns  r2, r3
+# CHECK-NEXT:  1      1     0.50                        mvn.w r5, r6, lsl #19
+# CHECK-NEXT:  1      1     0.50                        mvn.w r5, r6, lsr #9
+# CHECK-NEXT:  1      1     0.50                        mvn.w r5, r6, asr #4
+# CHECK-NEXT:  1      1     0.50                        mvn.w r5, r6, ror #6
+# CHECK-NEXT:  1      1     0.50                        mvn.w r5, r6, rrx
+# CHECK-NEXT:  0      0     0.00                  U     it  eq
+# CHECK-NEXT:  1      1     0.50                        mvneq r2, r3
+# CHECK-NEXT:  0      0     0.00    *      *      U     nop.w
+# CHECK-NEXT:  1      1     0.50                        orn r4, r5, #61440
+# CHECK-NEXT:  1      1     0.50                        orn r4, r5, r6
+# CHECK-NEXT:  1      1     0.50                        orns  r4, r5, r6
+# CHECK-NEXT:  1      2     1.00                        orn r4, r5, r6, lsl #5
+# CHECK-NEXT:  1      2     1.00                        orns  r4, r5, r6, lsr #5
+# CHECK-NEXT:  1      2     1.00                        orn r4, r5, r6, lsr #5
+# CHECK-NEXT:  1      2     1.00                        orns  r4, r5, r6, asr #5
+# CHECK-NEXT:  1      2     1.00                        orn r4, r5, r6, ror #5
+# CHECK-NEXT:  1      1     0.50                        orr r4, r5, #61440
+# CHECK-NEXT:  1      1     0.50                        orr.w r4, r5, r6
+# CHECK-NEXT:  1      2     1.00                        orr.w r4, r5, r6, lsl #5
+# CHECK-NEXT:  1      2     1.00                        orrs.w  r4, r5, r6, lsr #5
+# CHECK-NEXT:  1      2     1.00                        orr.w r4, r5, r6, lsr #5
+# CHECK-NEXT:  1      2     1.00                        orrs.w  r4, r5, r6, asr #5
+# CHECK-NEXT:  1      2     1.00                        orr.w r4, r5, r6, ror #5
+# CHECK-NEXT:  1      2     1.00                        pkhbt r2, r2, r3
+# CHECK-NEXT:  1      2     1.00                        pkhbt r2, r2, r3, lsl #31
+# CHECK-NEXT:  1      2     1.00                        pkhbt r2, r2, r3, lsl #15
+# CHECK-NEXT:  1      2     1.00                        pkhtb r2, r2, r3, asr #31
+# CHECK-NEXT:  1      2     1.00                        pkhtb r2, r2, r3, asr #15
+# CHECK-NEXT:  1      4     1.00    *      *            pld [r5, #-4]
+# CHECK-NEXT:  1      4     1.00    *      *            pld [r6, #32]
+# CHECK-NEXT:  1      4     1.00    *      *            pld [r6, #33]
+# CHECK-NEXT:  1      4     1.00    *      *            pld [r6, #257]
+# CHECK-NEXT:  1      4     1.00    *      *            pld [r7, #257]
+# CHECK-NEXT:  1      4     1.00    *      *            pld [r8, r1]
+# CHECK-NEXT:  1      4     1.00    *      *            pld [r5, r2]
+# CHECK-NEXT:  1      4     1.00    *      *            pld [r0, r2, lsl #3]
+# CHECK-NEXT:  1      4     1.00    *      *            pld [r8, r2, lsl #2]
+# CHECK-NEXT:  1      4     1.00    *      *            pld [sp, r2, lsl #1]
+# CHECK-NEXT:  1      4     1.00    *      *            pld [sp, r2]
+# CHECK-NEXT:  1      4     1.00    *      *            pld [pc, #-0]
+# CHECK-NEXT:  1      4     1.00    *      *            pld [pc, #455]
+# CHECK-NEXT:  1      4     1.00    *      *            pld [pc]
+# CHECK-NEXT:  1      4     1.00    *      *            pli [r5, #-4]
+# CHECK-NEXT:  1      4     1.00    *      *            pli [r6, #32]
+# CHECK-NEXT:  1      4     1.00    *      *            pli [r6, #33]
+# CHECK-NEXT:  1      4     1.00    *      *            pli [r6, #257]
+# CHECK-NEXT:  1      4     1.00    *      *            pli [r7, #257]
+# CHECK-NEXT:  1      4     1.00    *      *            pli [r8, r1]
+# CHECK-NEXT:  1      4     1.00    *      *            pli [r5, r2]
+# CHECK-NEXT:  1      4     1.00    *      *            pli [r0, r2, lsl #3]
+# CHECK-NEXT:  1      4     1.00    *      *            pli [r8, r2, lsl #2]
+# CHECK-NEXT:  1      4     1.00    *      *            pli [sp, r2, lsl #1]
+# CHECK-NEXT:  1      4     1.00    *      *            pli [sp, r2]
+# CHECK-NEXT:  1      4     1.00    *      *            pli [pc, #-0]
+# CHECK-NEXT:  1      4     1.00    *      *            pli [pc, #-328]
+# CHECK-NEXT:  1      4     1.00    *      *            pli [pc]
+# CHECK-NEXT:  1      2     1.00                        qadd  r1, r2, r3
+# CHECK-NEXT:  1      2     1.00                        qadd16  r1, r2, r3
+# CHECK-NEXT:  1      2     1.00                        qadd8 r1, r2, r3
+# CHECK-NEXT:  0      0     0.00                  U     itte  gt
+# CHECK-NEXT:  1      2     1.00                        qaddgt  r1, r2, r3
+# CHECK-NEXT:  1      2     1.00                        qadd16gt  r1, r2, r3
+# CHECK-NEXT:  1      2     1.00                        qadd8le r1, r2, r3
+# CHECK-NEXT:  2      3     1.00                        qdadd r6, r7, r8
+# CHECK-NEXT:  2      3     1.00                        qdsub r6, r7, r8
+# CHECK-NEXT:  0      0     0.00                  U     itt hi
+# CHECK-NEXT:  2      3     1.00                        qdaddhi r6, r7, r8
+# CHECK-NEXT:  2      3     1.00                        qdsubhi r6, r7, r8
+# CHECK-NEXT:  2      3     1.00                        qsax  r9, r12, r0
+# CHECK-NEXT:  0      0     0.00                  U     it  eq
+# CHECK-NEXT:  2      3     1.00                        qsaxeq  r9, r12, r0
+# CHECK-NEXT:  1      2     1.00                        qsub  r1, r2, r3
+# CHECK-NEXT:  1      2     1.00                        qsub16  r1, r2, r3
+# CHECK-NEXT:  1      2     1.00                        qsub8 r1, r2, r3
+# CHECK-NEXT:  0      0     0.00                  U     itet  le
+# CHECK-NEXT:  1      2     1.00                        qsuble  r1, r2, r3
+# CHECK-NEXT:  1      2     1.00                        qsub16gt  r1, r2, r3
+# CHECK-NEXT:  1      2     1.00                        qsub8le r1, r2, r3
+# CHECK-NEXT:  1      1     0.50                        rbit  r1, r2
+# CHECK-NEXT:  0      0     0.00                  U     it  ne
+# CHECK-NEXT:  1      1     0.50                        rbitne  r1, r2
+# CHECK-NEXT:  1      1     0.50                        rev.w r1, r2
+# CHECK-NEXT:  1      1     0.50                        rev.w r2, r8
+# CHECK-NEXT:  0      0     0.00                  U     itt ne
+# CHECK-NEXT:  1      1     0.50                        revne r1, r2
+# CHECK-NEXT:  1      1     0.50                        revne.w r1, r8
+# CHECK-NEXT:  1      1     0.50                        rev16.w r1, r2
+# CHECK-NEXT:  1      1     0.50                        rev16.w r2, r8
+# CHECK-NEXT:  0      0     0.00                  U     itt ne
+# CHECK-NEXT:  1      1     0.50                        rev16ne r1, r2
+# CHECK-NEXT:  1      1     0.50                        rev16ne.w r1, r8
+# CHECK-NEXT:  1      1     0.50                        revsh.w r1, r2
+# CHECK-NEXT:  1      1     0.50                        revsh.w r2, r8
+# CHECK-NEXT:  0      0     0.00                  U     itt ne
+# CHECK-NEXT:  1      1     0.50                        revshne r1, r2
+# CHECK-NEXT:  1      1     0.50                        revshne.w r1, r8
+# CHECK-NEXT:  1      1     0.50                        ror.w r2, r3, #12
+# CHECK-NEXT:  1      2     1.00                        rors.w  r8, r3, #31
+# CHECK-NEXT:  1      2     1.00                        rors.w  r2, r3, #1
+# CHECK-NEXT:  1      1     0.50                        ror.w r2, r3, #4
+# CHECK-NEXT:  1      2     1.00                        rors.w  r2, r12, #15
+# CHECK-NEXT:  1      1     0.50                        ror.w r3, r3, #19
+# CHECK-NEXT:  1      2     1.00                        rors.w  r8, r8, #2
+# CHECK-NEXT:  1      2     1.00                        rors.w  r7, r7, #5
+# CHECK-NEXT:  1      1     0.50                        ror.w r12, r12, #21
+# CHECK-NEXT:  1      1     0.50                        ror.w r3, r4, r2
+# CHECK-NEXT:  1      1     0.50                        ror.w r1, r1, r2
+# CHECK-NEXT:  1      2     1.00                        rors.w  r3, r4, r8
+# CHECK-NEXT:  1      1     0.50                        rrx r1, r2
+# CHECK-NEXT:  1      2     1.00                        rrxs  r1, r2
+# CHECK-NEXT:  0      0     0.00                  U     ite lt
+# CHECK-NEXT:  1      1     0.50                        rrxlt r9, r12
+# CHECK-NEXT:  1      2     1.00                        rrxsge  r8, r3
+# CHECK-NEXT:  1      1     0.50                        rsb.w r2, r5, #1044480
+# CHECK-NEXT:  1      1     0.50                        rsbs.w  r3, r12, #15
+# CHECK-NEXT:  1      1     0.50                        rsb.w r1, r1, #255
+# CHECK-NEXT:  1      1     0.50                  U     rsb r4, r4, r8
+# CHECK-NEXT:  1      1     0.50                  U     rsb r4, r9, r8
+# CHECK-NEXT:  1      2     1.00                        rsb r1, r4, r8, asr #3
+# CHECK-NEXT:  1      2     1.00                        rsbs  r2, r1, r7, lsl #1
+# CHECK-NEXT:  2      2     1.00    *      *      U     sadd16  r3, r4, r8
+# CHECK-NEXT:  0      0     0.00                  U     it  ne
+# CHECK-NEXT:  2      4     1.00    *      *      U     sadd16ne  r3, r4, r8
+# CHECK-NEXT:  2      2     1.00    *      *      U     sadd8 r3, r4, r8
+# CHECK-NEXT:  0      0     0.00                  U     it  ne
+# CHECK-NEXT:  2      4     1.00    *      *      U     sadd8ne r3, r4, r8
+# CHECK-NEXT:  2      3     1.00    *      *      U     sasx  r9, r2, r7
+# CHECK-NEXT:  0      0     0.00                  U     it  ne
+# CHECK-NEXT:  2      5     1.00    *      *      U     sasxne  r2, r5, r6
+# CHECK-NEXT:  1      1     0.50                        sbc r0, r1, #4
+# CHECK-NEXT:  1      1     0.50                        sbcs  r0, r1, #0
+# CHECK-NEXT:  1      1     0.50                        sbc r1, r2, #255
+# CHECK-NEXT:  1      1     0.50                        sbc r3, r7, #5570645
+# CHECK-NEXT:  1      1     0.50                        sbc r8, r12, #2852170240
+# CHECK-NEXT:  1      1     0.50                        sbc r9, r7, #2779096485
+# CHECK-NEXT:  1      1     0.50                        sbc r5, r3, #2264924160
+# CHECK-NEXT:  1      1     0.50                        sbc r4, r2, #2139095040
+# CHECK-NEXT:  1      1     0.50                        sbc r4, r2, #1664
+# CHECK-NEXT:  1      1     0.50                        sbc.w r4, r5, r6
+# CHECK-NEXT:  1      1     0.50                        sbcs.w  r4, r5, r6
+# CHECK-NEXT:  1      1     0.50                        sbc.w r9, r1, r3
+# CHECK-NEXT:  1      1     0.50                        sbcs.w  r9, r1, r3
+# CHECK-NEXT:  1      2     1.00                        sbc.w r0, r1, r3, ror #4
+# CHECK-NEXT:  1      2     1.00                        sbcs.w  r0, r1, r3, lsl #7
+# CHECK-NEXT:  1      2     1.00                        sbc.w r0, r1, r3, lsr #31
+# CHECK-NEXT:  1      2     1.00                        sbcs.w  r0, r1, r3, asr #32
+# CHECK-NEXT:  1      1     0.50                        sbfx  r4, r5, #16, #1
+# CHECK-NEXT:  0      0     0.00                  U     it  gt
+# CHECK-NEXT:  1      1     0.50                        sbfxgt  r4, r5, #16, #16
+# CHECK-NEXT:  1      1     0.50    *                   sel r5, r9, r2
+# CHECK-NEXT:  0      0     0.00                  U     it  le
+# CHECK-NEXT:  1      2     0.50    *                   selle r5, r9, r2
+# CHECK-NEXT:  0      0     0.00    *      *      U     sev.w
+# CHECK-NEXT:  0      0     0.00                  U     it  eq
+# CHECK-NEXT:  0      0     0.00    *      *      U     seveq.w
+# CHECK-NEXT:  2      2     1.00    *      *      U     sadd16  r1, r2, r3
+# CHECK-NEXT:  2      2     1.00    *      *      U     sadd8 r1, r2, r3
+# CHECK-NEXT:  0      0     0.00                  U     ite gt
+# CHECK-NEXT:  2      4     1.00    *      *      U     sadd16gt  r1, r2, r3
+# CHECK-NEXT:  2      4     1.00    *      *      U     sadd8le r1, r2, r3
+# CHECK-NEXT:  2      3     1.00                        shasx r4, r8, r2
+# CHECK-NEXT:  0      0     0.00                  U     it  gt
+# CHECK-NEXT:  2      3     1.00                        shasxgt r4, r8, r2
+# CHECK-NEXT:  2      3     1.00                        shsax r4, r8, r2
+# CHECK-NEXT:  0      0     0.00                  U     it  gt
+# CHECK-NEXT:  2      3     1.00                        shsaxgt r4, r8, r2
+# CHECK-NEXT:  1      2     1.00                        shsub16 r4, r8, r2
+# CHECK-NEXT:  1      2     1.00                        shsub8  r4, r8, r2
+# CHECK-NEXT:  0      0     0.00                  U     itt gt
+# CHECK-NEXT:  1      2     1.00                        shsub16gt r4, r8, r2
+# CHECK-NEXT:  1      2     1.00                        shsub8gt  r4, r8, r2
+# CHECK-NEXT:  1      3     1.00                        smlabb  r3, r1, r9, r0
+# CHECK-NEXT:  1      3     1.00                        smlabt  r5, r6, r4, r1
+# CHECK-NEXT:  1      3     1.00                        smlatb  r4, r2, r3, r2
+# CHECK-NEXT:  1      3     1.00                        smlatt  r8, r3, r8, r4
+# CHECK-NEXT:  0      0     0.00                  U     itete gt
+# CHECK-NEXT:  1      3     1.00                        smlabbgt  r3, r1, r9, r0
+# CHECK-NEXT:  1      3     1.00                        smlabtle  r5, r6, r4, r1
+# CHECK-NEXT:  1      3     1.00                        smlatbgt  r4, r2, r3, r2
+# CHECK-NEXT:  1      3     1.00                        smlattle  r8, r3, r8, r4
+# CHECK-NEXT:  1      3     1.00                        smlad r2, r3, r5, r8
+# CHECK-NEXT:  1      3     1.00                        smladx  r2, r3, r5, r8
+# CHECK-NEXT:  0      0     0.00                  U     itt hi
+# CHECK-NEXT:  1      3     1.00                        smladhi r2, r3, r5, r8
+# CHECK-NEXT:  1      3     1.00                        smladxhi  r2, r3, r5, r8
+# CHECK-NEXT:  2      4     2.00                        smlal r2, r3, r5, r8
+# CHECK-NEXT:  0      0     0.00                  U     it  eq
+# CHECK-NEXT:  2      4     2.00                        smlaleq r2, r3, r5, r8
+# CHECK-NEXT:  2      4     2.00                        smlalbb r3, r1, r9, r0
+# CHECK-NEXT:  2      4     2.00                        smlalbt r5, r6, r4, r1
+# CHECK-NEXT:  2      4     2.00                        smlaltb r4, r2, r3, r2
+# CHECK-NEXT:  2      4     2.00                        smlaltt r8, r3, r8, r4
+# CHECK-NEXT:  0      0     0.00                  U     iteet ge
+# CHECK-NEXT:  2      4     2.00                        smlalbbge r3, r1, r9, r0
+# CHECK-NEXT:  2      4     2.00                        smlalbtlt r5, r6, r4, r1
+# CHECK-NEXT:  2      4     2.00                        smlaltblt r4, r2, r3, r2
+# CHECK-NEXT:  2      4     2.00                        smlalttge r8, r3, r8, r4
+# CHECK-NEXT:  2      4     2.00                        smlald  r2, r3, r5, r8
+# CHECK-NEXT:  2      4     2.00                        smlaldx r2, r3, r5, r8
+# CHECK-NEXT:  0      0     0.00                  U     ite eq
+# CHECK-NEXT:  2      4     2.00                        smlaldeq  r2, r3, r5, r8
+# CHECK-NEXT:  2      4     2.00                        smlaldxne r2, r3, r5, r8
+# CHECK-NEXT:  1      3     1.00                        smlawb  r2, r3, r10, r8
+# CHECK-NEXT:  1      3     1.00                        smlawt  r8, r3, r5, r9
+# CHECK-NEXT:  0      0     0.00                  U     ite eq
+# CHECK-NEXT:  1      3     1.00                        smlawbeq  r2, r7, r5, r8
+# CHECK-NEXT:  1      3     1.00                        smlawtne  r1, r3, r0, r8
+# CHECK-NEXT:  1      3     1.00                        smlsd r2, r3, r5, r8
+# CHECK-NEXT:  1      3     1.00                        smlsdx  r2, r3, r5, r8
+# CHECK-NEXT:  0      0     0.00                  U     ite le
+# CHECK-NEXT:  1      3     1.00                        smlsdle r2, r3, r5, r8
+# CHECK-NEXT:  1      3     1.00                        smlsdxgt  r2, r3, r5, r8
+# CHECK-NEXT:  2      4     2.00                        smlsld  r2, r9, r5, r1
+# CHECK-NEXT:  2      4     2.00                        smlsldx r4, r11, r2, r8
+# CHECK-NEXT:  0      0     0.00                  U     ite ge
+# CHECK-NEXT:  2      4     2.00                        smlsldge  r8, r2, r5, r6
+# CHECK-NEXT:  2      4     2.00                        smlsldxlt r1, r0, r3, r8
+# CHECK-NEXT:  1      3     1.00                        smmla r1, r2, r3, r4
+# CHECK-NEXT:  1      3     1.00                        smmlar  r4, r3, r2, r1
+# CHECK-NEXT:  0      0     0.00                  U     ite lo
+# CHECK-NEXT:  1      3     1.00                        smmlalo r1, r2, r3, r4
+# CHECK-NEXT:  1      3     1.00                        smmlarhs  r4, r3, r2, r1
+# CHECK-NEXT:  1      3     1.00                  U     smmls r1, r2, r3, r4
+# CHECK-NEXT:  1      3     1.00                        smmlsr  r4, r3, r2, r1
+# CHECK-NEXT:  0      0     0.00                  U     ite lo
+# CHECK-NEXT:  1      3     1.00                  U     smmlslo r1, r2, r3, r4
+# CHECK-NEXT:  1      3     1.00                        smmlsrhs  r4, r3, r2, r1
+# CHECK-NEXT:  1      2     1.00                        ssat  r9, #30, r0, asr #2
+# CHECK-NEXT:  2      1     1.00           *            str r10, [r11], #0
+# CHECK-NEXT:  2      1     1.00           *            strd  r1, r1, [r0], #0
+# CHECK-NEXT:  2      1     1.00           *            strd  r6, r3, [r5], #-8
+# CHECK-NEXT:  2      1     1.00           *            strd  r7, r4, [r5], #-4
+# CHECK-NEXT:  2      1     1.00           *            strd  r0, r1, [r2, #-0]!
+# CHECK-NEXT:  2      1     1.00           *            strd  r0, r1, [r2, #0]!
+# CHECK-NEXT:  1      1     1.00           *            strd  r0, r1, [r2, #-0]
+# CHECK-NEXT:  0      0     0.00    *      *      U     strex r1, r8, [r4]
+# CHECK-NEXT:  0      0     0.00    *      *      U     strex r8, r2, [r4]
+# CHECK-NEXT:  0      0     0.00    *      *      U     strex r2, r12, [sp, #128]
+# CHECK-NEXT:  0      0     0.00    *      *      U     strexb  r5, r1, [r7]
+# CHECK-NEXT:  0      0     0.00    *      *      U     strexh  r9, r7, [r12]
+# CHECK-NEXT:  0      0     0.00           *      U     strexd  r9, r3, r6, [r4]
+# CHECK-NEXT:  1      1     1.00           *            strh  r5, [r5, #-4]
+# CHECK-NEXT:  1      1     1.00           *            strh  r5, [r6, #32]
+# CHECK-NEXT:  1      1     1.00           *            strh.w  r5, [r6, #33]
+# CHECK-NEXT:  1      1     1.00           *            strh.w  r5, [r6, #257]
+# CHECK-NEXT:  1      1     1.00           *            strh.w  lr, [r7, #257]
+# CHECK-NEXT:  2      1     1.00           *            strh  r5, [r8, #255]!
+# CHECK-NEXT:  2      1     1.00           *            strh  r2, [r5, #4]!
+# CHECK-NEXT:  2      1     1.00           *            strh  r1, [r4, #-4]!
+# CHECK-NEXT:  2      1     1.00           *            strh  r1, [r4, #0]!
+# CHECK-NEXT:  2      1     1.00           *            strh  lr, [r3], #255
+# CHECK-NEXT:  2      1     1.00           *            strh  r9, [r2], #4
+# CHECK-NEXT:  2      1     1.00           *            strh  r3, [sp], #-4
+# CHECK-NEXT:  1      1     1.00           *            strh.w  r1, [r8, r1]
+# CHECK-NEXT:  1      1     1.00           *            strh.w  r4, [r5, r2]
+# CHECK-NEXT:  1      1     1.00           *            strh.w  r6, [r0, r2, lsl #3]
+# CHECK-NEXT:  1      1     1.00           *            strh.w  r8, [r8, r2, lsl #2]
+# CHECK-NEXT:  1      1     1.00           *            strh.w  r7, [sp, r2, lsl #1]
+# CHECK-NEXT:  1      1     1.00           *            strh.w  r7, [sp, r2]
+# CHECK-NEXT:  2      1     1.00                  U     strht r1, [r2]
+# CHECK-NEXT:  2      1     1.00                  U     strht r1, [r8]
+# CHECK-NEXT:  2      1     1.00                  U     strht r1, [r8, #3]
+# CHECK-NEXT:  2      1     1.00                  U     strht r1, [r8, #255]
+# CHECK-NEXT:  1      1     1.00                  U     strt  r1, [r2]
+# CHECK-NEXT:  1      1     1.00                  U     strt  r1, [r8]
+# CHECK-NEXT:  1      1     1.00                  U     strt  r1, [r8, #3]
+# CHECK-NEXT:  1      1     1.00                  U     strt  r1, [r8, #255]
+# CHECK-NEXT:  0      0     0.00                  U     itet  eq
+# CHECK-NEXT:  1      1     0.50                        subeq r1, r2, #4
+# CHECK-NEXT:  1      1     0.50                        subwne  r5, r3, #1023
+# CHECK-NEXT:  1      1     0.50                        subweq  r4, r5, #293
+# CHECK-NEXT:  1      1     0.50                        sub.w r2, sp, #1024
+# CHECK-NEXT:  1      1     0.50                        sub.w r2, r8, #65280
+# CHECK-NEXT:  1      1     0.50                        subw  r2, r3, #257
+# CHECK-NEXT:  1      1     0.50                        sub.w r12, r6, #256
+# CHECK-NEXT:  1      1     0.50                        subw  r12, r6, #256
+# CHECK-NEXT:  1      1     0.50                        subs.w  r1, r2, #496
+# CHECK-NEXT:  0      0     0.00                        subs  pc, lr, #4
+# CHECK-NEXT:  1      1     0.50                        sub.w r4, r5, r6
+# CHECK-NEXT:  1      2     1.00                        sub.w r4, r5, r6, lsl #5
+# CHECK-NEXT:  1      2     1.00                        sub.w r4, r5, r6, lsr #5
+# CHECK-NEXT:  1      2     1.00                        sub.w r4, r5, r6, lsr #5
+# CHECK-NEXT:  1      2     1.00                        sub.w r4, r5, r6, asr #5
+# CHECK-NEXT:  1      2     1.00                        sub.w r4, r5, r6, ror #5
+# CHECK-NEXT:  1      2     1.00                        sub.w r5, r2, r12, rrx
+# CHECK-NEXT:  0      0     0.00                  U     svc #0
+# CHECK-NEXT:  0      0     0.00                  U     ite eq
+# CHECK-NEXT:  0      0     0.00                  U     svceq #255
+# CHECK-NEXT:  0      0     0.00                  U     svcne #33
+# CHECK-NEXT:  1      2     1.00                        sxtab r2, r3, r4
+# CHECK-NEXT:  1      2     1.00                        sxtab r4, r5, r6
+# CHECK-NEXT:  0      0     0.00                  U     it  lt
+# CHECK-NEXT:  1      2     1.00                        sxtablt r6, r2, r9, ror #8
+# CHECK-NEXT:  1      2     1.00                        sxtab r5, r1, r4, ror #16
+# CHECK-NEXT:  1      2     1.00                        sxtab r7, r8, r3, ror #24
+# CHECK-NEXT:  1      4     1.00                        sxtab16 r6, r2, r7
+# CHECK-NEXT:  1      4     1.00                        sxtab16 r3, r5, r8, ror #8
+# CHECK-NEXT:  1      4     1.00                        sxtab16 r3, r2, r1, ror #16
+# CHECK-NEXT:  0      0     0.00                  U     ite ne
+# CHECK-NEXT:  1      4     1.00                        sxtab16ne r0, r1, r4
+# CHECK-NEXT:  1      4     1.00                        sxtab16eq r1, r2, r3, ror #24
+# CHECK-NEXT:  1      2     1.00                        sxtah r1, r3, r9
+# CHECK-NEXT:  1      2     1.00                        sxtah r3, r8, r3, ror #8
+# CHECK-NEXT:  1      2     1.00                        sxtah r9, r3, r3, ror #24
+# CHECK-NEXT:  0      0     0.00                  U     ite hi
+# CHECK-NEXT:  1      2     1.00                        sxtahhi r6, r1, r6
+# CHECK-NEXT:  1      2     1.00                        sxtahls r2, r2, r4, ror #16
+# CHECK-NEXT:  1      1     0.50                        sxtb  r5, r6
+# CHECK-NEXT:  1      1     0.50                        sxtb.w  r6, r9, ror #8
+# CHECK-NEXT:  1      1     0.50                        sxtb.w  r8, r3, ror #24
+# CHECK-NEXT:  0      0     0.00                  U     ite ge
+# CHECK-NEXT:  1      1     0.50                        sxtbge  r2, r4
+# CHECK-NEXT:  1      1     0.50                        sxtblt.w  r5, r1, ror #16
+# CHECK-NEXT:  1      1     0.50                        sxtb16  r1, r4
+# CHECK-NEXT:  1      1     0.50                        sxtb16  r6, r7
+# CHECK-NEXT:  1      1     0.50                        sxtb16  r3, r1, ror #16
+# CHECK-NEXT:  0      0     0.00                  U     ite hs
+# CHECK-NEXT:  1      1     0.50                        sxtb16hs  r3, r5, ror #8
+# CHECK-NEXT:  1      1     0.50                        sxtb16lo  r2, r3, ror #24
+# CHECK-NEXT:  1      1     0.50                        sxth  r1, r6
+# CHECK-NEXT:  1      1     0.50                        sxth.w  r3, r8, ror #8
+# CHECK-NEXT:  1      1     0.50                        sxth.w  r9, r3, ror #24
+# CHECK-NEXT:  0      0     0.00                  U     itt ne
+# CHECK-NEXT:  1      1     0.50                        sxthne.w  r3, r9
+# CHECK-NEXT:  1      1     0.50                        sxthne.w  r2, r2, ror #16
+# CHECK-NEXT:  1      1     0.50                        sxtb  r5, r6
+# CHECK-NEXT:  1      1     0.50                        sxtb.w  r6, r9, ror #8
+# CHECK-NEXT:  1      1     0.50                        sxtb.w  r8, r3, ror #24
+# CHECK-NEXT:  0      0     0.00                  U     ite ge
+# CHECK-NEXT:  1      1     0.50                        sxtbge  r2, r4
+# CHECK-NEXT:  1      1     0.50                        sxtblt.w  r5, r1, ror #16
+# CHECK-NEXT:  1      1     0.50                        sxtb16  r1, r4
+# CHECK-NEXT:  1      1     0.50                        sxtb16  r6, r7
+# CHECK-NEXT:  1      1     0.50                        sxtb16  r3, r1, ror #16
+# CHECK-NEXT:  0      0     0.00                  U     ite hs
+# CHECK-NEXT:  1      1     0.50                        sxtb16hs  r3, r5, ror #8
+# CHECK-NEXT:  1      1     0.50                        sxtb16lo  r2, r3, ror #24
+# CHECK-NEXT:  1      1     0.50                        sxth  r1, r6
+# CHECK-NEXT:  1      1     0.50                        sxth.w  r3, r8, ror #8
+# CHECK-NEXT:  1      1     0.50                        sxth.w  r9, r3, ror #24
+# CHECK-NEXT:  0      0     0.00                  U     itt ne
+# CHECK-NEXT:  1      1     0.50                        sxthne.w  r3, r9
+# CHECK-NEXT:  1      1     0.50                        sxthne.w  r2, r2, ror #16
+# CHECK-NEXT:  2      3     1.00                  U     tbb [r3, r8]
+# CHECK-NEXT:  2      3     1.00                  U     tbh [r3, r8, lsl #1]
+# CHECK-NEXT:  0      0     0.00                  U     it  eq
+# CHECK-NEXT:  2      3     1.00                  U     tbbeq [r3, r8]
+# CHECK-NEXT:  0      0     0.00                  U     it  hs
+# CHECK-NEXT:  2      3     1.00                  U     tbhhs [r3, r8, lsl #1]
+# CHECK-NEXT:  1      1     0.50                        teq.w r5, #61440
+# CHECK-NEXT:  1      1     0.50                        teq.w r4, r5
+# CHECK-NEXT:  1      2     1.00                        teq.w r4, r5, lsl #5
+# CHECK-NEXT:  1      2     1.00                        teq.w r4, r5, lsr #5
+# CHECK-NEXT:  1      2     1.00                        teq.w r4, r5, lsr #5
+# CHECK-NEXT:  1      2     1.00                        teq.w r4, r5, asr #5
+# CHECK-NEXT:  1      2     1.00                        teq.w r4, r5, ror #5
+# CHECK-NEXT:  1      1     0.50                        tst.w r5, #61440
+# CHECK-NEXT:  1      1     0.50                        tst r2, r5
+# CHECK-NEXT:  1      2     1.00                        tst.w r3, r12, lsl #5
+# CHECK-NEXT:  1      2     1.00                        tst.w r4, r11, lsr #4
+# CHECK-NEXT:  1      2     1.00                        tst.w r5, r10, lsr #12
+# CHECK-NEXT:  1      2     1.00                        tst.w r6, r9, asr #30
+# CHECK-NEXT:  1      2     1.00                        tst.w r7, r8, ror #2
+# CHECK-NEXT:  2      2     1.00    *      *      U     uadd16  r1, r2, r3
+# CHECK-NEXT:  2      2     1.00    *      *      U     uadd8 r1, r2, r3
+# CHECK-NEXT:  0      0     0.00                  U     ite gt
+# CHECK-NEXT:  2      4     1.00    *      *      U     uadd16gt  r1, r2, r3
+# CHECK-NEXT:  2      4     1.00    *      *      U     uadd8le r1, r2, r3
+# CHECK-NEXT:  2      3     1.00    *      *      U     uasx  r9, r12, r0
+# CHECK-NEXT:  0      0     0.00                  U     it  eq
+# CHECK-NEXT:  2      5     1.00    *      *      U     uasxeq  r9, r12, r0
+# CHECK-NEXT:  2      3     1.00    *      *      U     uasx  r9, r12, r0
+# CHECK-NEXT:  0      0     0.00                  U     it  eq
+# CHECK-NEXT:  2      5     1.00    *      *      U     uasxeq  r9, r12, r0
+# CHECK-NEXT:  1      1     0.50                        ubfx  r4, r5, #16, #1
+# CHECK-NEXT:  0      0     0.00                  U     it  gt
+# CHECK-NEXT:  1      1     0.50                        ubfxgt  r4, r5, #16, #16
+# CHECK-NEXT:  1      2     1.00                        uhadd16 r4, r8, r2
+# CHECK-NEXT:  1      2     1.00                        uhadd8  r4, r8, r2
+# CHECK-NEXT:  0      0     0.00                  U     itt gt
+# CHECK-NEXT:  1      2     1.00                        uhadd16gt r4, r8, r2
+# CHECK-NEXT:  1      2     1.00                        uhadd8gt  r4, r8, r2
+# CHECK-NEXT:  2      3     1.00                        uhasx r4, r1, r5
+# CHECK-NEXT:  2      3     1.00                        uhsax r5, r6, r6
+# CHECK-NEXT:  0      0     0.00                  U     itt gt
+# CHECK-NEXT:  2      3     1.00                        uhasxgt r6, r9, r8
+# CHECK-NEXT:  2      3     1.00                        uhsaxgt r7, r8, r12
+# CHECK-NEXT:  1      2     1.00                        uhsub16 r5, r8, r3
+# CHECK-NEXT:  1      2     1.00                        uhsub8  r1, r7, r6
+# CHECK-NEXT:  0      0     0.00                  U     itt lt
+# CHECK-NEXT:  1      2     1.00                        uhsub16lt r4, r9, r12
+# CHECK-NEXT:  1      2     1.00                        uhsub8lt  r3, r1, r5
+# CHECK-NEXT:  2      4     2.00                        umaal r3, r4, r5, r6
+# CHECK-NEXT:  0      0     0.00                  U     it  lt
+# CHECK-NEXT:  2      4     2.00                        umaallt r3, r4, r5, r6
+# CHECK-NEXT:  2      4     2.00                        umlal r2, r4, r6, r8
+# CHECK-NEXT:  0      0     0.00                  U     it  gt
+# CHECK-NEXT:  2      4     2.00                        umlalgt r6, r1, r2, r6
+# CHECK-NEXT:  2      4     2.00                        umull r2, r4, r6, r8
+# CHECK-NEXT:  0      0     0.00                  U     it  gt
+# CHECK-NEXT:  2      4     2.00                        umullgt r6, r1, r2, r6
+# CHECK-NEXT:  1      2     1.00                        uqadd16 r1, r2, r3
+# CHECK-NEXT:  1      2     1.00                        uqadd8  r3, r4, r8
+# CHECK-NEXT:  0      0     0.00                  U     ite gt
+# CHECK-NEXT:  1      2     1.00                        uqadd16gt r4, r7, r9
+# CHECK-NEXT:  1      2     1.00                        uqadd8le  r8, r1, r2
+# CHECK-NEXT:  2      3     1.00                        uqasx r1, r2, r3
+# CHECK-NEXT:  2      3     1.00                        uqsax r3, r4, r8
+# CHECK-NEXT:  0      0     0.00                  U     ite gt
+# CHECK-NEXT:  2      3     1.00                        uqasxgt r4, r7, r9
+# CHECK-NEXT:  2      3     1.00                        uqsaxle r8, r1, r2
+# CHECK-NEXT:  1      2     1.00                        uqsub8  r8, r2, r9
+# CHECK-NEXT:  1      2     1.00                        uqsub16 r1, r9, r7
+# CHECK-NEXT:  0      0     0.00                  U     ite gt
+# CHECK-NEXT:  1      2     1.00                        uqsub8gt  r3, r1, r6
+# CHECK-NEXT:  1      2     1.00                        uqsub16le r4, r6, r4
+# CHECK-NEXT:  1      3     1.00                        usad8 r1, r9, r7
+# CHECK-NEXT:  1      3     1.00                        usada8  r8, r2, r9, r12
+# CHECK-NEXT:  0      0     0.00                  U     ite gt
+# CHECK-NEXT:  1      3     1.00                        usada8gt  r3, r1, r6, r9
+# CHECK-NEXT:  1      3     1.00                        usad8le r4, r6, r4
+# CHECK-NEXT:  1      2     1.00                        usat  r8, #1, r10
+# CHECK-NEXT:  1      2     1.00                        usat  r8, #4, r10
+# CHECK-NEXT:  1      2     1.00                        usat  r8, #5, r10, lsl #31
+# CHECK-NEXT:  1      2     1.00                        usat  r8, #16, r10, asr #1
+# CHECK-NEXT:  1      2     1.00                        usat16  r2, #2, r7
+# CHECK-NEXT:  1      2     1.00                        usat16  r3, #15, r5
+# CHECK-NEXT:  2      3     1.00    *      *      U     usax  r2, r3, r4
+# CHECK-NEXT:  0      0     0.00                  U     it  ne
+# CHECK-NEXT:  2      5     1.00    *      *      U     usaxne  r6, r1, r9
+# CHECK-NEXT:  2      3     1.00    *      *      U     usax  r2, r3, r4
+# CHECK-NEXT:  0      0     0.00                  U     it  ne
+# CHECK-NEXT:  2      5     1.00    *      *      U     usaxne  r6, r1, r9
+# CHECK-NEXT:  2      2     1.00    *      *      U     usub16  r4, r2, r7
+# CHECK-NEXT:  2      2     1.00    *      *      U     usub8 r1, r8, r5
+# CHECK-NEXT:  0      0     0.00                  U     ite hi
+# CHECK-NEXT:  2      4     1.00    *      *      U     usub16hi  r1, r1, r3
+# CHECK-NEXT:  2      4     1.00    *      *      U     usub8ls r9, r2, r3
+# CHECK-NEXT:  1      2     1.00                        uxtab r2, r3, r4
+# CHECK-NEXT:  1      2     1.00                        uxtab r4, r5, r6
+# CHECK-NEXT:  0      0     0.00                  U     it  lt
+# CHECK-NEXT:  1      2     1.00                        uxtablt r6, r2, r9, ror #8
+# CHECK-NEXT:  1      2     1.00                        uxtab r5, r1, r4, ror #16
+# CHECK-NEXT:  1      2     1.00                        uxtab r7, r8, r3, ror #24
+# CHECK-NEXT:  0      0     0.00                  U     it  ge
+# CHECK-NEXT:  1      4     1.00                        uxtab16ge r0, r1, r4
+# CHECK-NEXT:  1      4     1.00                        uxtab16 r6, r2, r7
+# CHECK-NEXT:  1      4     1.00                        uxtab16 r3, r5, r8, ror #8
+# CHECK-NEXT:  1      4     1.00                        uxtab16 r3, r2, r1, ror #16
+# CHECK-NEXT:  0      0     0.00                  U     it  eq
+# CHECK-NEXT:  1      4     1.00                        uxtab16eq r1, r2, r3, ror #24
+# CHECK-NEXT:  1      2     1.00                        uxtah r1, r3, r9
+# CHECK-NEXT:  0      0     0.00                  U     it  hi
+# CHECK-NEXT:  1      2     1.00                        uxtahhi r6, r1, r6
+# CHECK-NEXT:  1      2     1.00                        uxtah r3, r8, r3, ror #8
+# CHECK-NEXT:  0      0     0.00                  U     it  lo
+# CHECK-NEXT:  1      2     1.00                        uxtahlo r2, r2, r4, ror #16
+# CHECK-NEXT:  1      2     1.00                        uxtah r9, r3, r3, ror #24
+# CHECK-NEXT:  0      0     0.00                  U     it  ge
+# CHECK-NEXT:  1      1     0.50                        uxtbge  r2, r4
+# CHECK-NEXT:  1      1     0.50                        uxtb  r5, r6
+# CHECK-NEXT:  1      1     0.50                        uxtb.w  r6, r9, ror #8
+# CHECK-NEXT:  0      0     0.00                  U     it  lo
+# CHECK-NEXT:  1      1     0.50                        uxtblo.w  r5, r1, ror #16
+# CHECK-NEXT:  1      1     0.50                        uxtb.w  r8, r3, ror #24
+# CHECK-NEXT:  1      1     0.50                        uxtb16  r1, r4
+# CHECK-NEXT:  1      1     0.50                        uxtb16  r6, r7
+# CHECK-NEXT:  0      0     0.00                  U     it  hs
+# CHECK-NEXT:  1      1     0.50                        uxtb16hs  r3, r5, ror #8
+# CHECK-NEXT:  1      1     0.50                        uxtb16  r3, r1, ror #16
+# CHECK-NEXT:  0      0     0.00                  U     it  ge
+# CHECK-NEXT:  1      1     0.50                        uxtb16ge  r2, r3, ror #24
+# CHECK-NEXT:  0      0     0.00                  U     it  ne
+# CHECK-NEXT:  1      1     0.50                        uxthne.w  r3, r9
+# CHECK-NEXT:  1      1     0.50                        uxth  r1, r6
+# CHECK-NEXT:  1      1     0.50                        uxth.w  r3, r8, ror #8
+# CHECK-NEXT:  0      0     0.00                  U     it  le
+# CHECK-NEXT:  1      1     0.50                        uxthle.w  r2, r2, ror #16
+# CHECK-NEXT:  1      1     0.50                        uxth.w  r9, r3, ror #24
+# CHECK-NEXT:  0      0     0.00    *      *      U     wfe
+# CHECK-NEXT:  0      0     0.00    *      *      U     wfi
+# CHECK-NEXT:  0      0     0.00    *      *      U     yield
+# CHECK-NEXT:  0      0     0.00                  U     itet  lt
+# CHECK-NEXT:  0      0     0.00    *      *      U     wfelt
+# CHECK-NEXT:  0      0     0.00    *      *      U     wfige
+# CHECK-NEXT:  0      0     0.00    *      *      U     yieldlt
+# CHECK-NEXT:  0      0     0.00    *      *      U     hint  #6
+# CHECK-NEXT:  0      0     0.00    *      *      U     hint.w  #6
+# CHECK-NEXT:  0      0     0.00    *      *      U     hint.w  #102
+
+# CHECK:      Resources:
+# CHECK-NEXT: [0]   - A57UnitB
+# CHECK-NEXT: [1.0] - A57UnitI
+# CHECK-NEXT: [1.1] - A57UnitI
+# CHECK-NEXT: [2]   - A57UnitL
+# CHECK-NEXT: [3]   - A57UnitM
+# CHECK-NEXT: [4]   - A57UnitS
+# CHECK-NEXT: [5]   - A57UnitW
+# CHECK-NEXT: [6]   - A57UnitX
+
+# CHECK:      Resource pressure per iteration:
+# CHECK-NEXT: [0]    [1.0]  [1.1]  [2]    [3]    [4]    [5]    [6]
+# CHECK-NEXT: 12.00  164.00 164.00 221.00 313.00 44.00   -      -
+
+# CHECK:      Resource pressure by instruction:
+# CHECK-NEXT: [0]    [1.0]  [1.1]  [2]    [3]    [4]    [5]    [6]    Instructions:
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     adc r0, r1, #4
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     adcs  r0, r1, #0
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     adc r1, r2, #255
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     adc r3, r7, #5570645
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     adc r8, r12, #2852170240
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     adc r9, r7, #2779096485
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     adc r5, r3, #2264924160
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     adc r4, r2, #2139095040
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     adc r4, r2, #1664
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     adc.w r4, r5, r6
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     adcs.w  r4, r5, r6
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     adc.w r9, r1, r3
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     adcs.w  r9, r1, r3
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     adc.w r0, r1, r3, ror #4
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     adcs.w  r0, r1, r3, lsl #7
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     adc.w r0, r1, r3, lsr #31
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     adcs.w  r0, r1, r3, asr #32
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     itet  eq
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     addeq r1, r2, #4
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     addwne  r5, r3, #1023
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     addweq  r4, r5, #293
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     add.w r2, sp, #1024
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     add.w r2, r8, #65280
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     addw  r2, r3, #257
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     add.w r12, r6, #256
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     addw  r12, r6, #256
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     adds.w  r1, r2, #496
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     add.w r1, r2, r8
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     add.w r5, r9, r2, asr #32
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     adds.w  r7, r3, r1, lsl #31
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     adds.w  r0, r3, r6, lsr #25
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     add.w r4, r8, r1, ror #12
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     adr.w r11, #-3270
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     adr.w r11, #-826
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     subw  r1, pc, #0
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     adr.w r0, #1024
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     and r2, r5, #1044480
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     ands  r3, r12, #15
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     and r1, r1, #255
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     and.w r4, r9, r8
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     and.w r1, r4, r8, asr #3
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     ands.w  r2, r1, r7, lsl #1
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     ands.w  r4, r5, r2, lsr #20
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     and.w r9, r12, r1, ror #17
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     asr.w r2, r3, #12
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     asrs.w  r8, r3, #32
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     asrs.w  r2, r3, #1
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     asr.w r2, r3, #4
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     asrs.w  r2, r12, #15
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     asr.w r3, r3, #19
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     asrs.w  r8, r8, #2
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     asrs.w  r7, r7, #5
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     asr.w r12, r12, #21
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     asr.w r3, r4, r2
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     asr.w r1, r1, r2
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     asrs.w  r3, r4, r8
+# CHECK-NEXT: 1.00    -      -      -      -      -      -      -     bmi.w #-183396
+# CHECK-NEXT: 1.00    -      -      -      -      -      -      -     b.w #208962
+# CHECK-NEXT: 1.00    -      -      -      -      -      -      -     b.w #-16777216
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     bfc r5, #3, #17
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  lo
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     bfclo r5, #3, #17
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     bfi r5, r2, #3, #17
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  ne
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     bfine r5, r2, #3, #17
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     bfi r6, r0, #0, #32
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     bfi r6, r0, #31, #1
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     bic r10, r1, #15
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     bic.w r12, r3, r6
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     bic.w r11, r2, r6, lsl #12
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     bic.w r8, r4, r1, lsr #11
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     bic.w r7, r5, r7, lsr #15
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     bic.w r6, r7, r9, asr #32
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     bic.w r5, r6, r8, ror #1
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     bic r1, r1, #15
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     bic.w r1, r1, r1
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     bic.w r4, r4, r2, lsl #31
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     bic.w r6, r6, r3, lsr #12
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     bic.w r7, r7, r4, lsr #7
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     bic.w r8, r8, r5, asr #15
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     bic.w r12, r12, r6, ror #29
+# CHECK-NEXT: 1.00   0.50   0.50    -      -      -      -      -     bxj r5
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  ne
+# CHECK-NEXT: 1.00   0.50   0.50    -      -      -      -      -     bxjne r7
+# CHECK-NEXT: 1.00    -      -      -      -      -      -      -     cbnz  r7, #6
+# CHECK-NEXT: 1.00    -      -      -      -      -      -      -     cbnz  r7, #12
+# CHECK-NEXT: 1.00    -      -      -      -      -      -      -     cbz r4, #64
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     strh  r6, [r5, #14]
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     asrs  r7, r2, #4
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     strh  r6, [r7, #14]
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     itett ne
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     cmpne r7, #243
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     addeq r7, r1, r2
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     strh  r2, [r7, #22]
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     asrs  r1, r6, #7
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     lsrs  r1, r6, #31
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     adds  r7, r1, r0
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     lsls  r3, r5, #27
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     asrs  r7, r1, #4
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     strh  r3, [r5, #54]
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     asrs  r7, r5, #4
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     str r6, [sp, #940]
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     adds  r7, r5, #4
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     str r6, [sp, #940]
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     asrs  r7, r5, #4
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     adr r6, #940
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     asrs  r7, r5, #4
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     cmp r7, #182
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     cmp.w r5, #65280
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     cmp.w r4, r12
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     cmp.w r9, r6, lsl #12
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     cmp.w r3, r7, lsr #31
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     cmp.w sp, r6, lsr #1
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     cmp.w r2, r5, asr #24
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     cmp.w r1, r4, ror #15
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dbg #5
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dbg #0
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dbg #15
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dmb sy
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dmb st
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dmb ld
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dmb #0xc
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dmb ish
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dmb ishst
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dmb ishld
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dmb #0x8
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dmb nsh
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dmb nshst
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dmb nshld
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dmb #0x4
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dmb osh
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dmb oshst
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dmb oshld
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dmb #0x0
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dsb sy
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dsb st
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dsb ld
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dsb #0xc
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dsb ish
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dsb ishst
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dsb ishld
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dsb #0x8
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dsb nsh
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dsb nshst
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dsb nshld
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     pssbb
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dsb osh
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dsb oshst
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     dsb oshld
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     ssbb
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     eor r4, r5, #61440
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     eor.w r4, r5, r6
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     eor.w r4, r5, r6, lsl #5
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     eor.w r4, r5, r6, lsr #5
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     eor.w r4, r5, r6, lsr #5
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     eor.w r4, r5, r6, asr #5
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     eor.w r4, r5, r6, ror #5
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     isb sy
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     isb #0xa
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     iteet eq
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     addeq r0, r1, r2
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     nopne
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     subne r5, r6, r7
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     addeq r1, r2, #4
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     ittee ls
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     addls r0, r1, r2
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     nopls
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     subhi r5, r6, r7
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     addhi r1, r2, #4
+# CHECK-NEXT:  -     2.00   2.00   4.00    -      -      -      -     ldm.w r4, {r4, r5, r8, r9}
+# CHECK-NEXT:  -      -      -     2.00    -      -      -      -     ldm.w r4, {r5, r6}
+# CHECK-NEXT:  -     1.00   1.00   2.00    -      -      -      -     ldm.w r5!, {r3, r8}
+# CHECK-NEXT:  -     2.00   2.00   4.00    -      -      -      -     ldm.w r4, {r4, r5, r8, r9}
+# CHECK-NEXT:  -      -      -     2.00    -      -      -      -     ldm.w r4, {r5, r6}
+# CHECK-NEXT:  -     1.00   1.00   2.00    -      -      -      -     ldm.w r5!, {r3, r8}
+# CHECK-NEXT:  -     1.00   1.00   2.00    -      -      -      -     ldm.w r5!, {r1, r2}
+# CHECK-NEXT:  -     1.00   1.00   2.00    -      -      -      -     ldm.w r2, {r1, r2}
+# CHECK-NEXT:  -     2.00   2.00   4.00    -      -      -      -     ldm.w r4, {r4, r5, r8, r9}
+# CHECK-NEXT:  -      -      -     2.00    -      -      -      -     ldm.w r4, {r5, r6}
+# CHECK-NEXT:  -     1.00   1.00   2.00    -      -      -      -     ldm.w r5!, {r3, r8}
+# CHECK-NEXT:  -     2.00   2.00   4.00    -      -      -      -     ldm.w r4, {r4, r5, r8, r9}
+# CHECK-NEXT:  -      -      -     2.00    -      -      -      -     ldm.w r4, {r5, r6}
+# CHECK-NEXT:  -     1.00   1.00   2.00    -      -      -      -     ldm.w r5!, {r3, r8}
+# CHECK-NEXT:  -     1.00   1.00   2.00    -      -      -      -     ldm.w r5!, {r3, r8}
+# CHECK-NEXT:  -     2.00   2.00   4.00    -      -      -      -     ldmdb r4, {r4, r5, r8, r9}
+# CHECK-NEXT:  -      -      -     2.00    -      -      -      -     ldmdb r4, {r5, r6}
+# CHECK-NEXT:  -     1.00   1.00   2.00    -      -      -      -     ldmdb r5!, {r3, r8}
+# CHECK-NEXT:  -     1.00   1.00   2.00    -      -      -      -     ldmdb r5!, {r3, r8}
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldr r5, [r5, #-4]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldr r5, [r6, #32]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldr.w r5, [r6, #33]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldr.w r5, [r6, #257]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldr.w pc, [r7, #257]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldr.w r4, [pc, #-0]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldr.w r2, [pc, #-40]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldr.w r1, [pc, #1024]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldr.w r1, [r8, r1]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldr.w r4, [r5, r2]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldr.w r6, [r0, r2, lsl #3]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldr.w r8, [r8, r2, lsl #2]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldr.w r7, [sp, r2, lsl #1]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldr.w r7, [sp, r2]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldr pc, [sp], #12
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldr r2, [r4, #255]!
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldr r8, [sp, #4]!
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldr lr, [sp, #-4]!
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldr lr, [sp, #0]!
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldr r2, [r4], #255
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldr r8, [sp], #4
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldr lr, [sp], #-4
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrb  r5, [r5, #-4]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrb.w  r5, [r6, #32]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrb.w  r5, [r6, #33]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrb.w  r5, [r6, #257]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrb.w  lr, [r7, #257]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrb.w  r1, [r8, r1]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrb.w  r4, [r5, r2]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrb.w  r6, [r0, r2, lsl #3]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrb.w  r8, [r8, r2, lsl #2]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrb.w  r7, [sp, r2, lsl #1]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrb.w  r7, [sp, r2]
+# CHECK-NEXT:  -     0.50   0.50   1.00    -      -      -      -     ldrb  r5, [r8, #255]!
+# CHECK-NEXT:  -     0.50   0.50   1.00    -      -      -      -     ldrb  r2, [r5, #4]!
+# CHECK-NEXT:  -     0.50   0.50   1.00    -      -      -      -     ldrb  r1, [r4, #-4]!
+# CHECK-NEXT:  -     0.50   0.50   1.00    -      -      -      -     ldrb  r1, [r4, #0]!
+# CHECK-NEXT:  -     0.50   0.50   1.00    -      -      -      -     ldrb  lr, [r3], #255
+# CHECK-NEXT:  -     0.50   0.50   1.00    -      -      -      -     ldrb  r9, [r2], #4
+# CHECK-NEXT:  -     0.50   0.50   1.00    -      -      -      -     ldrb  r3, [sp], #-4
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrb.w  r6, [pc, #-0]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrb.w  r10, [pc, #227]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrb.w  r5, [pc]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrbt r1, [r2]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrbt r1, [r8]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrbt r1, [r8, #3]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrbt r1, [r8, #255]
+# CHECK-NEXT:  -      -      -     2.00    -      -      -      -     ldrd  r3, r5, [r6, #24]
+# CHECK-NEXT:  -     1.00   1.00   2.00    -      -      -      -     ldrd  r3, r5, [r6, #24]!
+# CHECK-NEXT:  -     1.00   1.00   2.00    -      -      -      -     ldrd  r3, r5, [r6], #4
+# CHECK-NEXT:  -     1.00   1.00   2.00    -      -      -      -     ldrd  r3, r5, [r6], #-8
+# CHECK-NEXT:  -      -      -     2.00    -      -      -      -     ldrd  r3, r5, [r6]
+# CHECK-NEXT:  -      -      -     2.00    -      -      -      -     ldrd  r8, r1, [r3]
+# CHECK-NEXT:  -     1.00   1.00   2.00    -      -      -      -     ldrd  r0, r1, [r2], #-0
+# CHECK-NEXT:  -     1.00   1.00   2.00    -      -      -      -     ldrd  r0, r1, [r2, #-0]!
+# CHECK-NEXT:  -     1.00   1.00   2.00    -      -      -      -     ldrd  r0, r1, [r2, #0]!
+# CHECK-NEXT:  -      -      -     2.00    -      -      -      -     ldrd  r0, r1, [r2, #-0]
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     ldrex r1, [r4]
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     ldrex r8, [r4]
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     ldrex r2, [sp, #128]
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     ldrexb  r5, [r7]
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     ldrexh  r9, [r12]
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     ldrexd  r9, r3, [r4]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrh  r5, [r5, #-4]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrh  r5, [r6, #32]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrh.w  r5, [r6, #33]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrh.w  r5, [r6, #257]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrh.w  lr, [r7, #257]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrh.w  r1, [r8, r1]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrh.w  r4, [r5, r2]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrh.w  r6, [r0, r2, lsl #3]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrh.w  r8, [r8, r2, lsl #2]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrh.w  r7, [sp, r2, lsl #1]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrh.w  r7, [sp, r2]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrh  r5, [r8, #255]!
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrh  r2, [r5, #4]!
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrh  r1, [r4, #-4]!
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrh  r1, [r4, #0]!
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrh  lr, [r3], #255
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrh  r9, [r2], #4
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrh  r3, [sp], #-4
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrh.w  r7, [pc, #-0]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrh.w  r5, [pc, #121]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrh.w  r4, [pc]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsb r5, [r5, #-4]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsb.w r5, [r6, #32]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsb.w r5, [r6, #33]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsb.w r5, [r6, #257]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsb.w lr, [r7, #257]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsb.w r1, [r8, r1]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsb.w r4, [r5, r2]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsb.w r6, [r0, r2, lsl #3]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsb.w r8, [r8, r2, lsl #2]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsb.w r7, [sp, r2, lsl #1]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsb.w r7, [sp, r2]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsb r5, [r8, #255]!
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsb r2, [r5, #4]!
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsb r1, [r4, #-4]!
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsb r1, [r4, #0]!
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsb lr, [r3], #255
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsb r9, [r2], #4
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsb r3, [sp], #-4
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsb.w r0, [pc, #-0]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsb.w r12, [pc, #80]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsb.w r3, [pc]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsbt  r1, [r2]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsbt  r1, [r8]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsbt  r1, [r8, #3]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsbt  r1, [r8, #255]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsh r5, [r5, #-4]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsh.w r5, [r6, #32]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsh.w r5, [r6, #33]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsh.w r5, [r6, #257]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsh.w lr, [r7, #257]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsh r10, [r5, #-0]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsh.w r1, [r8, r1]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsh.w r4, [r5, r2]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsh.w r6, [r0, r2, lsl #3]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsh.w r8, [r8, r2, lsl #2]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsh.w r7, [sp, r2, lsl #1]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsh.w r7, [sp, r2]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsh r5, [r8, #255]!
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsh r2, [r5, #4]!
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsh r1, [r4, #-4]!
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsh r1, [r4, #0]!
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsh lr, [r3], #255
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsh r9, [r2], #4
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsh r3, [sp], #-4
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsh.w r0, [pc, #-0]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsh.w r10, [pc, #-231]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsh.w r6, [pc]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsht  r1, [r2]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsht  r1, [r8]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsht  r1, [r8, #3]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsht  r1, [r8, #255]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrt  r1, [r2]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrt  r2, [r6]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrt  r3, [r7, #3]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrt  r4, [r9, #255]
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     lsl.w r2, r3, #12
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     lsls.w  r8, r3, #31
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     lsls.w  r2, r3, #1
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     lsl.w r2, r3, #4
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     lsls.w  r2, r12, #15
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     lsl.w r3, r3, #19
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     lsls.w  r8, r8, #2
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     lsls.w  r7, r7, #5
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     lsl.w r12, r12, #21
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     lsl.w r3, r4, r2
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     lsl.w r1, r1, r2
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     lsls.w  r3, r4, r8
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     lsr.w r2, r3, #12
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     lsrs.w  r8, r3, #32
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     lsrs.w  r2, r3, #1
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     lsr.w r2, r3, #4
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     lsrs.w  r2, r12, #15
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     lsr.w r3, r3, #19
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     lsrs.w  r8, r8, #2
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     lsrs.w  r7, r7, #5
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     lsr.w r12, r12, #21
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     lsr.w r3, r4, r2
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     lsr.w r1, r1, r2
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     lsrs.w  r3, r4, r8
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     str r1, [sp, #952]
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     movs  r1, #87
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     str r1, [sp, #1016]
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     add r7, r10
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsb r1, [r6, r7]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     ldrsb r1, [r6, r7]
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     mla r1, r2, r3, r4
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     mls r1, r2, r3, r4
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     movs  r1, #21
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     movs.w  r1, #21
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     movs.w  r8, #21
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     movw  r0, #65535
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     movw  r1, #43777
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     movw  r1, #43792
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     mov.w r0, #66846720
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     mov.w r0, #66846720
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     movs.w  r0, #66846720
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     movt  r3, #7
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     movt  r6, #65535
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  eq
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     movteq  r4, #4080
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     mrc p14, #0, r1, c1, c2, #4
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     str r2, [sp, #1016]
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     strb  r6, [r3, r0]
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     asrs  r4, r5, #7
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     strb  r7, [r2, r1]
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     asrs  r4, r7, #7
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     mrs r8, apsr
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     mrs r8, spsr
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     msr APSR_nzcvq, r1
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     msr APSR_g, r2
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     msr APSR_nzcvq, r3
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     msr APSR_nzcvq, r4
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     msr APSR_nzcvqg, r5
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     msr CPSR_fc, r6
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     msr CPSR_c, r7
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     msr CPSR_x, r8
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     msr CPSR_fc, r9
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     msr CPSR_fc, r11
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     msr CPSR_fsx, r12
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     msr SPSR_fc, r0
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     msr SPSR_fsxc, r5
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     msr CPSR_fsxc, r8
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     muls  r3, r4, r3
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     mul r3, r4, r3
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     mul r3, r4, r6
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  eq
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     muleq r3, r4, r5
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     mvns  r8, #21
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     mvn r0, #66846720
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     mvns  r0, #66846720
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     itte  eq
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     mvnseq  r1, #12
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     mvneq r1, #12
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     mvnne r1, #12
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     mvn.w r2, r3
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     mvns  r2, r3
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     mvn.w r5, r6, lsl #19
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     mvn.w r5, r6, lsr #9
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     mvn.w r5, r6, asr #4
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     mvn.w r5, r6, ror #6
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     mvn.w r5, r6, rrx
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  eq
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     mvneq r2, r3
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     nop.w
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     orn r4, r5, #61440
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     orn r4, r5, r6
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     orns  r4, r5, r6
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     orn r4, r5, r6, lsl #5
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     orns  r4, r5, r6, lsr #5
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     orn r4, r5, r6, lsr #5
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     orns  r4, r5, r6, asr #5
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     orn r4, r5, r6, ror #5
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     orr r4, r5, #61440
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     orr.w r4, r5, r6
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     orr.w r4, r5, r6, lsl #5
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     orrs.w  r4, r5, r6, lsr #5
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     orr.w r4, r5, r6, lsr #5
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     orrs.w  r4, r5, r6, asr #5
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     orr.w r4, r5, r6, ror #5
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     pkhbt r2, r2, r3
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     pkhbt r2, r2, r3, lsl #31
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     pkhbt r2, r2, r3, lsl #15
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     pkhtb r2, r2, r3, asr #31
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     pkhtb r2, r2, r3, asr #15
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pld [r5, #-4]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pld [r6, #32]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pld [r6, #33]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pld [r6, #257]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pld [r7, #257]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pld [r8, r1]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pld [r5, r2]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pld [r0, r2, lsl #3]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pld [r8, r2, lsl #2]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pld [sp, r2, lsl #1]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pld [sp, r2]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pld [pc, #-0]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pld [pc, #455]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pld [pc]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pli [r5, #-4]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pli [r6, #32]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pli [r6, #33]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pli [r6, #257]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pli [r7, #257]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pli [r8, r1]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pli [r5, r2]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pli [r0, r2, lsl #3]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pli [r8, r2, lsl #2]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pli [sp, r2, lsl #1]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pli [sp, r2]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pli [pc, #-0]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pli [pc, #-328]
+# CHECK-NEXT:  -      -      -     1.00    -      -      -      -     pli [pc]
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     qadd  r1, r2, r3
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     qadd16  r1, r2, r3
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     qadd8 r1, r2, r3
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     itte  gt
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     qaddgt  r1, r2, r3
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     qadd16gt  r1, r2, r3
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     qadd8le r1, r2, r3
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     qdadd r6, r7, r8
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     qdsub r6, r7, r8
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     itt hi
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     qdaddhi r6, r7, r8
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     qdsubhi r6, r7, r8
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     qsax  r9, r12, r0
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  eq
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     qsaxeq  r9, r12, r0
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     qsub  r1, r2, r3
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     qsub16  r1, r2, r3
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     qsub8 r1, r2, r3
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     itet  le
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     qsuble  r1, r2, r3
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     qsub16gt  r1, r2, r3
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     qsub8le r1, r2, r3
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     rbit  r1, r2
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  ne
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     rbitne  r1, r2
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     rev.w r1, r2
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     rev.w r2, r8
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     itt ne
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     revne r1, r2
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     revne.w r1, r8
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     rev16.w r1, r2
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     rev16.w r2, r8
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     itt ne
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     rev16ne r1, r2
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     rev16ne.w r1, r8
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     revsh.w r1, r2
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     revsh.w r2, r8
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     itt ne
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     revshne r1, r2
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     revshne.w r1, r8
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     ror.w r2, r3, #12
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     rors.w  r8, r3, #31
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     rors.w  r2, r3, #1
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     ror.w r2, r3, #4
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     rors.w  r2, r12, #15
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     ror.w r3, r3, #19
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     rors.w  r8, r8, #2
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     rors.w  r7, r7, #5
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     ror.w r12, r12, #21
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     ror.w r3, r4, r2
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     ror.w r1, r1, r2
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     rors.w  r3, r4, r8
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     rrx r1, r2
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     rrxs  r1, r2
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     ite lt
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     rrxlt r9, r12
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     rrxsge  r8, r3
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     rsb.w r2, r5, #1044480
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     rsbs.w  r3, r12, #15
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     rsb.w r1, r1, #255
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     rsb r4, r4, r8
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     rsb r4, r9, r8
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     rsb r1, r4, r8, asr #3
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     rsbs  r2, r1, r7, lsl #1
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     sadd16  r3, r4, r8
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  ne
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     sadd16ne  r3, r4, r8
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     sadd8 r3, r4, r8
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  ne
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     sadd8ne r3, r4, r8
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     sasx  r9, r2, r7
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  ne
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     sasxne  r2, r5, r6
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sbc r0, r1, #4
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sbcs  r0, r1, #0
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sbc r1, r2, #255
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sbc r3, r7, #5570645
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sbc r8, r12, #2852170240
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sbc r9, r7, #2779096485
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sbc r5, r3, #2264924160
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sbc r4, r2, #2139095040
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sbc r4, r2, #1664
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sbc.w r4, r5, r6
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sbcs.w  r4, r5, r6
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sbc.w r9, r1, r3
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sbcs.w  r9, r1, r3
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     sbc.w r0, r1, r3, ror #4
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     sbcs.w  r0, r1, r3, lsl #7
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     sbc.w r0, r1, r3, lsr #31
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     sbcs.w  r0, r1, r3, asr #32
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sbfx  r4, r5, #16, #1
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  gt
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sbfxgt  r4, r5, #16, #16
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sel r5, r9, r2
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  le
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     selle r5, r9, r2
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     sev.w
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  eq
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     seveq.w
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     sadd16  r1, r2, r3
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     sadd8 r1, r2, r3
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     ite gt
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     sadd16gt  r1, r2, r3
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     sadd8le r1, r2, r3
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     shasx r4, r8, r2
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  gt
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     shasxgt r4, r8, r2
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     shsax r4, r8, r2
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  gt
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     shsaxgt r4, r8, r2
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     shsub16 r4, r8, r2
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     shsub8  r4, r8, r2
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     itt gt
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     shsub16gt r4, r8, r2
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     shsub8gt  r4, r8, r2
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     smlabb  r3, r1, r9, r0
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     smlabt  r5, r6, r4, r1
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     smlatb  r4, r2, r3, r2
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     smlatt  r8, r3, r8, r4
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     itete gt
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     smlabbgt  r3, r1, r9, r0
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     smlabtle  r5, r6, r4, r1
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     smlatbgt  r4, r2, r3, r2
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     smlattle  r8, r3, r8, r4
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     smlad r2, r3, r5, r8
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     smladx  r2, r3, r5, r8
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     itt hi
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     smladhi r2, r3, r5, r8
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     smladxhi  r2, r3, r5, r8
+# CHECK-NEXT:  -      -      -      -     2.00    -      -      -     smlal r2, r3, r5, r8
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  eq
+# CHECK-NEXT:  -      -      -      -     2.00    -      -      -     smlaleq r2, r3, r5, r8
+# CHECK-NEXT:  -      -      -      -     2.00    -      -      -     smlalbb r3, r1, r9, r0
+# CHECK-NEXT:  -      -      -      -     2.00    -      -      -     smlalbt r5, r6, r4, r1
+# CHECK-NEXT:  -      -      -      -     2.00    -      -      -     smlaltb r4, r2, r3, r2
+# CHECK-NEXT:  -      -      -      -     2.00    -      -      -     smlaltt r8, r3, r8, r4
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     iteet ge
+# CHECK-NEXT:  -      -      -      -     2.00    -      -      -     smlalbbge r3, r1, r9, r0
+# CHECK-NEXT:  -      -      -      -     2.00    -      -      -     smlalbtlt r5, r6, r4, r1
+# CHECK-NEXT:  -      -      -      -     2.00    -      -      -     smlaltblt r4, r2, r3, r2
+# CHECK-NEXT:  -      -      -      -     2.00    -      -      -     smlalttge r8, r3, r8, r4
+# CHECK-NEXT:  -      -      -      -     2.00    -      -      -     smlald  r2, r3, r5, r8
+# CHECK-NEXT:  -      -      -      -     2.00    -      -      -     smlaldx r2, r3, r5, r8
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     ite eq
+# CHECK-NEXT:  -      -      -      -     2.00    -      -      -     smlaldeq  r2, r3, r5, r8
+# CHECK-NEXT:  -      -      -      -     2.00    -      -      -     smlaldxne r2, r3, r5, r8
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     smlawb  r2, r3, r10, r8
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     smlawt  r8, r3, r5, r9
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     ite eq
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     smlawbeq  r2, r7, r5, r8
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     smlawtne  r1, r3, r0, r8
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     smlsd r2, r3, r5, r8
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     smlsdx  r2, r3, r5, r8
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     ite le
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     smlsdle r2, r3, r5, r8
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     smlsdxgt  r2, r3, r5, r8
+# CHECK-NEXT:  -      -      -      -     2.00    -      -      -     smlsld  r2, r9, r5, r1
+# CHECK-NEXT:  -      -      -      -     2.00    -      -      -     smlsldx r4, r11, r2, r8
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     ite ge
+# CHECK-NEXT:  -      -      -      -     2.00    -      -      -     smlsldge  r8, r2, r5, r6
+# CHECK-NEXT:  -      -      -      -     2.00    -      -      -     smlsldxlt r1, r0, r3, r8
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     smmla r1, r2, r3, r4
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     smmlar  r4, r3, r2, r1
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     ite lo
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     smmlalo r1, r2, r3, r4
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     smmlarhs  r4, r3, r2, r1
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     smmls r1, r2, r3, r4
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     smmlsr  r4, r3, r2, r1
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     ite lo
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     smmlslo r1, r2, r3, r4
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     smmlsrhs  r4, r3, r2, r1
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     ssat  r9, #30, r0, asr #2
+# CHECK-NEXT:  -     0.50   0.50    -      -     1.00    -      -     str r10, [r11], #0
+# CHECK-NEXT:  -     0.50   0.50    -      -     1.00    -      -     strd  r1, r1, [r0], #0
+# CHECK-NEXT:  -     0.50   0.50    -      -     1.00    -      -     strd  r6, r3, [r5], #-8
+# CHECK-NEXT:  -     0.50   0.50    -      -     1.00    -      -     strd  r7, r4, [r5], #-4
+# CHECK-NEXT:  -     0.50   0.50    -      -     1.00    -      -     strd  r0, r1, [r2, #-0]!
+# CHECK-NEXT:  -     0.50   0.50    -      -     1.00    -      -     strd  r0, r1, [r2, #0]!
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     strd  r0, r1, [r2, #-0]
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     strex r1, r8, [r4]
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     strex r8, r2, [r4]
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     strex r2, r12, [sp, #128]
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     strexb  r5, r1, [r7]
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     strexh  r9, r7, [r12]
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     strexd  r9, r3, r6, [r4]
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     strh  r5, [r5, #-4]
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     strh  r5, [r6, #32]
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     strh.w  r5, [r6, #33]
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     strh.w  r5, [r6, #257]
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     strh.w  lr, [r7, #257]
+# CHECK-NEXT:  -     0.50   0.50    -      -     1.00    -      -     strh  r5, [r8, #255]!
+# CHECK-NEXT:  -     0.50   0.50    -      -     1.00    -      -     strh  r2, [r5, #4]!
+# CHECK-NEXT:  -     0.50   0.50    -      -     1.00    -      -     strh  r1, [r4, #-4]!
+# CHECK-NEXT:  -     0.50   0.50    -      -     1.00    -      -     strh  r1, [r4, #0]!
+# CHECK-NEXT:  -     0.50   0.50    -      -     1.00    -      -     strh  lr, [r3], #255
+# CHECK-NEXT:  -     0.50   0.50    -      -     1.00    -      -     strh  r9, [r2], #4
+# CHECK-NEXT:  -     0.50   0.50    -      -     1.00    -      -     strh  r3, [sp], #-4
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     strh.w  r1, [r8, r1]
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     strh.w  r4, [r5, r2]
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     strh.w  r6, [r0, r2, lsl #3]
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     strh.w  r8, [r8, r2, lsl #2]
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     strh.w  r7, [sp, r2, lsl #1]
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     strh.w  r7, [sp, r2]
+# CHECK-NEXT:  -     0.50   0.50    -      -     1.00    -      -     strht r1, [r2]
+# CHECK-NEXT:  -     0.50   0.50    -      -     1.00    -      -     strht r1, [r8]
+# CHECK-NEXT:  -     0.50   0.50    -      -     1.00    -      -     strht r1, [r8, #3]
+# CHECK-NEXT:  -     0.50   0.50    -      -     1.00    -      -     strht r1, [r8, #255]
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     strt  r1, [r2]
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     strt  r1, [r8]
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     strt  r1, [r8, #3]
+# CHECK-NEXT:  -      -      -      -      -     1.00    -      -     strt  r1, [r8, #255]
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     itet  eq
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     subeq r1, r2, #4
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     subwne  r5, r3, #1023
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     subweq  r4, r5, #293
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sub.w r2, sp, #1024
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sub.w r2, r8, #65280
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     subw  r2, r3, #257
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sub.w r12, r6, #256
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     subw  r12, r6, #256
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     subs.w  r1, r2, #496
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     subs  pc, lr, #4
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sub.w r4, r5, r6
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     sub.w r4, r5, r6, lsl #5
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     sub.w r4, r5, r6, lsr #5
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     sub.w r4, r5, r6, lsr #5
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     sub.w r4, r5, r6, asr #5
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     sub.w r4, r5, r6, ror #5
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     sub.w r5, r2, r12, rrx
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     svc #0
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     ite eq
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     svceq #255
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     svcne #33
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     sxtab r2, r3, r4
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     sxtab r4, r5, r6
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  lt
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     sxtablt r6, r2, r9, ror #8
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     sxtab r5, r1, r4, ror #16
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     sxtab r7, r8, r3, ror #24
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     sxtab16 r6, r2, r7
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     sxtab16 r3, r5, r8, ror #8
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     sxtab16 r3, r2, r1, ror #16
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     ite ne
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     sxtab16ne r0, r1, r4
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     sxtab16eq r1, r2, r3, ror #24
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     sxtah r1, r3, r9
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     sxtah r3, r8, r3, ror #8
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     sxtah r9, r3, r3, ror #24
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     ite hi
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     sxtahhi r6, r1, r6
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     sxtahls r2, r2, r4, ror #16
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sxtb  r5, r6
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sxtb.w  r6, r9, ror #8
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sxtb.w  r8, r3, ror #24
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     ite ge
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sxtbge  r2, r4
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sxtblt.w  r5, r1, ror #16
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sxtb16  r1, r4
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sxtb16  r6, r7
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sxtb16  r3, r1, ror #16
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     ite hs
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sxtb16hs  r3, r5, ror #8
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sxtb16lo  r2, r3, ror #24
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sxth  r1, r6
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sxth.w  r3, r8, ror #8
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sxth.w  r9, r3, ror #24
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     itt ne
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sxthne.w  r3, r9
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sxthne.w  r2, r2, ror #16
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sxtb  r5, r6
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sxtb.w  r6, r9, ror #8
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sxtb.w  r8, r3, ror #24
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     ite ge
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sxtbge  r2, r4
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sxtblt.w  r5, r1, ror #16
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sxtb16  r1, r4
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sxtb16  r6, r7
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sxtb16  r3, r1, ror #16
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     ite hs
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sxtb16hs  r3, r5, ror #8
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sxtb16lo  r2, r3, ror #24
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sxth  r1, r6
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sxth.w  r3, r8, ror #8
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sxth.w  r9, r3, ror #24
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     itt ne
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sxthne.w  r3, r9
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     sxthne.w  r2, r2, ror #16
+# CHECK-NEXT: 1.00   0.50   0.50    -      -      -      -      -     tbb [r3, r8]
+# CHECK-NEXT: 1.00   0.50   0.50    -      -      -      -      -     tbh [r3, r8, lsl #1]
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  eq
+# CHECK-NEXT: 1.00   0.50   0.50    -      -      -      -      -     tbbeq [r3, r8]
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  hs
+# CHECK-NEXT: 1.00   0.50   0.50    -      -      -      -      -     tbhhs [r3, r8, lsl #1]
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     teq.w r5, #61440
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     teq.w r4, r5
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     teq.w r4, r5, lsl #5
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     teq.w r4, r5, lsr #5
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     teq.w r4, r5, lsr #5
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     teq.w r4, r5, asr #5
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     teq.w r4, r5, ror #5
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     tst.w r5, #61440
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     tst r2, r5
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     tst.w r3, r12, lsl #5
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     tst.w r4, r11, lsr #4
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     tst.w r5, r10, lsr #12
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     tst.w r6, r9, asr #30
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     tst.w r7, r8, ror #2
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     uadd16  r1, r2, r3
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     uadd8 r1, r2, r3
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     ite gt
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     uadd16gt  r1, r2, r3
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     uadd8le r1, r2, r3
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     uasx  r9, r12, r0
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  eq
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     uasxeq  r9, r12, r0
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     uasx  r9, r12, r0
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  eq
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     uasxeq  r9, r12, r0
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     ubfx  r4, r5, #16, #1
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  gt
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     ubfxgt  r4, r5, #16, #16
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uhadd16 r4, r8, r2
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uhadd8  r4, r8, r2
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     itt gt
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uhadd16gt r4, r8, r2
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uhadd8gt  r4, r8, r2
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     uhasx r4, r1, r5
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     uhsax r5, r6, r6
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     itt gt
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     uhasxgt r6, r9, r8
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     uhsaxgt r7, r8, r12
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uhsub16 r5, r8, r3
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uhsub8  r1, r7, r6
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     itt lt
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uhsub16lt r4, r9, r12
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uhsub8lt  r3, r1, r5
+# CHECK-NEXT:  -      -      -      -     2.00    -      -      -     umaal r3, r4, r5, r6
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  lt
+# CHECK-NEXT:  -      -      -      -     2.00    -      -      -     umaallt r3, r4, r5, r6
+# CHECK-NEXT:  -      -      -      -     2.00    -      -      -     umlal r2, r4, r6, r8
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  gt
+# CHECK-NEXT:  -      -      -      -     2.00    -      -      -     umlalgt r6, r1, r2, r6
+# CHECK-NEXT:  -      -      -      -     2.00    -      -      -     umull r2, r4, r6, r8
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  gt
+# CHECK-NEXT:  -      -      -      -     2.00    -      -      -     umullgt r6, r1, r2, r6
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uqadd16 r1, r2, r3
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uqadd8  r3, r4, r8
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     ite gt
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uqadd16gt r4, r7, r9
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uqadd8le  r8, r1, r2
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     uqasx r1, r2, r3
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     uqsax r3, r4, r8
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     ite gt
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     uqasxgt r4, r7, r9
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     uqsaxle r8, r1, r2
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uqsub8  r8, r2, r9
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uqsub16 r1, r9, r7
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     ite gt
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uqsub8gt  r3, r1, r6
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uqsub16le r4, r6, r4
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     usad8 r1, r9, r7
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     usada8  r8, r2, r9, r12
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     ite gt
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     usada8gt  r3, r1, r6, r9
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     usad8le r4, r6, r4
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     usat  r8, #1, r10
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     usat  r8, #4, r10
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     usat  r8, #5, r10, lsl #31
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     usat  r8, #16, r10, asr #1
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     usat16  r2, #2, r7
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     usat16  r3, #15, r5
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     usax  r2, r3, r4
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  ne
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     usaxne  r6, r1, r9
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     usax  r2, r3, r4
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  ne
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     usaxne  r6, r1, r9
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     usub16  r4, r2, r7
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     usub8 r1, r8, r5
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     ite hi
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     usub16hi  r1, r1, r3
+# CHECK-NEXT:  -     0.50   0.50    -     1.00    -      -      -     usub8ls r9, r2, r3
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uxtab r2, r3, r4
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uxtab r4, r5, r6
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  lt
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uxtablt r6, r2, r9, ror #8
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uxtab r5, r1, r4, ror #16
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uxtab r7, r8, r3, ror #24
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  ge
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uxtab16ge r0, r1, r4
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uxtab16 r6, r2, r7
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uxtab16 r3, r5, r8, ror #8
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uxtab16 r3, r2, r1, ror #16
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  eq
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uxtab16eq r1, r2, r3, ror #24
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uxtah r1, r3, r9
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  hi
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uxtahhi r6, r1, r6
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uxtah r3, r8, r3, ror #8
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  lo
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uxtahlo r2, r2, r4, ror #16
+# CHECK-NEXT:  -      -      -      -     1.00    -      -      -     uxtah r9, r3, r3, ror #24
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  ge
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     uxtbge  r2, r4
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     uxtb  r5, r6
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     uxtb.w  r6, r9, ror #8
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  lo
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     uxtblo.w  r5, r1, ror #16
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     uxtb.w  r8, r3, ror #24
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     uxtb16  r1, r4
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     uxtb16  r6, r7
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  hs
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     uxtb16hs  r3, r5, ror #8
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     uxtb16  r3, r1, ror #16
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  ge
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     uxtb16ge  r2, r3, ror #24
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  ne
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     uxthne.w  r3, r9
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     uxth  r1, r6
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     uxth.w  r3, r8, ror #8
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     it  le
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     uxthle.w  r2, r2, ror #16
+# CHECK-NEXT:  -     0.50   0.50    -      -      -      -      -     uxth.w  r9, r3, ror #24
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     wfe
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     wfi
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     yield
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     itet  lt
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     wfelt
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     wfige
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     yieldlt
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     hint  #6
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     hint.w  #6
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     hint.w  #102