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Differential D91561

[MachineScheduler] Inform pass infra of post-ra scheduler's dependencies
ClosedPublic

Authored by jroelofs on Nov 16 2020, 12:36 PM.

Details

Reviewers
dmgreen
hfinkel
Commits
rGa461e76b6f97: [MachineScheduler] Inform pass infra of post-ra scheduler's dependencies

Diff Detail

Event Timeline

jroelofs created this revision.Nov 16 2020, 12:36 PM
Herald added a project: Restricted Project. · View Herald TranscriptNov 16 2020, 12:36 PM
Herald added subscribers: llvm-commits, ecnelises, javed.absar and 2 others. · View Herald Transcript
jroelofs requested review of this revision.Nov 16 2020, 12:36 PM
jroelofs mentioned this in D69814: [Scheduling] Enable AA in PostRA Machine scheduler.
dmgreen accepted this revision.Nov 16 2020, 1:23 PM

Thanks, You even added MachineDominatorTree and MachineLoopInfo.

LGTM.

This revision is now accepted and ready to land.Nov 16 2020, 1:23 PM
Harbormaster completed remote builds in B78997: Diff 305578.Nov 16 2020, 1:26 PM
This revision was landed with ongoing or failed builds.Nov 17 2020, 10:56 AM
Closed by commit rGa461e76b6f97: [MachineScheduler] Inform pass infra of post-ra scheduler's dependencies (authored by jroelofs). · Explain Why
This revision was automatically updated to reflect the committed changes.
jroelofs added a commit: rGa461e76b6f97: [MachineScheduler] Inform pass infra of post-ra scheduler's dependencies.

Revision Contents

PathSize
llvm/
lib/
CodeGen/
9 lines

Diff 305855

llvm/lib/CodeGen/MachineScheduler.cpp

Show First 20 Lines • Show All 234 Lines • ▼ Show 20 Linesvoid MachineScheduler::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addPreserved<LiveIntervals>(); AU.addPreserved<LiveIntervals>();
MachineFunctionPass::getAnalysisUsage(AU); MachineFunctionPass::getAnalysisUsage(AU);
} }
char PostMachineScheduler::ID = 0; char PostMachineScheduler::ID = 0;
char &llvm::PostMachineSchedulerID = PostMachineScheduler::ID; char &llvm::PostMachineSchedulerID = PostMachineScheduler::ID;
INITIALIZE_PASS(PostMachineScheduler, "postmisched", INITIALIZE_PASS_BEGIN(PostMachineScheduler, "postmisched",
"PostRA Machine Instruction Scheduler", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
INITIALIZE_PASS_END(PostMachineScheduler, "postmisched",
"PostRA Machine Instruction Scheduler", false, false) "PostRA Machine Instruction Scheduler", false, false)
PostMachineScheduler::PostMachineScheduler() : MachineSchedulerBase(ID) { PostMachineScheduler::PostMachineScheduler() : MachineSchedulerBase(ID) {
initializePostMachineSchedulerPass(*PassRegistry::getPassRegistry()); initializePostMachineSchedulerPass(*PassRegistry::getPassRegistry());
} }
void PostMachineScheduler::getAnalysisUsage(AnalysisUsage &AU) const { void PostMachineScheduler::getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesCFG(); AU.setPreservesCFG();
AU.addRequired<MachineDominatorTree>(); AU.addRequired<MachineDominatorTree>();
▲ Show 20 Lines • Show All 3,648 Lines • Show Last 20 Lines