Add VAND/VOR/VXOE/VEQV/VLDZ/VPCNT/VBRV/VSEQ instrucitons and regression
tests.
Details
Details
- Reviewers
simoll k-ishizaka - Commits
- rG83cb423c6e19: [VE] Add vector logical instructions
Diff Detail
Diff Detail
- Repository
- rG LLVM Github Monorepo
Unit Tests
Unit Tests
Time | Test | |
---|---|---|
340 ms | linux > HWAddressSanitizer-x86_64.TestCases::sizes.cpp |