Fix build of MiBench on FreeBSD RISC-V

[arichardson]

Summary

It appears that unlike other architectures the RISC-V headers on FreeBSD
don't expose the required macros yet, so add another ifdef to check for
presence of FP_X_INV before using it.

[jrtc27]

Even if these were implemented on RISC-V they'd just be stubs anyway because there is no support for hardware FPU traps, you have to check fflags in software.

MultiSource/Benchmarks/MiBench/consumer-lame/lame.c

1207

[dim]

LGTM.

MultiSource/Benchmarks/MiBench/consumer-lame/lame.c

1205

While here you might fix this typo?

[arichardson]

address feedback

[arichardson]

Seems like the test-suite repository doesn't auto-close revisions.

Committed as https://github.com/llvm/llvm-test-suite/commit/271b87d2637e0b49b1f87a70be3473181c4cf3ac.

MultiSource/Benchmarks/MiBench/consumer-lame/lame.c

 #endif
 
 
 /* initialize mp3 encoder */
 void lame_init(lame_global_flags *gfp)
 {
 
   /*
-   *  Disable floating point exepctions
+   *  Disable floating point exceptions
    */
-#ifdef __FreeBSD__
+#if defined(__FreeBSD__) && defined(FP_X_INV) && defined(FP_X_DZ)
   {
   /* seet floating point mask to the Linux default */
   fp_except_t mask;
   mask=fpgetmask();
   /* if bit is set, we get SIGFPE on that error! */
   fpsetmask(mask & ~(FP_X_INV|FP_X_DZ));
   /*  fprintf(stderr,"FreeBSD mask is 0x%x\n",mask); */
   }