[GlobalISel][KnownBits] Early return on out of bound shift amounts

[kschwarz]

Summary

If the known shift amount is bigger than or equal to the bitwidth of the type of the value to be shifted,
the result is target dependent, so don't try to infer any bits.

This fixes a crash we've seen in one of our internal test suites.

[arsenm]

llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp

401

getScalarSizeInBits. This should also be >=

llvm/unittests/CodeGen/GlobalISel/KnownBitsTest.cpp

735

Also add and equal sized case

[kschwarz]

Address review comments

llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp

 //===- lib/CodeGen/GlobalISel/GISelKnownBits.cpp --------------*- C++ *-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
if (!RHSKnown.isConstant()) {
       LLVM_DEBUG(
           MachineInstr *RHSMI = MRI.getVRegDef(MI.getOperand(2).getReg());
           dbgs() << '[' << Depth << "] Shift not known constant: " << *RHSMI);
       break;
     }
     uint64_t Shift = RHSKnown.getConstant().getZExtValue();
     LLVM_DEBUG(dbgs() << '[' << Depth << "] Shift is " << Shift << '\n');
 
+    // Guard against oversized shift amounts
+    if (Shift >= MRI.getType(MI.getOperand(1).getReg()).getScalarSizeInBits())
+      break;
+
     computeKnownBitsImpl(MI.getOperand(1).getReg(), Known, DemandedElts,
                          Depth + 1);
 
     switch (Opcode) {
     case TargetOpcode::G_ASHR:
       Known.Zero = Known.Zero.ashr(Shift);
       Known.One = Known.One.ashr(Shift);
       break;

llvm/unittests/CodeGen/GlobalISel/KnownBitsTest.cpp

 //===- KnownBitsTest.cpp -------------------------------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
)";
   KnownBits KnownUmax = Info.getKnownBits(CopyUMax);
   EXPECT_EQ(64u, KnownUmax.getBitWidth());
   EXPECT_EQ(0xffu, KnownUmax.Zero.getZExtValue());
   EXPECT_EQ(0xffffffffffffff00, KnownUmax.One.getZExtValue());
 
   EXPECT_EQ(0xffu, KnownUmax.Zero.getZExtValue());
   EXPECT_EQ(0xffffffffffffff00, KnownUmax.One.getZExtValue());
 }
+
+TEST_F(AArch64GISelMITest, TestInvalidQueries) {
+  StringRef MIRString = R"(
+   %src:_(s32) = COPY $w0
+   %thirty2:_(s32) = G_CONSTANT i32 32
+   %equalSized:_(s32) = G_SHL %src, %thirty2
+   %copy1:_(s32) = COPY %equalSized
+   %thirty3:_(s32) = G_CONSTANT i32 33
+   %biggerSized:_(s32) = G_SHL %src, %thirty3
+   %copy2:_(s32) = COPY %biggerSized
+)";
+  setUp(MIRString);
+  if (!TM)
+    return;
+
+  Register EqSizedCopyReg = Copies[Copies.size() - 2];
+  MachineInstr *EqSizedCopy = MRI->getVRegDef(EqSizedCopyReg);
+  Register EqSizedShl = EqSizedCopy->getOperand(1).getReg();
+
+  Register BiggerSizedCopyReg = Copies[Copies.size() - 1];
+  MachineInstr *BiggerSizedCopy = MRI->getVRegDef(BiggerSizedCopyReg);
+  Register BiggerSizedShl = BiggerSizedCopy->getOperand(1).getReg();
+
+  GISelKnownBits Info(*MF);
+  KnownBits EqSizeRes = Info.getKnownBits(EqSizedShl);
+  KnownBits BiggerSizeRes = Info.getKnownBits(BiggerSizedShl);
+
+
+  // We don't know what the result of the shift is, but we should not crash
+  EXPECT_TRUE(EqSizeRes.One.isNullValue());
+  EXPECT_TRUE(EqSizeRes.Zero.isNullValue());
+
+  EXPECT_TRUE(BiggerSizeRes.One.isNullValue());
+  EXPECT_TRUE(BiggerSizeRes.Zero.isNullValue());
+}