[Hexagon] Use InstSimplify instead of ConstantProp

[aeubanks]

Summary

This is the last remaining use of ConstantProp, migrate it to InstSimplify in the goal of removing ConstantProp.

[aeubanks]

InstSimplify instead of InstCombine

[aeubanks]

There are 10 failures under llvm/test/CodeGen/Hexagon, and I don't have enough domain knowledge to fix them, was wondering if this even made sense at all.

[kparzysz]

These failures seem to be caused by optimizing the code "too much", and simply removing the parts that the tests were looking for.

Could you add a debug flag in HexagonTargetMachine.cpp, and add the simplification pass conditionally, similarly to how line 322 does it? The pass would be added by default, but these failing tests could exclude it (see the -hexagon-initial-cfg-cleanup=0 in some of the failing tests, that's the exact same problem caused by some other change in optimization passes).

[aeubanks]

Add -hexagon-instsimplify option, add -hexagon-instsimplify=0 to some tests

[aeubanks]

In D85047#2189085, @kparzysz wrote:

These failures seem to be caused by optimizing the code "too much", and simply removing the parts that the tests were looking for.

Could you add a debug flag in HexagonTargetMachine.cpp, and add the simplification pass conditionally, similarly to how line 322 does it? The pass would be added by default, but these failing tests could exclude it (see the -hexagon-initial-cfg-cleanup=0 in some of the failing tests, that's the exact same problem caused by some other change in optimization passes).

Ah I see, thanks! Done.

llvm/include/llvm/Transforms/Scalar.h

 Pass *createLoopSimplifyCFGPass();
 
 //===----------------------------------------------------------------------===//
 //
 // WarnMissedTransformations - This pass emits warnings for leftover forced
 // transformations.
 //
 Pass *createWarnMissedTransformationsPass();
+
+//===----------------------------------------------------------------------===//
+//
+// This pass does instruction simplification on each
+// instruction in a function.
+//
+FunctionPass *createInstSimplifyLegacyPass();
 } // End llvm namespace
 
 #endif

llvm/include/llvm/Transforms/Scalar/InstSimplifyPass.h

 /// restricted transform at a pass granularity. However, for a much more
 /// powerful and comprehensive peephole optimization engine, see the
 /// `instcombine` pass instead.
 class InstSimplifyPass : public PassInfoMixin<InstSimplifyPass> {
 public:
   PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
 };
 
-/// Create a legacy pass that does instruction simplification on each
-/// instruction in a function.
-FunctionPass *createInstSimplifyLegacyPass();
-
 } // end namespace llvm
 
 #endif // LLVM_TRANSFORMS_UTILS_INSTSIMPLIFYPASS_H

llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp

 
 static cl::opt<bool> EnableVExtractOpt("hexagon-opt-vextract", cl::Hidden,
   cl::ZeroOrMore, cl::init(true), cl::desc("Enable vextract optimization"));
 
 static cl::opt<bool> EnableInitialCFGCleanup("hexagon-initial-cfg-cleanup",
   cl::Hidden, cl::ZeroOrMore, cl::init(true),
   cl::desc("Simplify the CFG after atomic expansion pass"));
 
+static cl::opt<bool> EnableInstSimplify("hexagon-instsimplify", cl::Hidden,
+                                        cl::ZeroOrMore, cl::init(true),
+                                        cl::desc("Enable instsimplify"));
+
 /// HexagonTargetMachineModule - Note that this is used on hosts that
 /// cannot link in a library unless there are references into the
 /// library.  In particular, it seems that it is not possible to get
 /// things to work on Win32 without this.  Though it is unused, do not
 /// remove it.
 extern "C" int HexagonTargetMachineModule;
 int HexagonTargetMachineModule = 0;
 
TargetPassConfig *HexagonTargetMachine::createPassConfig(PassManagerBase &PM) {
   return new HexagonPassConfig(*this, PM);
 }
 
 void HexagonPassConfig::addIRPasses() {
   TargetPassConfig::addIRPasses();
   bool NoOpt = (getOptLevel() == CodeGenOpt::None);
 
   if (!NoOpt) {
-    addPass(createConstantPropagationPass());
+    if (EnableInstSimplify)
+      addPass(createInstSimplifyLegacyPass());
     addPass(createDeadCodeEliminationPass());
   }
 
   addPass(createAtomicExpandPass());
 
   if (!NoOpt) {
     if (EnableInitialCFGCleanup)
       addPass(createCFGSimplificationPass(SimplifyCFGOptions()

llvm/lib/Transforms/Scalar/InstSimplifyPass.cpp

 #include "llvm/Analysis/OptimizationRemarkEmitter.h"
 #include "llvm/Analysis/TargetLibraryInfo.h"
 #include "llvm/IR/DataLayout.h"
 #include "llvm/IR/Dominators.h"
 #include "llvm/IR/Function.h"
 #include "llvm/IR/Type.h"
 #include "llvm/InitializePasses.h"
 #include "llvm/Pass.h"
+#include "llvm/Transforms/Scalar.h"
 #include "llvm/Transforms/Utils.h"
 #include "llvm/Transforms/Utils/Local.h"
 using namespace llvm;
 
 #define DEBUG_TYPE "instsimplify"
 
 STATISTIC(NumSimplified, "Number of redundant instructions removed");
 

llvm/test/CodeGen/Hexagon/autohvx/isel-qfalse.ll

-; RUN: llc -march=hexagon -hexagon-initial-cfg-cleanup=0 < %s | FileCheck %s
+; RUN: llc -march=hexagon -hexagon-initial-cfg-cleanup=0 -hexagon-instsimplify=0 < %s | FileCheck %s
   
 ; Make sure we can select QFALSE.
 ; CHECK: vcmp.gt(v0.w,v0.w)
 
 target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
 target triple = "hexagon"
 
 ; Function Attrs: nounwind

llvm/test/CodeGen/Hexagon/autohvx/isel-setcc-pair.ll

-; RUN: llc -march=hexagon -hexagon-initial-cfg-cleanup=0 < %s | FileCheck %s
+; RUN: llc -march=hexagon -hexagon-initial-cfg-cleanup=0 -hexagon-instsimplify=0 < %s | FileCheck %s
 
 ; Check that a setcc of a vector pair is handled (without crashing).
 ; CHECK: vcmp
 
 target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
 target triple = "hexagon"
 
 ; Function Attrs: nounwind

llvm/test/CodeGen/Hexagon/bit-bitsplit-regclass.ll

-; RUN: llc -march=hexagon -hexagon-initial-cfg-cleanup=0 < %s | FileCheck %s
+; RUN: llc -march=hexagon -hexagon-initial-cfg-cleanup=0 -hexagon-instsimplify=0 < %s | FileCheck %s
 
 ; Check for successful compilation.
 ; CHECK: r{{[0-9]+}} = insert(r{{[0-9]+}},#1,#31)
 
 ; This cannot be a .mir test, because the failure depends on ordering of
 ; virtual registers, and the .mir loader renumbers them in a way that hides
 ; the problem.
 

llvm/test/CodeGen/Hexagon/hvx-bitcast-v64i1.ll

-; RUN: llc -march=hexagon  < %s | FileCheck %s
+; RUN: llc -march=hexagon -hexagon-instsimplify=0  < %s | FileCheck %s
 
 ; Test that LLVM does not assert and bitcast v64i1 to i64 is lowered
 ; without crashing.
 ; CHECK: valign
 
 target triple = "hexagon"
 
 define dso_local void @f0() local_unnamed_addr #0 {

llvm/test/CodeGen/Hexagon/isel-simplify-crash.ll

-; RUN: llc -march=hexagon < %s | FileCheck %s
+; RUN: llc -march=hexagon -hexagon-instsimplify=0 < %s | FileCheck %s
 
 ; This used to crash in SimplifyDemandedBits due to a type mismatch
 ; caused by a missing bitcast in vectorizing mul.
 ; CHECK: vmpy
 
 target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
 target triple = "hexagon"
 

llvm/test/CodeGen/Hexagon/loop_correctness.ll

-; RUN: llc -march=hexagon -O3 < %s | FileCheck %s
+; RUN: llc -march=hexagon -O3 -hexagon-instsimplify=0 < %s | FileCheck %s
 
 ; CHECK-LABEL: f0:
 ; CHECK: loop0(.LBB{{[0-9]+}}_{{[0-9]+}},#3)
 ; CHECK: endloop0
 define void @f0(i8* nocapture %a0, i32 %a1, i32 %a2) #0 {
 b0:
   br label %b1
 

llvm/test/CodeGen/Hexagon/newvaluejump-kill.ll

-; RUN: llc -march=hexagon -O3 -verify-machineinstrs -hexagon-initial-cfg-cleanup=0 < %s | FileCheck %s
+; RUN: llc -march=hexagon -O3 -verify-machineinstrs -hexagon-initial-cfg-cleanup=0 -hexagon-instsimplify=0 < %s | FileCheck %s
 ;
 ; Check that this testcase compiles successfully and that a new-value jump
 ; has been created.
 ; CHECK: if (cmp.gtu(r{{[0-9]+}}.new,r{{[0-9]+}})) jump
 
 target triple = "hexagon"
 
 @g0 = external hidden unnamed_addr global [182 x i16], align 8

llvm/test/CodeGen/Hexagon/packetize-impdef-1.ll

-; RUN: llc -march=hexagon -hexagon-initial-cfg-cleanup=0 < %s | FileCheck %s
+; RUN: llc -march=hexagon -hexagon-initial-cfg-cleanup=0 -hexagon-instsimplify=0 < %s | FileCheck %s
 ; REQUIRES: asserts
 
 ; Test that the compiler doesn't assert because IMPLICIT_DEF instructions are
 ; are added to the same packet as a use. This test case asserts if the
 ; IMPLICIT_DEFs are not handled properly.
 ;
 ; r0 = IMPLICIT_DEF
 ; r1 = IMPLICIT_DEF

llvm/test/CodeGen/Hexagon/store-vector-pred.ll

-; RUN: llc -march=hexagon < %s | FileCheck %s
+; RUN: llc -march=hexagon -hexagon-instsimplify=0 < %s | FileCheck %s
 
 ; This test checks that store a vector predicate of type v128i1 is lowered
 ; without crashing.
 ; CHECK: valign
 
 target triple = "hexagon"
 
 define dso_local void @f0() local_unnamed_addr #0 {

llvm/test/CodeGen/Hexagon/vect/zext-v4i1.ll

-; RUN: llc -march=hexagon < %s | FileCheck %s
+; RUN: llc -march=hexagon -hexagon-instsimplify=0 < %s | FileCheck %s
 
 ; Check that this compiles successfully.
 ; CHECK: vcmph.eq
 
 target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
 target triple = "hexagon"
 
 define i32 @fred(<8 x i16>* %a0) #0 {