[ValueTracking] Add basic computeKnownBits support for llvm.abs intrinsic

[craig.topper]

Summary

This includes basic support for computeKnownBits on abs. I've left FIXMEs for more complicated things we could do.

[spatel]

LGTM

[spatel]

The SelectionDAG version does the following, so it would make sense to adapt these here:

// If the source's MSB is zero then we know the rest of the bits already.
if (Known2.isNonNegative()) {
  Known.Zero = Known2.Zero;
  Known.One = Known2.One;
  break;
}

// We only know that the absolute values's MSB will be zero iff there is
// a set bit that isn't the sign bit (otherwise it could be INT_MIN).
Known2.One.clearSignBit();
if (Known2.One.getBoolValue()) {
  Known.Zero = APInt::getSignMask(BitWidth);
  break;
}

[craig.topper]

In D84963#2186141, @spatel wrote:

The SelectionDAG version does the following, so it would make sense to adapt these here:

// If the source's MSB is zero then we know the rest of the bits already.
if (Known2.isNonNegative()) {
  Known.Zero = Known2.Zero;
  Known.One = Known2.One;
  break;
}

// We only know that the absolute values's MSB will be zero iff there is
// a set bit that isn't the sign bit (otherwise it could be INT_MIN).
Known2.One.clearSignBit();
if (Known2.One.getBoolValue()) {
  Known.Zero = APInt::getSignMask(BitWidth);
  break;
}

I did think about doing the first change, but I wondered if we would likely end up just removing the ABS in instcombine in that case.

llvm/lib/Analysis/ValueTracking.cpp

case Instruction::Invoke:
     if (const Value *RV = cast<CallBase>(I)->getReturnedArgOperand()) {
       computeKnownBits(RV, Known2, Depth + 1, Q);
       Known.Zero |= Known2.Zero;
       Known.One |= Known2.One;
     }
     if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(I)) {
       switch (II->getIntrinsicID()) {
       default: break;
+      case Intrinsic::abs:
+        computeKnownBits(I->getOperand(0), Known2, Depth + 1, Q);
+        // Otherwise, if this call is undefined for INT_MIN, the result is
+        // positive.
+        if (match(II->getArgOperand(1), m_One()))
+          Known.Zero.setSignBit();
+        // Absolute value preserves trailing zero count.
+        Known.Zero.setLowBits(Known2.Zero.countTrailingOnes());
+        // FIXME: Handle known negative/non-negative input?
+        // FIXME: Calculate the negated Known bits and combine them?
+        break;
       case Intrinsic::bitreverse:
         computeKnownBits(I->getOperand(0), DemandedElts, Known2, Depth + 1, Q);
         Known.Zero |= Known2.Zero.reverseBits();
         Known.One |= Known2.One.reverseBits();
         break;
       case Intrinsic::bswap:
         computeKnownBits(I->getOperand(0), DemandedElts, Known2, Depth + 1, Q);
         Known.Zero |= Known2.Zero.byteSwap();

llvm/test/Transforms/InstCombine/abs-intrinsic.ll

+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+declare i32 @llvm.abs.i32(i32, i1)
+
+define i1 @abs_nsw_must_be_positive(i32 %x) {
+; CHECK-LABEL: @abs_nsw_must_be_positive(
+; CHECK-NEXT:    ret i1 true
+;
+  %abs = call i32 @llvm.abs.i32(i32 %x, i1 true)
+  %c2 = icmp sge i32 %abs, 0
+  ret i1 %c2
+}
+
+; Negative test, no nsw provides no information about the sign bit of the result.
+define i1 @abs_nonsw(i32 %x) {
+; CHECK-LABEL: @abs_nonsw(
+; CHECK-NEXT:    [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
+; CHECK-NEXT:    [[C2:%.*]] = icmp sgt i32 [[ABS]], -1
+; CHECK-NEXT:    ret i1 [[C2]]
+;
+  %abs = call i32 @llvm.abs.i32(i32 %x, i1 false)
+  %c2 = icmp sge i32 %abs, 0
+  ret i1 %c2
+}
+
+; abs preserves trailing zeros so the second and is unneeded
+define i32 @abs_trailing_zeros(i32 %x) {
+; CHECK-LABEL: @abs_trailing_zeros(
+; CHECK-NEXT:    [[AND:%.*]] = and i32 [[X:%.*]], -4
+; CHECK-NEXT:    [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[AND]], i1 false)
+; CHECK-NEXT:    ret i32 [[ABS]]
+;
+  %and = and i32 %x, -4
+  %abs = call i32 @llvm.abs.i32(i32 %and, i1 false)
+  %and2 = and i32 %abs, -2
+  ret i32 %and2
+}
+
+; negative test, can't remove the second and based on trailing zeroes.
+; FIXME: Could remove the first and using demanded bits.
+define i32 @abs_trailing_zeros_negative(i32 %x) {
+; CHECK-LABEL: @abs_trailing_zeros_negative(
+; CHECK-NEXT:    [[AND:%.*]] = and i32 [[X:%.*]], -2
+; CHECK-NEXT:    [[ABS:%.*]] = call i32 @llvm.abs.i32(i32 [[AND]], i1 false)
+; CHECK-NEXT:    [[AND2:%.*]] = and i32 [[ABS]], -4
+; CHECK-NEXT:    ret i32 [[AND2]]
+;
+  %and = and i32 %x, -2
+  %abs = call i32 @llvm.abs.i32(i32 %and, i1 false)
+  %and2 = and i32 %abs, -4
+  ret i32 %and2
+}