[X86] Teach the assembler parser to handle a '*' between segment register and base/index/displacement part of an address

[craig.topper]

Summary

A '*' after the segment is equivalent to a '*' before the segment register. To make the AsmMatcher table work we need to place the '*' token into the operand vector before the full memory operand. To accomplish this I've modified some portions of operand parsing to expose the operand vector to ParseATTOperand so that the token can be pushed to the vector after parsing the segment register and before creating the memory operand using that segment register.

Fixes PR46879

[MaskRay]

Thanks! I followed the control flow in the debugger. It looks good.
Do you have idea what we need to do with .arch? For the use of purgatory/arch/i386/entry32-16.S, maybe we can just ignore the directive for now?

llvm/test/MC/X86/x86-64.s

1904

This can be placed near line 400 where other ljmpl tests reside.

[MaskRay]

Ah, we have lib/Support/X86TargetParser.cpp, llvm::X86::parseArchX86. We can use it. I can put up a patch (at least for the easy part..)

llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp

private:
   bool IsSIReg(unsigned Reg);
   unsigned GetSIDIForRegClass(unsigned RegClassID, unsigned Reg, bool IsSIReg);
   void
   AddDefaultSrcDestOperands(OperandVector &Operands,
                             std::unique_ptr<llvm::MCParsedAsmOperand> &&Src,
                             std::unique_ptr<llvm::MCParsedAsmOperand> &&Dst);
   bool VerifyAndAdjustOperands(OperandVector &OrigOperands,
                                OperandVector &FinalOperands);
-  std::unique_ptr<X86Operand> ParseOperand();
-  std::unique_ptr<X86Operand> ParseATTOperand();
+  bool ParseOperand(OperandVector &Operands);
+  bool ParseATTOperand(OperandVector &Operands);
   std::unique_ptr<X86Operand> ParseIntelOperand();
   bool ParseIntelOffsetOperator(const MCExpr *&Val, StringRef &ID,
                                 InlineAsmIdentifierInfo &Info, SMLoc &End);
   bool ParseIntelDotOperator(IntelExprStateMachine &SM, SMLoc &End);
   unsigned IdentifyIntelInlineAsmOperator(StringRef Name);
   unsigned ParseIntelInlineAsmOperator(unsigned OpKind);
   std::unique_ptr<X86Operand> ParseRoundingModeOp(SMLoc Start);
   bool ParseIntelNamedOperator(StringRef Name, IntelExprStateMachine &SM,
bool X86AsmParser::VerifyAndAdjustOperands(OperandVector &OrigOperands,
   }
   // OrigOperands.append(FinalOperands.begin(), FinalOperands.end());
   for (unsigned int i = 0; i < FinalOperands.size(); ++i)
     OrigOperands.push_back(std::move(FinalOperands[i]));
 
   return false;
 }
 
-std::unique_ptr<X86Operand> X86AsmParser::ParseOperand() {
-  if (isParsingIntelSyntax())
-    return ParseIntelOperand();
-  return ParseATTOperand();
+bool X86AsmParser::ParseOperand(OperandVector &Operands) {
+  if (isParsingIntelSyntax()) {
+    if (std::unique_ptr<X86Operand> Op = ParseIntelOperand()) {
+      Operands.push_back(std::move(Op));
+      return false;
+    }
+    return true;
+  }
+
+  return ParseATTOperand(Operands);
 }
 
 std::unique_ptr<X86Operand> X86AsmParser::CreateMemForMSInlineAsm(
     unsigned SegReg, const MCExpr *Disp, unsigned BaseReg, unsigned IndexReg,
     unsigned Scale, SMLoc Start, SMLoc End, unsigned Size, StringRef Identifier,
     const InlineAsmIdentifierInfo &Info) {
   // If we found a decl other than a VarDecl, then assume it is a FuncDecl or
   // some other label reference.
return X86Operand::CreateMem(getPointerWidth(), RegNo, Disp, BaseReg,
                                  /*DefaultBaseReg=*/X86::RIP);
 
   if (!(BaseReg || IndexReg || RegNo))
     return X86Operand::CreateMem(getPointerWidth(), Disp, Start, End, Size);
   return X86Operand::CreateMem(getPointerWidth(), RegNo, Disp,
                                BaseReg, IndexReg, Scale, Start, End, Size);
 }
 
-std::unique_ptr<X86Operand> X86AsmParser::ParseATTOperand() {
+bool X86AsmParser::ParseATTOperand(OperandVector &Operands) {
   MCAsmParser &Parser = getParser();
   switch (getLexer().getKind()) {
   case AsmToken::Dollar: {
     // $42 or $ID -> immediate.
     SMLoc Start = Parser.getTok().getLoc(), End;
     Parser.Lex();
     const MCExpr *Val;
     // This is an immediate, so we should not parse a register. Do a precheck
     // for '%' to supercede intra-register parse errors.
     SMLoc L = Parser.getTok().getLoc();
     if (check(getLexer().is(AsmToken::Percent), L,
               "expected immediate expression") ||
         getParser().parseExpression(Val, End) ||
         check(isa<X86MCExpr>(Val), L, "expected immediate expression"))
-      return nullptr;
-    return X86Operand::CreateImm(Val, Start, End);
+      return true;
+    Operands.push_back(X86Operand::CreateImm(Val, Start, End));
+    return false;
   }
   case AsmToken::LCurly: {
     SMLoc Start = Parser.getTok().getLoc();
-    return ParseRoundingModeOp(Start);
+    if (std::unique_ptr<X86Operand> Op = ParseRoundingModeOp(Start)) {
+      Operands.push_back(std::move(Op));
+      return false;
+    }
+    return true;
   }
   default: {
     // This a memory operand or a register. We have some parsing complications
     // as a '(' may be part of an immediate expression or the addressing mode
     // block. This is complicated by the fact that an assembler-level variable
     // may refer either to a register or an immediate expression.
 
     SMLoc Loc = Parser.getTok().getLoc(), EndLoc;
     const MCExpr *Expr = nullptr;
     unsigned Reg = 0;
     if (getLexer().isNot(AsmToken::LParen)) {
       // No '(' so this is either a displacement expression or a register.
       if (Parser.parseExpression(Expr, EndLoc))
-        return nullptr;
+        return true;
       if (auto *RE = dyn_cast<X86MCExpr>(Expr)) {
         // Segment Register. Reset Expr and copy value to register.
         Expr = nullptr;
         Reg = RE->getRegNo();
 
         // Sanity check register.
         if (Reg == X86::EIZ || Reg == X86::RIZ)
-          return ErrorOperand(
+          return Error(
               Loc, "%eiz and %riz can only be used as index registers",
               SMRange(Loc, EndLoc));
         if (Reg == X86::RIP)
-          return ErrorOperand(Loc, "%rip can only be used as a base register",
-                              SMRange(Loc, EndLoc));
+          return Error(Loc, "%rip can only be used as a base register",
         // Return register that are not segment prefixes immediately.
-        if (!Parser.parseOptionalToken(AsmToken::Colon))
-          return X86Operand::CreateReg(Reg, Loc, EndLoc);
+        if (!Parser.parseOptionalToken(AsmToken::Colon)) {
+          Operands.push_back(X86Operand::CreateReg(Reg, Loc, EndLoc));
+          return false;
+        }
         if (!X86MCRegisterClasses[X86::SEGMENT_REGRegClassID].contains(Reg))
-          return ErrorOperand(Loc, "invalid segment register");
+          return Error(Loc, "invalid segment register");
+        // Accept a '*' absolute memory reference after the segment. Place it
+        // before the full memory operand.
+        if (getLexer().is(AsmToken::Star))
+          Operands.push_back(X86Operand::CreateToken("*", consumeToken()));
       }
     }
     // This is a Memory operand.
-    return ParseMemOperand(Reg, Expr, Loc, EndLoc);
+    if (std::unique_ptr<X86Operand> Op = ParseMemOperand(Reg, Expr, Loc, EndLoc)) {
+      Operands.push_back(std::move(Op));
+      return false;
+    }
+    return true;
   }
   }
 }
 
 // X86::COND_INVALID if not a recognized condition code or alternate mnemonic,
 // otherwise the EFLAGS Condition Code enumerator.
 X86::CondCode X86AsmParser::ParseConditionCode(StringRef CC) {
   return StringSwitch<X86::CondCode>(CC)
bool X86AsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
   // the next one.
   if (getLexer().isNot(AsmToken::EndOfStatement) && !isPrefix) {
     // Parse '*' modifier.
     if (getLexer().is(AsmToken::Star))
       Operands.push_back(X86Operand::CreateToken("*", consumeToken()));
 
     // Read the operands.
     while(1) {
-      if (std::unique_ptr<X86Operand> Op = ParseOperand()) {
-        Operands.push_back(std::move(Op));
-        if (HandleAVX512Operand(Operands))
-          return true;
-      } else {
-         return true;
-      }
+      if (ParseOperand(Operands))
+      if (HandleAVX512Operand(Operands))
+
       // check for comma and eat it
       if (getLexer().is(AsmToken::Comma))
         Parser.Lex();
       else
         break;
      }
 
     // In MS inline asm curly braces mark the beginning/end of a block,

llvm/test/MC/X86/x86-32.s

 // CHECK:  fixup A - offset: 1, value: foo-4, kind: FK_PCRel_4
 {disp32} jmp foo
 foo:
 
 // CHECK: je foo
 // CHECK:  encoding: [0x0f,0x84,A,A,A,A]
 // CHECK:  fixup A - offset: 2, value: foo-4, kind: FK_PCRel_4
 {disp32} je foo
+
+// CHECK: ljmpl *%cs:305419896
+// CHECK:  encoding: [0x2e,0xff,0x2d,0x78,0x56,0x34,0x12]
+ljmp %cs:*0x12345678

llvm/test/MC/X86/x86-64.s

 // CHECK: ljmpl  *3135175374
 // CHECK: lcalll *(%rax)
 // CHECK: ljmpl *(%rax)
 lcall  *0xbadeface
 ljmp *0xbadeface
 lcall *(%rax)
 ljmpl *(%rax)
 
+// CHECK: ljmpl *%cs:305419896
+// CHECK:  encoding: [0x2e,0xff,0x2c,0x25,0x78,0x56,0x34,0x12]
+ljmp %cs:*0x12345678
+
 // rdar://8444631
 // CHECK: enter $31438, $0
 // CHECK: encoding: [0xc8,0xce,0x7a,0x00]
 // CHECK: enter $31438, $1
 // CHECK: encoding: [0xc8,0xce,0x7a,0x01]
 // CHECK: enter $31438, $127
 // CHECK: encoding: [0xc8,0xce,0x7a,0x7f]
 enter $0x7ace,$0

 // CHECK: xresldtrk
 // CHECK: encoding: [0xf2,0x0f,0x01,0xe9]
 xresldtrk
 
 // CHECK: ud1q %rdx, %rdi
 // CHECK:  encoding: [0x48,0x0f,0xb9,0xfa]
 ud1 %rdx, %rdi
 
 // CHECK: ud1q (%rbx), %rcx
 // CHECK:  encoding: [0x48,0x0f,0xb9,0x0b]
 ud2b (%rbx), %rcx