This is an archive of the discontinued LLVM Phabricator instance.

Differential D84407

AMDGPU/GlobalISel: Select set.inactive intrinsic
ClosedPublic

Authored by Petar.Avramovic on Jul 23 2020, 7:26 AM.

Details

Reviewers
foad
arsenm
Commits
rG47bd41d099c0: AMDGPU/GlobalISel: Select set.inactive intrinsic

Diff Detail

Event Timeline

Petar.Avramovic created this revision.Jul 23 2020, 7:26 AM
Herald added a project: Restricted Project. · View Herald TranscriptJul 23 2020, 7:26 AM
Herald added subscribers: llvm-commits, kerbowa, hiraditya and 9 others. · View Herald Transcript
arsenm accepted this revision.Jul 23 2020, 7:36 AM
This revision is now accepted and ready to land.Jul 23 2020, 7:36 AM
Closed by commit rG47bd41d099c0: AMDGPU/GlobalISel: Select set.inactive intrinsic (authored by Petar.Avramovic). · Explain WhyJul 24 2020, 1:14 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
lib/
Target/
AMDGPU/
1 line
test/
CodeGen/
AMDGPU/
GlobalISel/
1 line

Diff 280354

llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp

Show First 20 Lines • Show All 4,013 Lines • ▼ Show 20 Lines case AMDGPU::G_INTRINSIC: {
case Intrinsic::amdgcn_ds_permute: case Intrinsic::amdgcn_ds_permute:
case Intrinsic::amdgcn_ds_bpermute: case Intrinsic::amdgcn_ds_bpermute:
case Intrinsic::amdgcn_update_dpp: case Intrinsic::amdgcn_update_dpp:
case Intrinsic::amdgcn_mov_dpp8: case Intrinsic::amdgcn_mov_dpp8:
case Intrinsic::amdgcn_mov_dpp: case Intrinsic::amdgcn_mov_dpp:
case Intrinsic::amdgcn_wwm: case Intrinsic::amdgcn_wwm:
case Intrinsic::amdgcn_wqm: case Intrinsic::amdgcn_wqm:
case Intrinsic::amdgcn_softwqm: case Intrinsic::amdgcn_softwqm:
case Intrinsic::amdgcn_set_inactive:
return getDefaultMappingAllVGPR(MI); return getDefaultMappingAllVGPR(MI);
case Intrinsic::amdgcn_kernarg_segment_ptr: case Intrinsic::amdgcn_kernarg_segment_ptr:
case Intrinsic::amdgcn_s_getpc: case Intrinsic::amdgcn_s_getpc:
case Intrinsic::amdgcn_groupstaticsize: { case Intrinsic::amdgcn_groupstaticsize: {
unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits();
OpdsMapping[0] = AMDGPU::getValueMapping(AMDGPU::SGPRRegBankID, Size); OpdsMapping[0] = AMDGPU::getValueMapping(AMDGPU::SGPRRegBankID, Size);
break; break;
} }
▲ Show 20 Lines • Show All 390 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll

  • This file was added.
; RUN: llc -global-isel -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %S/../llvm.amdgcn.set.inactive.ll | FileCheck -check-prefix=SI -check-prefix=GCN %S/../llvm.amdgcn.set.inactive.ll