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	// are not supported.			// are not supported.
	module attributes {			module attributes {
	spv.target_env = #spv.target_env<			spv.target_env = #spv.target_env<
	#spv.vce<v1.0, [], []>,			#spv.vce<v1.0, [], []>,
	{max_compute_workgroup_invocations = 128 : i32,			{max_compute_workgroup_invocations = 128 : i32,
	max_compute_workgroup_size = dense<[128, 128, 64]> : vector<3xi32>}>			max_compute_workgroup_size = dense<[128, 128, 64]> : vector<3xi32>}>
	} {			} {

	// CHECK-LEBEL: @int_vector4_invalid
	func @int_vector4_invalid(%arg0: vector<4xi64>) {			func @int_vector4_invalid(%arg0: vector<4xi64>) {
	// expected-error @+2 {{bitwidth emulation is not implemented yet on unsigned op}}			// expected-error @+2 {{bitwidth emulation is not implemented yet on unsigned op}}
	// expected-error @+1 {{op requires the same type for all operands and results}}			// expected-error @+1 {{op requires the same type for all operands and results}}
	%0 = divi_unsigned %arg0, %arg0: vector<4xi64>			%0 = divi_unsigned %arg0, %arg0: vector<4xi64>
	return			return
	}			}

	} // end module			} // end module
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[MLIR][StdToSPIRV] Fixed a typo in ops conversion testsClosedPublic