[MLIR][SPIRVToLLVM] Miscellaneous ops conversion: select, fmul and undef

[georgemitenkov]

Summary

This patch introduces 3 new direct conversions for SPIR-V ops:

• spv.Select
• spv.Undef
• spv.FMul that was skipped in the patch with arithmetic ops

mlir/lib/Conversion/SPIRVToLLVM/ConvertSPIRVToLLVM.cpp

void mlir::populateSPIRVToLLVMConversionPatterns(
     OwningRewritePatternList &patterns) {
   patterns.insert<
       // Arithmetic ops
       DirectConversionPattern<spirv::IAddOp, LLVM::AddOp>,
       DirectConversionPattern<spirv::IMulOp, LLVM::MulOp>,
       DirectConversionPattern<spirv::ISubOp, LLVM::SubOp>,
       DirectConversionPattern<spirv::FAddOp, LLVM::FAddOp>,
       DirectConversionPattern<spirv::FDivOp, LLVM::FDivOp>,
+      DirectConversionPattern<spirv::FMulOp, LLVM::FMulOp>,
       DirectConversionPattern<spirv::FNegateOp, LLVM::FNegOp>,
       DirectConversionPattern<spirv::FRemOp, LLVM::FRemOp>,
       DirectConversionPattern<spirv::FSubOp, LLVM::FSubOp>,
       DirectConversionPattern<spirv::SDivOp, LLVM::SDivOp>,
       DirectConversionPattern<spirv::SRemOp, LLVM::SRemOp>,
       DirectConversionPattern<spirv::UDivOp, LLVM::UDivOp>,
       DirectConversionPattern<spirv::UModOp, LLVM::URemOp>,
 
patterns.insert<
 
       // Logical ops
       DirectConversionPattern<spirv::LogicalAndOp, LLVM::AndOp>,
       DirectConversionPattern<spirv::LogicalOrOp, LLVM::OrOp>,
       IComparePattern<spirv::LogicalEqualOp, LLVM::ICmpPredicate::eq>,
       IComparePattern<spirv::LogicalNotEqualOp, LLVM::ICmpPredicate::ne>,
       NotPattern<spirv::LogicalNotOp>,
 
+      // Miscellaneous ops
+      DirectConversionPattern<spirv::SelectOp, LLVM::SelectOp>,
+      DirectConversionPattern<spirv::UndefOp, LLVM::UndefOp>,
+
       // Shift ops
       ShiftPattern<spirv::ShiftRightArithmeticOp, LLVM::AShrOp>,
       ShiftPattern<spirv::ShiftRightLogicalOp, LLVM::LShrOp>,
       ShiftPattern<spirv::ShiftLeftLogicalOp, LLVM::ShlOp>,
 
       // Return ops
       ReturnPattern, ReturnValuePattern>(context, typeConverter);
 }

mlir/test/Conversion/SPIRVToLLVM/arithmetic-ops-to-llvm.mlir

 
 func @fdiv_vector(%arg0: vector<3xf64>, %arg1: vector<3xf64>) {
   // CHECK: %{{.*}} = llvm.fdiv %{{.*}}, %{{.*}} : !llvm<"<3 x double>">
   %0 = spv.FDiv %arg0, %arg1 : vector<3xf64>
   return
 }
 
 //===----------------------------------------------------------------------===//
+// spv.FMul
+//===----------------------------------------------------------------------===//
+
+func @fmul_scalar(%arg0: f32, %arg1: f32) {
+  // CHECK: %{{.*}} = llvm.fmul %{{.*}}, %{{.*}} : !llvm.float
+  %0 = spv.FMul %arg0, %arg1 : f32
+  return
+}
+
+func @fmul_vector(%arg0: vector<2xf32>, %arg1: vector<2xf32>) {
+  // CHECK: %{{.*}} = llvm.fmul %{{.*}}, %{{.*}} : !llvm<"<2 x float>">
+  %0 = spv.FMul %arg0, %arg1 : vector<2xf32>
+  return
+}
+
+//===----------------------------------------------------------------------===//
 // spv.FRem
 //===----------------------------------------------------------------------===//
 
 func @frem_scalar(%arg0: f32, %arg1: f32) {
   // CHECK: %{{.*}} = llvm.frem %{{.*}}, %{{.*}} : !llvm.float
   %0 = spv.FRem %arg0, %arg1 : f32
   return
 }

mlir/test/Conversion/SPIRVToLLVM/misc-ops-to-llvm.mlir

+// RUN: mlir-opt -convert-spirv-to-llvm %s | FileCheck %s
+
+//===----------------------------------------------------------------------===//
+// spv.Select
+//===----------------------------------------------------------------------===//
+
+func @select_scalar(%arg0: i1, %arg1: vector<3xi32>, %arg2: f32) {
+  // CHECK: %{{.*}} = llvm.select %{{.*}}, %{{.*}}, %{{.*}} : !llvm.i1, !llvm<"<3 x i32>">
+  %0 = spv.Select %arg0, %arg1, %arg1 : i1, vector<3xi32>
+  // CHECK: %{{.*}} = llvm.select %{{.*}}, %{{.*}}, %{{.*}} : !llvm.i1, !llvm.float
+  %1 = spv.Select %arg0, %arg2, %arg2 : i1, f32
+  return
+}
+
+func @select_vector(%arg0: vector<2xi1>, %arg1: vector<2xi32>) {
+  // CHECK: %{{.*}} = llvm.select %{{.*}}, %{{.*}}, %{{.*}} : !llvm<"<2 x i1>">, !llvm<"<2 x i32>">
+  %0 = spv.Select %arg0, %arg1, %arg1 : vector<2xi1>, vector<2xi32>
+  return
+}
+
+//===----------------------------------------------------------------------===//
+// spv.Undef
+//===----------------------------------------------------------------------===//
+
+func @undef_scalar() {
+  // CHECK: %{{.*}} = llvm.mlir.undef : !llvm.float
+  %0 = spv.undef : f32
+  return
+}
+
+func @undef_vector() {
+  // CHECK: %{{.*}} = llvm.mlir.undef : !llvm<"<2 x i32>">
+  %0 = spv.undef : vector<2xi32>
+  return
+}