[AMDGPU][CODEGEN] Corrected lowering of inline asm in bundles

[dp]

Summary

See bug 46285

This is an incomplete change - it requires access to AsmPrinter::emitInlineAsm which is currently defined as private in AsmPrinter.h.
If you think this change is fine I'll create a separate fix to make this function accessible in subclasses.

[arsenm]

I think inline asm in a bundle should probably be a verifier error

llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp

if (!STI.getInstrInfo()->verifyInstruction(*MI, Err)) {
     C.emitError("Illegal instruction detected: " + Err);
     MI->print(errs());
   }
 
   if (MI->isBundle()) {
     const MachineBasicBlock *MBB = MI->getParent();
     MachineBasicBlock::const_instr_iterator I = ++MI->getIterator();
     while (I != MBB->instr_end() && I->isInsideBundle()) {
+      if ((&*I)->getOpcode() == TargetOpcode::INLINEASM ||
+          (&*I)->getOpcode() == TargetOpcode::INLINEASM_BR) {
+        emitInlineAsm(&*I);
+      } else {
         emitInstruction(&*I);
+      }
       ++I;
     }
   } else {
     // We don't want SI_MASK_BRANCH/SI_RETURN_TO_EPILOG encoded. They are
     // placeholder terminator instructions and should only be printed as
     // comments.
     if (MI->getOpcode() == AMDGPU::SI_MASK_BRANCH) {
       if (isVerbose()) {

llvm/test/CodeGen/AMDGPU/inline-asm.ll

 exit:
   %s1 = phi { i64, i64} [ undef, %entry ], [ %s0, %false]
   %v0 = extractvalue { i64, i64 } %s1, 0
   %v1 = extractvalue { i64, i64 } %s1, 1
   tail call void asm sideeffect "; use $0", "v"(i64 %v0)
   tail call void asm sideeffect "; use $0", "v"(i64 %v1)
   ret void
 }
+
+; Check inline assembler in bundles.
+; CHECK-LABEL: bundle
+; CHECK: s_mov_b32 s0, 11
+; CHECK: s_mov_b64 s[0:1], 42
+define amdgpu_kernel void @bundle() {
+  call void asm sideeffect "s_mov_b32 s0, $0", "i"(i32 11)
+  call void asm sideeffect "s_mov_b64 s[0:1], $0", "i"(i64 42)
+  ret void
+}