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[CodeGen] Specify meaning of ISD opcodes for scalable vectors
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Authored by sdesmalen on May 12 2020, 2:00 PM.

Details

Summary

This patch contains changes to the description of EXTRACT_SUBVECTOR,
INSERT_SUBVECTOR, INSERT_VECTOR_ELT, EXTRACT_VECTOR_ELT and
CONCAT_VECTORS to specify their behaviour for scalable vectors.

For EXTRACT_SUBVECTOR it specifies that the IDX is scaled by the
same runtime scaling as the extracted (or inserted) vector. This
definition is the most natural extension to EXTRACT_SUBVECTOR for
scalable vectors, as most use-cases that work on fixed-width types
will have the same meaning for scalable types. For legalization for
example, it is common to split the vector operation to operate on
the LO and HI halfs of a vector.

For a fixed width vector <16 x i8> this would be expressed with:

v16i8 %res = EXTRACT_SUBVECTOR v32i8 %v, i32 16

For a scalable vector, this would similarly be expressed as:

nxv16i8 %res = EXTRACT_SUBVECTOR nxv32i8 %V, i32 16

By extending the meaning of IDX for scalable vectors, most existing
optimisations on EXTRACT/INSERT_SUBVECTOR work for scalable vectors
without any changes. This definition also allows extracting a
fixed-width subvector from a scalable vector, which is useful to
e.g. extract the low N lanes of a scalable vector.

This patch is not NFC because it sets the meaning of these nodes
for scalable vectors, which future patches will build upon.

Diff Detail

Event Timeline

sdesmalen created this revision.May 12 2020, 2:00 PM
Herald added a project: Restricted Project. · View Herald TranscriptMay 12 2020, 2:00 PM

Both the scaled and unscaled variations are potentially useful. But the scaled variation is probably more useful, and it's probably a lot less work to use the names INSERT_SUBVECTOR and EXTRACT_SUBVECTOR for the scaled version. So this probably makes sense.

I think I'd rather use a different opcode for the cases where you're mixing fixed/scalable vectors. There are some potentially weird edge cases to deal with there, and the existing code is much more likely to blow up. For example, can you extract an <8 x i32> from a <vscale x 4 x i32>? Does it matter if we know that vscale is 2 or more for the current subtarget?

While we're looking at this, the "potentially variable" part is very messy, and it looks like nothing actually takes advantage of it. Posted https://reviews.llvm.org/D79814 .

While you're in ISDOpcodes, can you add notes to various other vector-specific operations? Probably BUILD_VECTOR and VECTOR_SHUFFLE should always return fixed vectors, and the behavior of INSERT_VECTOR_ELT/EXTRACT_VECTOR_ELT/CONCAT_VECTORS/VSELECT should be clear. But better to note it explicitly, I think.

sdesmalen updated this revision to Diff 265693.May 22 2020, 4:11 AM
sdesmalen retitled this revision from [CodeGen][SVE] Specify meaning of EXTRACT_SUBVECTOR for scalable vectors to [CodeGen] Specify meaning of ISD opcodes for scalable vectors.
sdesmalen edited the summary of this revision. (Show Details)

Specified meaning of INSERT/EXTRACT_VECTOR_ELT, BUILD_VECTOR and CONCAT_VECTORS for scalable vectors.

I think I'd rather use a different opcode for the cases where you're mixing fixed/scalable vectors. There are some potentially weird edge cases to deal with there, and the existing code is much more likely to blow up. For example, can you extract an <8 x i32> from a <vscale x 4 x i32>? Does it matter if we know that vscale is 2 or more for the current subtarget?

We discussed this in the previous SVE sync-up call, but just to clarify: extracting a <8 x i32> from a <vscale x 4 x i32> would be a valid use-case for the same reason as allowing to extract an element from index 8 from e.g. a <vscale x 4 x i32>. I've called that out explicitly in the description of EXTRACT_VECTOR_ELT.

  • Added clarification that extract_subvector does not support extracting a scalable vector from a fixed-width vector (and similar for insert_subvector).
efriedma added inline comments.May 22 2020, 11:26 AM
llvm/include/llvm/CodeGen/ISDOpcodes.h
491

Not sure what "must be valid VECTOR1 indices" means in the context of mixed fixed/scalable vectors. We can't verify that at compile-time, so what happens if they aren't at runtime?

We currently assert that the index of an INSERT_SUBVECTOR is in range of the input. Do you plan to relax that in all cases? In the mixed fixed/scalable case?

492

Maybe put a blank line here?

500

Maybe say "If T is scalable, then IDX..."

We currently assert that the index of an EXTRACT_SUBVECTOR is in range of the input. Do you plan to relax that in all cases? In the mixed fixed/scalable case?

sdesmalen updated this revision to Diff 266009.May 25 2020, 5:22 AM
  • Updated wording for extract/insert subvector.
sdesmalen marked 4 inline comments as done.May 25 2020, 5:31 AM
sdesmalen added inline comments.
llvm/include/llvm/CodeGen/ISDOpcodes.h
491

For the fixed/fixed and scalable/scalable case, we can determine this statically.
For the fixed/scalable case, I've added wording that the result vector is undefined if this turns out to be false at runtime. This should match the behaviour of INSERT_VECTOR_ELT.

I don't really see a reason to relax this for the fixed/fixed and scalable/scalable cases at this point, let me know if you think it should be changed.

efriedma accepted this revision.May 26 2020, 11:59 AM

LGTM

llvm/include/llvm/CodeGen/ISDOpcodes.h
460

Maybe put an empty /// line between the two paragraphs?

This revision is now accepted and ready to land.May 26 2020, 11:59 AM
This revision was automatically updated to reflect the committed changes.
sdesmalen marked 2 inline comments as done.