[ValueTracking] Fix crash in isGuaranteedNotToBeUndefOrPoison when V is in an unreachable block

[aqjune]

Summary

This fixes PR45885 by fixing isGuaranteedNotToBeUndefOrPoison so it does not look into dominating
branch conditions of V when V is an instruction in an unreachable block.

[nikic]

LG apart from the test issue.

llvm/test/Transforms/DivRemPairs/pr45885.ll

2 ↗

(On Diff #263449)

This needs REQUIRES. It probably makes more sense to target x86 and put it in the X86 directory.

[aqjune]

llvm/test/Transforms/DivRemPairs/pr45885.ll

2 ↗

(On Diff #263449)

Put it into PowerPC instead, as the input did not cause crash in X86

llvm/lib/Analysis/ValueTracking.cpp

if (programUndefinedIfPoison(I) && I->getType()->isIntegerTy(1))
       // we can remove the isIntegerTy(1) constraint.
       return true;
   }
 
   // CxtI may be null or a cloned instruction.
   if (!CtxI || !CtxI->getParent() || !DT)
     return false;
 
+  auto *DNode = DT->getNode(CtxI->getParent());
+  if (!DNode)
+    // Unreachable block
+    return false;
+
   // If V is used as a branch condition before reaching CtxI, V cannot be
   // undef or poison.
   //   br V, BB1, BB2
   // BB1:
   //   CtxI ; V cannot be undef or poison here
-  auto Dominator = DT->getNode(CtxI->getParent())->getIDom();
+  auto *Dominator = DNode->getIDom();
   while (Dominator) {
     auto *TI = Dominator->getBlock()->getTerminator();
 
     if (auto BI = dyn_cast<BranchInst>(TI)) {
       if (BI->isConditional() && BI->getCondition() == V)
         return true;
     } else if (auto SI = dyn_cast<SwitchInst>(TI)) {
       if (SI->getCondition() == V)

llvm/test/Transforms/DivRemPairs/PowerPC/pr45885.ll

+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -div-rem-pairs -S -mtriple=powerpc64-unknown-unknown | FileCheck %s
+
+define void @g() {
+; CHECK-LABEL: @g(
+; CHECK-NEXT:  if.end:
+; CHECK-NEXT:    ret void
+; CHECK:       for.cond:
+; CHECK-NEXT:    [[TMP0:%.*]] = mul i16 [[DIV_I:%.*]], [[REM_FROZEN:%.*]]
+; CHECK-NEXT:    [[REM_DECOMPOSED:%.*]] = sub i16 1, [[TMP0]]
+; CHECK-NEXT:    [[REM_FROZEN]] = freeze i16 [[REM_DECOMPOSED]]
+; CHECK-NEXT:    [[DIV_I]] = sdiv i16 1, [[REM_FROZEN]]
+; CHECK-NEXT:    br label [[FOR_COND:%.*]]
+;
+if.end:
+  ret void
+
+for.cond:                                         ; preds = %for.cond
+  %rem = srem i16 1, %rem
+  %div.i = sdiv i16 1, %rem
+  br label %for.cond
+}
+
+