[CodeGen] Fix bug in inline asm reserved register detection

[vhscampos]

Summary

In the case where inline asm's input operands are assigned values,
targets may opt to emit an error when a reserved register is used for
such operands. This is the case for Arm.

The current code, however, emits an error even when the reserved
register, when used as an input operand, is only read from. This is a
bug.

This patch adds additional checks to emit error only when a reserved
register used as an input operand is actually written to. The criteria
used is to check whether or not the input operand value, which is the
value to be loaded into the input, is undef. When this is the case, the
assignment is optimized away and therefore the reserved register ends up
not being written to.

[efriedma]

We can't reasonably check whether the argument is undef; among other issues, it completely destroys the meaning of "undef", and the argument probably won't be undef at -O0.

If we want to do something here, we need to resolve it in clang somehow, so we aren't passing an argument at all.

(I think gcc prints an error for this case?)

[vhscampos]

Thanks @efriedma for the clarification. It seems that the handling of input operands must be moved to clang then.

(Yes, gcc prints an error in this case.)

I am opening another review to remove the handling of inputs operands for the time being.

llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

void SelectionDAGBuilder::visitInlineAsm(const CallBase &Call) {
   for (SDISelAsmOperandInfo &OpInfo : ConstraintOperands) {
     // Assign Registers.
     SDISelAsmOperandInfo &RefOpInfo =
         OpInfo.isMatchingInputConstraint()
             ? ConstraintOperands[OpInfo.getMatchedOperand()]
             : OpInfo;
     GetRegistersForValue(DAG, getCurSDLoc(), OpInfo, RefOpInfo);
 
-    auto DetectWriteToReservedRegister = [&]() {
+    auto DetectReservedRegister = [&]() {
       const MachineFunction &MF = DAG.getMachineFunction();
       const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
       for (unsigned Reg : OpInfo.AssignedRegs.Regs) {
         if (Register::isPhysicalRegister(Reg) &&
             TRI.isInlineAsmReadOnlyReg(MF, Reg)) {
           const char *RegName = TRI.getName(Reg);
           emitInlineAsmError(Call, "write to reserved register '" +
                                        Twine(RegName) + "'");
case InlineAsm::isOutput:
         // C_Immediate/C_Other). Find a register that we can use.
         if (OpInfo.AssignedRegs.Regs.empty()) {
           emitInlineAsmError(
               Call, "couldn't allocate output register for constraint '" +
                         Twine(OpInfo.ConstraintCode) + "'");
           return;
         }
 
-        if (DetectWriteToReservedRegister())
+        if (DetectReservedRegister())
           return;
 
         // Add information to the INLINEASM node to know that this register is
         // set.
         OpInfo.AssignedRegs.AddInlineAsmOperands(
             OpInfo.isEarlyClobber ? InlineAsm::Kind_RegDefEarlyClobber
                                   : InlineAsm::Kind_RegDef,
             false, 0, getCurSDLoc(), DAG, AsmNodeOperands);
case InlineAsm::isInput: {
       // Copy the input into the appropriate registers.
       if (OpInfo.AssignedRegs.Regs.empty()) {
         emitInlineAsmError(Call,
                            "couldn't allocate input reg for constraint '" +
                                Twine(OpInfo.ConstraintCode) + "'");
         return;
       }
 
-      if (DetectWriteToReservedRegister())
+      // Detect the case where the input operand value would lead to a reserved
+      // register being written to.
+      if (InOperandVal && !InOperandVal.isUndef() && DetectReservedRegister())
         return;
 
       SDLoc dl = getCurSDLoc();
 
       OpInfo.AssignedRegs.getCopyToRegs(InOperandVal, DAG, dl, Chain, &Flag,
                                         &Call);
 
       OpInfo.AssignedRegs.AddInlineAsmOperands(InlineAsm::Kind_RegUse, false, 0,

llvm/test/CodeGen/ARM/inline-asm-reserved-registers.ll

 
 ; CHECK-ERROR: error: write to reserved register 'R6'
 define void @test_basepointer_input(i32 %size, i32 %input) alignstack(8) {
 entry:
   %vla = alloca i32, i32 %size, align 4
   %0 = call i32 asm sideeffect "mov $0, $1", "=r,{r6}"(i32 %input)
   ret void
 }
+
+; CHECK-ERROR-NOT: error: write to reserved register 'PC'
+define void @test_input_read() {
+entry:
+  %0 = call i32 asm sideeffect "mov $0, $1", "=r,{pc}"(i32 undef)
+  ret void
+}