This is similar to the recent move/addition of "scaleShuffleMask" (D76508), but there are a couple of differences:
- The existing x86 helper (canWidenShuffleElements) always tries to divide-by-2, so it gets called iteratively and wouldn't handle the general case of non-pow-2 length.
- The existing x86 code handles "SM_SentinelZero", but we don't have that in IR.
The motivation is to enable shuffle folds in instcombine/vector-combine that are similar to D76844 and D76727, but in the reverse-bitcast direction. Those patterns are visible in the tests for D40633.