Make amdgpu- options ZeroOrMore

[yaxunl]

Summary

Currently all amdgpu- options can only occur once in command line, which makes them very
inconvenient to use since users cannot override them.

This patch make them ZeroOrMore, which allows them to be overridden.

[arsenm]

These aren't actually intended for user use

[arsenm]

I don't think this should be done. These are for testing, and should always have a single, explicit setting. These are unstable, and users should not be trying to set or use these flags

llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

 #include "llvm/Transforms/Vectorize.h"
 #include <memory>
 
 using namespace llvm;
 
 static cl::opt<bool> EnableR600StructurizeCFG(
   "r600-ir-structurize",
   cl::desc("Use StructurizeCFG IR pass"),
-  cl::init(true));
+  cl::init(true),
+  cl::ZeroOrMore);
 
 static cl::opt<bool> EnableSROA(
   "amdgpu-sroa",
   cl::desc("Run SROA after promote alloca pass"),
   cl::ReallyHidden,
-  cl::init(true));
+  cl::init(true),
+  cl::ZeroOrMore);
 
 static cl::opt<bool>
 EnableEarlyIfConversion("amdgpu-early-ifcvt", cl::Hidden,
                         cl::desc("Run early if-conversion"),
-                        cl::init(false));
+                        cl::init(false),
+                        cl::ZeroOrMore);
 
 static cl::opt<bool>
 OptExecMaskPreRA("amdgpu-opt-exec-mask-pre-ra", cl::Hidden,
             cl::desc("Run pre-RA exec mask optimizations"),
-            cl::init(true));
+            cl::init(true),
+            cl::ZeroOrMore);
 
 static cl::opt<bool> EnableR600IfConvert(
   "r600-if-convert",
   cl::desc("Use if conversion pass"),
   cl::ReallyHidden,
-  cl::init(true));
+  cl::init(true),
+  cl::ZeroOrMore);
 
 // Option to disable vectorizer for tests.
 static cl::opt<bool> EnableLoadStoreVectorizer(
   "amdgpu-load-store-vectorizer",
   cl::desc("Enable load store vectorizer"),
   cl::init(true),
-  cl::Hidden);
+  cl::Hidden,
+  cl::ZeroOrMore);
 
 // Option to control global loads scalarization
 static cl::opt<bool> ScalarizeGlobal(
   "amdgpu-scalarize-global-loads",
   cl::desc("Enable global load scalarization"),
   cl::init(true),
-  cl::Hidden);
+  cl::Hidden,
+  cl::ZeroOrMore);
 
 // Option to run internalize pass.
 static cl::opt<bool> InternalizeSymbols(
   "amdgpu-internalize-symbols",
   cl::desc("Enable elimination of non-kernel functions and unused globals"),
   cl::init(false),
-  cl::Hidden);
+  cl::Hidden,
+  cl::ZeroOrMore);
 
 // Option to inline all early.
 static cl::opt<bool> EarlyInlineAll(
   "amdgpu-early-inline-all",
   cl::desc("Inline all functions early"),
   cl::init(false),
-  cl::Hidden);
+  cl::Hidden,
+  cl::ZeroOrMore);
 
 static cl::opt<bool> EnableSDWAPeephole(
   "amdgpu-sdwa-peephole",
   cl::desc("Enable SDWA peepholer"),
-  cl::init(true));
+  cl::init(true),
+  cl::ZeroOrMore);
 
 static cl::opt<bool> EnableDPPCombine(
   "amdgpu-dpp-combine",
   cl::desc("Enable DPP combiner"),
-  cl::init(true));
+  cl::init(true),
+  cl::ZeroOrMore);
 
 // Enable address space based alias analysis
 static cl::opt<bool> EnableAMDGPUAliasAnalysis("enable-amdgpu-aa", cl::Hidden,
   cl::desc("Enable AMDGPU Alias Analysis"),
-  cl::init(true));
+  cl::init(true),
+  cl::ZeroOrMore);
 
 // Option to run late CFG structurizer
 static cl::opt<bool, true> LateCFGStructurize(
   "amdgpu-late-structurize",
   cl::desc("Enable late CFG structurization"),
   cl::location(AMDGPUTargetMachine::EnableLateStructurizeCFG),
-  cl::Hidden);
+  cl::Hidden,
+  cl::ZeroOrMore);
 
 static cl::opt<bool, true> EnableAMDGPUFunctionCallsOpt(
   "amdgpu-function-calls",
   cl::desc("Enable AMDGPU function call support"),
   cl::location(AMDGPUTargetMachine::EnableFunctionCalls),
   cl::init(true),
-  cl::Hidden);
+  cl::Hidden,
+  cl::ZeroOrMore);
 
 // Enable lib calls simplifications
 static cl::opt<bool> EnableLibCallSimplify(
   "amdgpu-simplify-libcall",
   cl::desc("Enable amdgpu library simplifications"),
   cl::init(true),
-  cl::Hidden);
+  cl::Hidden,
+  cl::ZeroOrMore);
 
 static cl::opt<bool> EnableLowerKernelArguments(
   "amdgpu-ir-lower-kernel-arguments",
   cl::desc("Lower kernel argument loads in IR pass"),
   cl::init(true),
-  cl::Hidden);
+  cl::Hidden,
+  cl::ZeroOrMore);
 
 static cl::opt<bool> EnableRegReassign(
   "amdgpu-reassign-regs",
   cl::desc("Enable register reassign optimizations on gfx10+"),
   cl::init(true),
-  cl::Hidden);
+  cl::Hidden,
+  cl::ZeroOrMore);
 
 // Enable atomic optimization
 static cl::opt<bool> EnableAtomicOptimizations(
   "amdgpu-atomic-optimizations",
   cl::desc("Enable atomic optimizations"),
   cl::init(false),
-  cl::Hidden);
+  cl::Hidden,
+  cl::ZeroOrMore);
 
 // Enable Mode register optimization
 static cl::opt<bool> EnableSIModeRegisterPass(
   "amdgpu-mode-register",
   cl::desc("Enable mode register pass"),
   cl::init(true),
-  cl::Hidden);
+  cl::Hidden,
+  cl::ZeroOrMore);
 
 // Option is used in lit tests to prevent deadcoding of patterns inspected.
 static cl::opt<bool>
 EnableDCEInRA("amdgpu-dce-in-ra",
     cl::init(true), cl::Hidden,
-    cl::desc("Enable machine DCE inside regalloc"));
+    cl::desc("Enable machine DCE inside regalloc"),
+    cl::ZeroOrMore);
 
 static cl::opt<bool> EnableScalarIRPasses(
   "amdgpu-scalar-ir-passes",
   cl::desc("Enable scalar IR passes"),
   cl::init(true),
-  cl::Hidden);
+  cl::Hidden,
+  cl::ZeroOrMore);
 
 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUTarget() {
   // Register the target
   RegisterTargetMachine<R600TargetMachine> X(getTheAMDGPUTarget());
   RegisterTargetMachine<GCNTargetMachine> Y(getTheGCNTarget());
 
   PassRegistry *PR = PassRegistry::getPassRegistry();
   initializeR600ClauseMergePassPass(*PR);