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Differential D75902

[ARM][MVE] VFMA and VFMS validForTailPredication
ClosedPublic

Authored by samparker on Mar 10 2020, 3:41 AM.

Details

Reviewers
dmgreen
SjoerdMeijer
Commits
rGa31405006504: [ARM][MVE] VFMA and VFMS validForTailPredication
Summary

Add four instructions to the whitelist.

Diff Detail

Event Timeline

samparker created this revision.Mar 10 2020, 3:41 AM
Herald added a project: Restricted Project. · View Herald TranscriptMar 10 2020, 3:41 AM
Herald added subscribers: hiraditya, kristof.beyls. · View Herald Transcript
dmgreen accepted this revision.Mar 10 2020, 3:51 AM

LGTM

This revision is now accepted and ready to land.Mar 10 2020, 3:51 AM
Harbormaster completed remote builds in B48651: Diff 249301.Mar 10 2020, 4:30 AM
Closed by commit rGa31405006504: [ARM][MVE] VFMA and VFMS validForTailPredication (authored by samparker). · Explain WhyMar 10 2020, 8:40 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
lib/
Target/
ARM/
1 line
unittests/
Target/
ARM/
4 lines

Diff 249397

llvm/lib/Target/ARM/ARMInstrMVE.td

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 3,411 Lines • ▼ Show 20 Linesclass MVE_VADDSUBFMA_fp<string iname, string suffix, bit size, bit bit_4,
let Inst{22} = Qd{3}; let Inst{22} = Qd{3};
let Inst{21} = bit_21; let Inst{21} = bit_21;
let Inst{19-17} = Qn{2-0}; let Inst{19-17} = Qn{2-0};
let Inst{15-13} = Qd{2-0}; let Inst{15-13} = Qd{2-0};
let Inst{11-9} = 0b110; let Inst{11-9} = 0b110;
let Inst{8} = bit_8; let Inst{8} = bit_8;
let Inst{7} = Qn{3}; let Inst{7} = Qn{3};
let Inst{4} = bit_4; let Inst{4} = bit_4;
let validForTailPredication = 1;
} }
def MVE_VFMAf32 : MVE_VADDSUBFMA_fp<"vfma", "f32", 0b0, 0b1, 0b0, 0b0, def MVE_VFMAf32 : MVE_VADDSUBFMA_fp<"vfma", "f32", 0b0, 0b1, 0b0, 0b0,
(ins MQPR:$Qd_src), vpred_n, "$Qd = $Qd_src">; (ins MQPR:$Qd_src), vpred_n, "$Qd = $Qd_src">;
def MVE_VFMAf16 : MVE_VADDSUBFMA_fp<"vfma", "f16", 0b1, 0b1, 0b0, 0b0, def MVE_VFMAf16 : MVE_VADDSUBFMA_fp<"vfma", "f16", 0b1, 0b1, 0b0, 0b0,
(ins MQPR:$Qd_src), vpred_n, "$Qd = $Qd_src">; (ins MQPR:$Qd_src), vpred_n, "$Qd = $Qd_src">;
def MVE_VFMSf32 : MVE_VADDSUBFMA_fp<"vfms", "f32", 0b0, 0b1, 0b0, 0b1, def MVE_VFMSf32 : MVE_VADDSUBFMA_fp<"vfms", "f32", 0b0, 0b1, 0b0, 0b1,
▲ Show 20 Lines • Show All 3,471 Lines • Show Last 20 Lines

llvm/unittests/Target/ARM/MachineInstrTest.cpp

Show First 20 Lines • Show All 139 Lines • ▼ Show 20 Lines auto IsValidTPOpcode = [](unsigned Opcode) {
case MVE_VDWDUPu16: case MVE_VDWDUPu16:
case MVE_VDWDUPu32: case MVE_VDWDUPu32:
case MVE_VDWDUPu8: case MVE_VDWDUPu8:
case MVE_VEOR: case MVE_VEOR:
case MVE_VFMA_qr_Sf16: case MVE_VFMA_qr_Sf16:
case MVE_VFMA_qr_Sf32: case MVE_VFMA_qr_Sf32:
case MVE_VFMA_qr_f16: case MVE_VFMA_qr_f16:
case MVE_VFMA_qr_f32: case MVE_VFMA_qr_f32:
case MVE_VFMAf16:
case MVE_VFMAf32:
case MVE_VFMSf16:
case MVE_VFMSf32:
case MVE_VMAXAs16: case MVE_VMAXAs16:
case MVE_VMAXAs32: case MVE_VMAXAs32:
case MVE_VMAXAs8: case MVE_VMAXAs8:
case MVE_VMAXs16: case MVE_VMAXs16:
case MVE_VMAXs32: case MVE_VMAXs32:
case MVE_VMAXs8: case MVE_VMAXs8:
case MVE_VMAXu16: case MVE_VMAXu16:
case MVE_VMAXu32: case MVE_VMAXu32:
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