Implementation of relocations: R_ARM_REL32, R_ARM_THM_JUMP11, R_ARM_PREL31 for ELF/ARM

[lenykholodov]

Summary

This diff includes implementation of following relocations: R_ARM_REL32, R_ARM_THM_JUMP11, R_ARM_PREL31.

[shankarke]

lib/ReaderWriter/ELF/ARM/ARMRelocationHandler.cpp

261–262

Why isnt a veneer being created for this ?

454–458

can be done in one line

if (std::error_code ec= function)
return ec;

[Bigcheese]

looks fine other than what I mention inline.

lib/ReaderWriter/ELF/ARM/ARMRelocationHandler.cpp

132

applyThumbReloc

134

Is this checked before here? Bad input shouldn't assert, it should report a proper error.

[denis-protivensky]

lib/ReaderWriter/ELF/ARM/ARMRelocationHandler.cpp

132

If the function fixes up 16-bit Thumb instructions only, this should be reflected in its name.

179

I'd propose not to modify the `result``` variable after calculating address by the formula, so the logged value stays consistent with other handlers.

You can always introduce new variable with more readable name like `rel31``` and store the masked address in it.

274

Subtracting 2 from the shifted address is wrong. This means that you subtract 4 bytes from the original address value. Why should you do that?

[lenykholodov]

• R_ARM_THM_JUMP11 addend fix;
• function name change: applyThmReloc -> applyThumb16Reloc for thumb16 instruction;
• minor code formatting changes.

[Bigcheese]

lgtm

[denis-protivensky]

Couple of functional errors:

• error in use of SignExtend
• veneer handling for THM_JUMP11 reloc is not fixed

Others are code style changes, but please be careful to address (fix or comment) all of them.

lib/ReaderWriter/ELF/ARM/ARMRelocationHandler.cpp

83

You have 12 bits after the shift, so it should be SignExtend<12>, no?

96

I'd ask you to name readAddend method to correspond to the reloc name (readAddend_THM_JUMP11). Otherwise it's confusing, and moreover, THM16 suffix is never used (neither in documentation, nor in the code). The way when more generalized name may be used is when you have couple of relocs specifying related instructions.

172

The comment is wrong. You don't drop the T flag in calculations.

187

Add T symbol output.

261

You didn't fix this and didn't provide any explanation why you left this code unchanged.

274

This may be out of 80 symbols. Please, run it through clang-format.

[lenykholodov]

lib/ReaderWriter/ELF/ARM/ARMRelocationHandler.cpp

83

You are right. I've fixed it.

96

Fixed.

134

This assert only for self checking. Input parameter result has been already masked before. This assert checks that there is no unmasked bits in result.

172

Fixed.

187

Fixed.

261

I've checked documentation again and decided to remove veneer processing for this relocation. Jump11 won't have such case so this check may be removed.

"ELF for the ARM Architecture" documentation paper (p.4.6.1.5. Static Thumb16 relocations): "..
In general the addressing range of these relocations is too small for them to reference external symbols and they are documented here for completeness. A linker is not required to generate trampoline sequences (or veneers) to extend the branching range of the jump relocations.".

274

Fixed.

454–458

Will do.

[lenykholodov]

Fixes:

• veneer processing for jump11 was removed (according to p.4.6.1.5. Static Thumb16 relocations);
• SignExtend for jump11 addend reading has been fixed (from 11 bits to 12 bits);
• formatting changes & comments corrections.

[denis-protivensky]

lib/ReaderWriter/ELF/ARM/ARMRelocationHandler.cpp

133

I asked you to run the code through clang-format so there are no things like wrong indentations.

[lenykholodov]

Formatting changes after clang-format.

[lenykholodov]

lib/ReaderWriter/ELF/ARM/ARMRelocationHandler.cpp

133

Fixed.

[lenykholodov]

I don't have commit permissions. Could anyone commit this diff in my behalf?

[lenykholodov]

• rebase with master changes;
• changes in code formatting.

[denis-protivensky]

Since you don't have permissions, I'll merge this patch for you.

lib/ReaderWriter/ELF/ARM/ARMRelocationHandler.cpp

static Reference::Addend readAddend_ARM_CALL(const uint8_t *location) {
 
   const bool isBLX = (value & 0xF0000000) == 0xF0000000;
   const uint32_t bitH = isBLX ? ((value & 0x1000000) >> 24) : 0;
 
   const auto result = int32_t(((value & 0xFFFFFF) << 2) | (bitH << 1));
   return llvm::SignExtend64<26>(result);
 }
 
+static Reference::Addend readAddend_THM_JUMP11(const uint8_t *location) {
+  const auto value = uint16_t(
+      *reinterpret_cast<const llvm::support::ulittle16_t *>(location));
+
+  const uint16_t imm11 = value & 0x7FF;
+
+  return llvm::SignExtend32<12>(imm11 << 1);
+}
+
 static Reference::Addend readAddend(const uint8_t *location,
                                     Reference::KindValue kindValue) {
   switch (kindValue) {
   case R_ARM_ABS32:
     return int32_t(
         *reinterpret_cast<const llvm::support::little32_t *>(location));
   case R_ARM_THM_CALL:
   case R_ARM_THM_JUMP24:
     return readAddend_THM_CALL(location);
+  case R_ARM_THM_JUMP11:
+    return readAddend_THM_JUMP11(location);
   case R_ARM_CALL:
   case R_ARM_JUMP24:
     return readAddend_ARM_CALL(location);
   case R_ARM_MOVW_ABS_NC:
   case R_ARM_MOVT_ABS:
     return readAddend_ARM_MOV(location);
   case R_ARM_THM_MOVW_ABS_NC:
   case R_ARM_THM_MOVT_ABS:
*reinterpret_cast<llvm::support::ulittle16_t *>(location) =
       (uint16_t(*reinterpret_cast<llvm::support::ulittle16_t *>(location)) &
        ~maskHi) | (resHi & maskHi);
   location += 2;
   *reinterpret_cast<llvm::support::ulittle16_t *>(location) =
       (uint16_t(*reinterpret_cast<llvm::support::ulittle16_t *>(location)) &
        ~maskLo) | (resLo & maskLo);
 }
 
+static inline void applyThumb16Reloc(uint8_t *location, uint16_t result,
+                                     uint16_t mask = 0xFFFF) {
+  assert(!(result & ~mask));
+  *reinterpret_cast<llvm::support::ulittle16_t *>(location) =
+      (uint16_t(*reinterpret_cast<llvm::support::ulittle16_t *>(location)) &
+       ~mask) | (result & mask);
+}
+
 /// \brief R_ARM_ABS32 - (S + A) | T
 static void relocR_ARM_ABS32(uint8_t *location, uint64_t P, uint64_t S,
                              int64_t A, bool addressesThumb) {
   uint64_t T = addressesThumb;
   uint32_t result = (uint32_t)((S + A) | T);
 
   DEBUG_WITH_TYPE(
       "ARM", llvm::dbgs() << "\t\tHandle " << LLVM_FUNCTION_NAME << " -";
       llvm::dbgs() << " S: 0x" << Twine::utohexstr(S);
       llvm::dbgs() << " A: 0x" << Twine::utohexstr(A);
       llvm::dbgs() << " P: 0x" << Twine::utohexstr(P);
       llvm::dbgs() << " T: 0x" << Twine::utohexstr(T);
       llvm::dbgs() << " result: 0x" << Twine::utohexstr(result) << "\n");
   applyArmReloc(location, result);
 }
 
+/// \brief R_ARM_REL32 - ((S + A) | T) – P
+static void relocR_ARM_REL32(uint8_t *location, uint64_t P, uint64_t S,
+                             int64_t A, bool addressesThumb) {
+  uint64_t T = addressesThumb;
+  uint32_t result = (uint32_t)(((S + A) | T) - P);
+
+  DEBUG_WITH_TYPE(
+      "ARM", llvm::dbgs() << "\t\tHandle " << LLVM_FUNCTION_NAME << " -";
+      llvm::dbgs() << " S: 0x" << Twine::utohexstr(S);
+      llvm::dbgs() << " A: 0x" << Twine::utohexstr(A);
+      llvm::dbgs() << " P: 0x" << Twine::utohexstr(P);
+      llvm::dbgs() << " T: 0x" << Twine::utohexstr(T);
+      llvm::dbgs() << " result: 0x" << Twine::utohexstr(result) << "\n");
+  applyArmReloc(location, result);
+}
+
+/// \brief R_ARM_PREL31 - ((S + A) | T) - P
+static void relocR_ARM_PREL31(uint8_t *location, uint64_t P, uint64_t S,
+                                  int64_t A, bool addressesThumb) {
+  uint64_t T = addressesThumb;
+  uint32_t result = (uint32_t)(((S + A) | T) - P);
+
+  const uint32_t mask = 0x7FFFFFFF;
+
+  uint32_t rel31 = result & mask;
+
+  DEBUG_WITH_TYPE(
+      "ARM", llvm::dbgs() << "\t\tHandle " << LLVM_FUNCTION_NAME << " -";
+      llvm::dbgs() << " S: 0x" << Twine::utohexstr(S);
+      llvm::dbgs() << " A: 0x" << Twine::utohexstr(A);
+      llvm::dbgs() << " P: 0x" << Twine::utohexstr(P);
+      llvm::dbgs() << " T: 0x" << Twine::utohexstr(T);
+      llvm::dbgs() << " result: 0x" << Twine::utohexstr(result);
+      llvm::dbgs() << " rel31: 0x" << Twine::utohexstr(rel31) << "\n");
+
+  applyArmReloc(location, rel31, mask);
+}
+
 /// \brief Relocate B/BL instructions. useJs defines whether J1 & J2 are used
 static void relocR_ARM_THM_B_L(uint8_t *location, uint32_t result, bool useJs) {
   result = (result & 0x01FFFFFE) >> 1;
 
   const uint16_t imm10 = (result >> 11) & 0x3FF;
   const uint16_t bitS = (result >> 23) & 0x1;
   const uint16_t resHi = (bitS << 10) | imm10;
 
DEBUG_WITH_TYPE(
       llvm::dbgs() << " S: 0x" << Twine::utohexstr(S);
       llvm::dbgs() << " A: 0x" << Twine::utohexstr(A);
       llvm::dbgs() << " P: 0x" << Twine::utohexstr(P);
       llvm::dbgs() << " T: 0x" << Twine::utohexstr(T);
       llvm::dbgs() << " result: 0x" << Twine::utohexstr(result) << "\n");
   relocR_ARM_THM_B_L(location, result, true);
 }
 
+/// \brief R_ARM_THM_JUMP11 - S + A - P
+static void relocR_ARM_THM_JUMP11(uint8_t *location, uint64_t P, uint64_t S,
+                                  int64_t A) {
+  uint32_t result = (uint32_t)(S + A - P);
+
+  DEBUG_WITH_TYPE(
+      "ARM", llvm::dbgs() << "\t\tHandle " << LLVM_FUNCTION_NAME << " -";
+      llvm::dbgs() << " S: 0x" << Twine::utohexstr(S);
+      llvm::dbgs() << " A: 0x" << Twine::utohexstr(A);
+      llvm::dbgs() << " P: 0x" << Twine::utohexstr(P);
+      llvm::dbgs() << " result: 0x" << Twine::utohexstr(result) << "\n");
+
+  //we cut off first bit because it is always 1 according to p. 4.5.3
+
+  result = (result & 0x0FFE) >> 1;
+
+  applyThumb16Reloc(location, result, 0x7FF);
+}
+
 /// \brief R_ARM_CALL - ((S + A) | T) - P
 static void relocR_ARM_CALL(uint8_t *location, uint64_t P, uint64_t S,
                             int64_t A, bool addressesThumb) {
   uint64_t T = addressesThumb;
   const bool switchMode = addressesThumb;
 
   uint32_t result = (uint32_t)(((S + A) | T) - P);
   const uint32_t imm24 = (result & 0x03FFFFFC) >> 2;
 
   DEBUG_WITH_TYPE(
static void relocR_ARM_THM_MOV(uint8_t *location, uint32_t result) {
   const uint16_t imm8 = result & 0xFF;
   const uint16_t imm3 = (result >> 8) & 0x7;
   const uint16_t resLo = (imm3 << 12) | imm8;
 
   const uint16_t imm4 = (result >> 12) & 0xF;
   const uint16_t bitI = (result >> 11) & 0x1;
   const uint16_t resHi = (bitI << 10) | imm4;
 
   applyThmReloc(location, resHi, resLo, 0x40F, 0x70FF);
 }
 
 /// \brief R_ARM_THM_MOVW_ABS_NC - (S + A) | T
 static void relocR_ARM_THM_MOVW_ABS_NC(uint8_t *location, uint64_t P,
                                        uint64_t S, int64_t A,
                                        bool addressesThumb) {
   uint64_t T = addressesThumb;
   uint32_t result = (uint32_t)((S + A) | T);
std::error_code ARMTargetRelocationHandler::applyRelocation(
 
   switch (ref.kindValue()) {
   case R_ARM_NONE:
     break;
   case R_ARM_ABS32:
     relocR_ARM_ABS32(location, relocVAddress, targetVAddress, addend,
                      addressesThumb);
     break;
+  case R_ARM_REL32:
+    relocR_ARM_REL32(location, relocVAddress, targetVAddress, addend,
+                     addressesThumb);
+    break;
   case R_ARM_THM_CALL:
     // TODO: consider adding bool variable to disable J1 & J2 for archs
     // before ARMv6
     relocR_ARM_THM_CALL(location, relocVAddress, targetVAddress, addend, true,
                         addressesThumb);
     break;
   case R_ARM_CALL:
     relocR_ARM_CALL(location, relocVAddress, targetVAddress, addend,
                     addressesThumb);
     break;
   case R_ARM_JUMP24:
     relocR_ARM_JUMP24(location, relocVAddress, targetVAddress, addend,
                       addressesThumb);
     break;
   case R_ARM_THM_JUMP24:
     relocR_ARM_THM_JUMP24(location, relocVAddress, targetVAddress, addend,
                           addressesThumb);
     break;
+  case R_ARM_THM_JUMP11:
+    relocR_ARM_THM_JUMP11(location, relocVAddress, targetVAddress, addend);
+    break;
   case R_ARM_MOVW_ABS_NC:
     relocR_ARM_MOVW_ABS_NC(location, relocVAddress, targetVAddress, addend,
                            addressesThumb);
     break;
   case R_ARM_MOVT_ABS:
     relocR_ARM_MOVT_ABS(location, relocVAddress, targetVAddress, addend);
     break;
   case R_ARM_THM_MOVW_ABS_NC:
     relocR_ARM_THM_MOVW_ABS_NC(location, relocVAddress, targetVAddress, addend,
                                addressesThumb);
     break;
   case R_ARM_THM_MOVT_ABS:
     relocR_ARM_THM_MOVT_ABS(location, relocVAddress, targetVAddress, addend);
     break;
+  case R_ARM_PREL31:
+    relocR_ARM_PREL31(location, relocVAddress, targetVAddress, addend,
+                     addressesThumb);
+    break;
   default:
     return make_unhandled_reloc_error();
   }
 
   return std::error_code();
 }

test/elf/ARM/rel-arm-prel31.test

+# Check handling of R_ARM_PREL31 relocation.
+# RUN: yaml2obj -format=elf %s > %t-o.o
+# RUN: lld -flavor gnu -target arm -m armelf_linux_eabi -Bstatic \
+# RUN: --noinhibit-exec %t-o.o -o %t
+# RUN: llvm-objdump -s -t %t | FileCheck %s
+
+# CHECK: Contents of section .ARM.extab:
+# CHECK:  4000f4 81ffff7f
+# CHECK: SYMBOL TABLE:
+# CHECK: 00400074 g     F .text 00000010 __gxx_personality_v0
+
+---
+FileHeader:      
+  Class:           ELFCLASS32
+  Data:            ELFDATA2LSB
+  Type:            ET_REL
+  Machine:         EM_ARM
+  Flags:           [ EF_ARM_EABI_VER5 ]
+Sections:        
+  - Name:            .group
+    Type:            SHT_GROUP
+    Link:            .symtab
+    AddressAlign:    0x0000000000000004
+    Content:         '01000000070000000800000009000000'
+  - Name:            .text
+    Type:            SHT_PROGBITS
+    Flags:           [ SHF_ALLOC, SHF_EXECINSTR ]
+    AddressAlign:    0x0000000000000004
+    Content:         80B400AF00231846BD465DF8047B704780B582B000AF3B1D1846FFF7FEFFFFF7FEFFFFF7FEFF0420FFF7FEFF0346184601230360002240F20001C0F20001FFF7FEFF3B1D1846FFF7FEFFFFF7FEFF00BF
+  - Name:            .rel.text
+    Type:            SHT_REL
+    Link:            .symtab
+    AddressAlign:    0x0000000000000004
+    Info:            .text
+    Relocations:     
+      - Offset:          0x000000000000001A
+        Symbol:          _ZN1AC1Ev
+        Type:            R_ARM_THM_CALL
+      - Offset:          0x000000000000001E
+        Symbol:          _Z1gv
+        Type:            R_ARM_THM_CALL
+      - Offset:          0x0000000000000022
+        Symbol:          _Z1gv
+        Type:            R_ARM_THM_CALL
+      - Offset:          0x0000000000000028
+        Symbol:          __cxa_allocate_exception
+        Type:            R_ARM_THM_CALL
+      - Offset:          0x0000000000000036
+        Symbol:          _ZTIi
+        Type:            R_ARM_THM_MOVW_ABS_NC
+      - Offset:          0x000000000000003A
+        Symbol:          _ZTIi
+        Type:            R_ARM_THM_MOVT_ABS
+      - Offset:          0x000000000000003E
+        Symbol:          __cxa_throw
+        Type:            R_ARM_THM_CALL
+      - Offset:          0x0000000000000046
+        Symbol:          _ZN1AD1Ev
+        Type:            R_ARM_THM_CALL
+      - Offset:          0x000000000000004A
+        Symbol:          __cxa_end_cleanup
+        Type:            R_ARM_THM_CALL
+  - Name:            .data
+    Type:            SHT_PROGBITS
+    Flags:           [ SHF_WRITE, SHF_ALLOC ]
+    AddressAlign:    0x0000000000000001
+    Content:         ''
+  - Name:            .bss
+    Type:            SHT_NOBITS
+    Flags:           [ SHF_WRITE, SHF_ALLOC ]
+    AddressAlign:    0x0000000000000001
+    Content:         ''
+  - Name:            .text._ZN1AC2Ev
+    Type:            SHT_PROGBITS
+    Flags:           [ SHF_ALLOC, SHF_EXECINSTR, SHF_GROUP ]
+    AddressAlign:    0x0000000000000004
+    Content:         80B483B000AF78607B6818460C37BD465DF8047B704700BF
+  - Name:            .ARM.extab.text._ZN1AC2Ev
+    Type:            SHT_PROGBITS
+    Flags:           [ SHF_ALLOC, SHF_GROUP ]
+    AddressAlign:    0x0000000000000001
+    Content:         ''
+  - Name:            .ARM.exidx.text._ZN1AC2Ev
+    Type:            SHT_ARM_EXIDX
+    Flags:           [ SHF_ALLOC, SHF_LINK_ORDER, SHF_GROUP ]
+    Link:            .text._ZN1AC2Ev
+    AddressAlign:    0x0000000000000004
+    Content:         '0000000001000000'
+  - Name:            .rel.ARM.exidx.text._ZN1AC2Ev
+    Type:            SHT_REL
+    Link:            .symtab
+    AddressAlign:    0x0000000000000004
+    Info:            .ARM.exidx.text._ZN1AC2Ev
+    Relocations:     
+      - Offset:          0x0000000000000000
+        Symbol:          .text._ZN1AC2Ev
+        Type:            R_ARM_PREL31
+  - Name:            .text._ZN1AD2Ev
+    Type:            SHT_PROGBITS
+    Flags:           [ SHF_ALLOC, SHF_EXECINSTR, SHF_GROUP ]
+    AddressAlign:    0x0000000000000004
+    Content:         80B483B000AF78607B6818460C37BD465DF8047B704700BF
+  - Name:            .ARM.extab.text._ZN1AD2Ev
+    Type:            SHT_PROGBITS
+    Flags:           [ SHF_ALLOC, SHF_GROUP ]
+    AddressAlign:    0x0000000000000001
+    Content:         ''
+  - Name:            .ARM.exidx.text._ZN1AD2Ev
+    Type:            SHT_ARM_EXIDX
+    Flags:           [ SHF_ALLOC, SHF_LINK_ORDER, SHF_GROUP ]
+    Link:            .text._ZN1AD2Ev
+    AddressAlign:    0x0000000000000004
+    Content:         '0000000001000000'
+  - Name:            .rel.ARM.exidx.text._ZN1AD2Ev
+    Type:            SHT_REL
+    Link:            .symtab
+    AddressAlign:    0x0000000000000004
+    Info:            .ARM.exidx.text._ZN1AD2Ev
+    Relocations:     
+      - Offset:          0x0000000000000000
+        Symbol:          .text._ZN1AD2Ev
+        Type:            R_ARM_PREL31
+  - Name:            .ARM.extab
+    Type:            SHT_PROGBITS
+    Flags:           [ SHF_ALLOC ]
+    AddressAlign:    0x0000000000000004
+    Content:         0000000084019701B0B0B008FFFF01080E2432003A040000
+  - Name:            .rel.ARM.extab
+    Type:            SHT_REL
+    Link:            .symtab
+    AddressAlign:    0x0000000000000004
+    Info:            .ARM.extab
+    Relocations:     
+      - Offset:          0x0000000000000000
+        Symbol:          __gxx_personality_v0
+        Type:            R_ARM_PREL31
+  - Name:            .ARM.exidx
+    Type:            SHT_ARM_EXIDX
+    Flags:           [ SHF_ALLOC, SHF_LINK_ORDER ]
+    Link:            .text
+    AddressAlign:    0x0000000000000004
+    Content:         '00000000010000001000000000000000'
+  - Name:            .rel.ARM.exidx
+    Type:            SHT_REL
+    Link:            .symtab
+    AddressAlign:    0x0000000000000004
+    Info:            .ARM.exidx
+    Relocations:     
+      - Offset:          0x0000000000000000
+        Symbol:          .text
+        Type:            R_ARM_PREL31
+      - Offset:          0x0000000000000008
+        Symbol:          .text
+        Type:            R_ARM_PREL31
+      - Offset:          0x000000000000000C
+        Symbol:          .ARM.extab
+        Type:            R_ARM_PREL31
+  - Name:            .comment
+    Type:            SHT_PROGBITS
+    Flags:           [ SHF_MERGE, SHF_STRINGS ]
+    AddressAlign:    0x0000000000000001
+    Content:         004743433A202863726F7373746F6F6C2D4E47206C696E61726F2D312E31332E312D342E392D323031342E3039202D204C696E61726F2047434320342E392D323031342E30392920342E392E32203230313430393034202870726572656C656173652900
+  - Name:            .note.GNU-stack
+    Type:            SHT_PROGBITS
+    AddressAlign:    0x0000000000000001
+    Content:         ''
+  - Name:            .ARM.attributes
+    Type:            SHT_ARM_ATTRIBUTES
+    AddressAlign:    0x0000000000000001
+    Content:         4134000000616561626900012A00000005372D4100060A0741080109020A041204140115011703180119011A021B031C011E062201
+Symbols:         
+  Local:           
+    - Name:            test.cpp
+      Type:            STT_FILE
+    - Name:            .text
+      Type:            STT_SECTION
+      Section:         .text
+    - Name:            .data
+      Type:            STT_SECTION
+      Section:         .data
+    - Name:            .bss
+      Type:            STT_SECTION
+      Section:         .bss
+    - Name:            .text._ZN1AC2Ev
+      Type:            STT_SECTION
+      Section:         .text._ZN1AC2Ev
+    - Name:            .ARM.extab.text._ZN1AC2Ev
+      Type:            STT_SECTION
+      Section:         .ARM.extab.text._ZN1AC2Ev
+    - Name:            .ARM.exidx.text._ZN1AC2Ev
+      Type:            STT_SECTION
+      Section:         .ARM.exidx.text._ZN1AC2Ev
+    - Name:            .text._ZN1AD2Ev
+      Type:            STT_SECTION
+      Section:         .text._ZN1AD2Ev
+    - Name:            '$t'
+      Section:         .text._ZN1AD2Ev
+    - Name:            .ARM.extab.text._ZN1AD2Ev
+      Type:            STT_SECTION
+      Section:         .ARM.extab.text._ZN1AD2Ev
+    - Name:            .ARM.exidx.text._ZN1AD2Ev
+      Type:            STT_SECTION
+      Section:         .ARM.exidx.text._ZN1AD2Ev
+    - Name:            '$d'
+      Section:         .ARM.exidx.text._ZN1AD2Ev
+    - Name:            .ARM.extab
+      Type:            STT_SECTION
+      Section:         .ARM.extab
+    - Name:            .ARM.exidx
+      Type:            STT_SECTION
+      Section:         .ARM.exidx
+    - Name:            .note.GNU-stack
+      Type:            STT_SECTION
+      Section:         .note.GNU-stack
+    - Name:            _ZN1AC5Ev
+      Section:         .group
+    - Name:            _ZN1AD5Ev
+      Section:         .group
+    - Name:            .comment
+      Type:            STT_SECTION
+      Section:         .comment
+    - Name:            .ARM.attributes
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+      Section:         .ARM.attributes
+    - Name:            .group
+      Type:            STT_SECTION
+      Section:         .group
+  Global:          
+    - Name:            __gxx_personality_v0
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+      Value:           0x0000000000000001
+      Size:            0x0000000000000010
+    - Name:            _Z1fv
+      Type:            STT_FUNC
+      Section:         .text
+      Value:           0x0000000000000011
+      Size:            0x000000000000003E
+    - Name:            _Z1gv
+    - Name:            __cxa_allocate_exception
+    - Name:            _ZTIi
+    - Name:            __cxa_throw
+    - Name:            __cxa_end_cleanup
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+      Section:         .text._ZN1AC2Ev
+      Value:           0x0000000000000001
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+      Value:           0x0000000000000001
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+...

test/elf/ARM/rel-rel32.test

+# Check handling of R_ARM_REL32 relocation.
+# RUN: yaml2obj -format=elf %s > %t-o.o
+# RUN: lld -flavor gnu -target arm -m armelf_linux_eabi -Bstatic \
+# RUN: --noinhibit-exec %t-o.o -o %t
+# RUN: llvm-objdump -s -t %t | FileCheck %s
+
+# CHECK: Contents of section .text:
+# CHECK-NEXT: 400074 80b400af 880f0000
+# CHECK: SYMBOL TABLE:
+# CHECK: 00400074 g     F .text 00000004 main
+# CHECK: 00401000 g       .bss  00000004 _myref
+
+---
+---
+FileHeader:      
+  Class:           ELFCLASS32
+  Data:            ELFDATA2LSB
+  Type:            ET_REL
+  Machine:         EM_ARM
+  Flags:           [ EF_ARM_EABI_VER5 ]
+Sections:        
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+    Flags:           [ SHF_ALLOC, SHF_EXECINSTR ]
+    AddressAlign:    0x0000000000000004
+    Content:         80B400AF0000000000231846BD465DF8047B7047
+  - Name:            .rel.text
+    Type:            SHT_REL
+    Link:            .symtab
+    AddressAlign:    0x0000000000000004
+    Info:            .text
+    Relocations:     
+      - Offset:          0x0000000000000004
+        Symbol:          _myref
+        Type:            R_ARM_REL32
+  - Name:            .data
+    Type:            SHT_PROGBITS
+    Flags:           [ SHF_WRITE, SHF_ALLOC ]
+    AddressAlign:    0x0000000000000001
+    Content:         ''
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+    AddressAlign:    0x0000000000000004
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+Symbols:         
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+      Value:           0x0000000000000008
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+      Section:         .comment
+    - Name:            .ARM.attributes
+      Type:            STT_SECTION
+      Section:         .ARM.attributes
+  Global:          
+    - Name:            _myref
+      Type:            STT_OBJECT
+      Section:         .bss
+      Size:            0x0000000000000004
+    - Name:            main
+      Type:            STT_FUNC
+      Section:         .text
+      Value:           0x0000000000000001
+      Size:            0x0000000000000014
+...

test/elf/ARM/rel-thm-jump11.test

+# Check handling of R_ARM_THM_JUMP11 relocation.
+# RUN: yaml2obj -format=elf %s > %t-o.o
+# RUN: lld -flavor gnu -target arm -m armelf_linux_eabi -Bstatic \
+# RUN: --noinhibit-exec %t-o.o -o %t
+# RUN: llvm-objdump -s -t %t | FileCheck %s
+
+# CHECK: Contents of section .text:
+# CHECK: 4001a4 0021c7e7
+# CHECK: SYMBOL TABLE:
+# CHECK: 00400138 g     F .text 00000060 __gnu_h2f_internal
+# CHECK: 004001a4 g     F .text 00000004 __gnu_h2f_alternative
+
+---
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+...