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[AArch64][GlobalISel] Emit TBZ for SGT cond branches against -1
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Authored by paquette on Feb 6 2020, 11:09 AM.

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Summary

When we have a G_BRCOND fed by a sgt compare against -1, we can just emit a TBZ.

This is similar to the code in AArch64TargetLowering::LowerBR_CC.

Also while we're here, properly scope the commutative constant check in selectCompareBranch, since it sometimes would call getConstantVRegValWithLookThrough twice.

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paquette created this revision.Feb 6 2020, 11:09 AM

LGTM.

llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
1235

Instead of "last bit" which can be ambiguous, say "msb" or sign bit.

1259

Add an assert about VRegVal being 0 here? At the very least it makes it clearer what the preconditions are for the code below.

1264–1265

Same thing here with 'last bit'.

aemerson accepted this revision.Feb 6 2020, 11:46 AM
This revision is now accepted and ready to land.Feb 6 2020, 11:46 AM
This revision was automatically updated to reflect the committed changes.