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Differential D74146

[SytemZ] Disable vector ABI when using option -march=arch[8|9|10]
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Authored by Kai on Feb 6 2020, 10:48 AM.

Details

Reviewers
uweigand
Commits
rGa5040d5ec97e: [SytemZ] Disable vector ABI when using option -march=arch[8|9|10]
Summary

When specifying -march=arch[8|9|10], those CPU types do NOT support the vector extension. In this case the vector ABI must be disabled. The generated data layout should NOT contain 64-v128.

Diff Detail

Event Timeline

Kai created this revision.Feb 6 2020, 10:48 AM
Herald added projects: Restricted Project, Restricted Project. · View Herald TranscriptFeb 6 2020, 10:48 AM
Herald added subscribers: llvm-commits, cfe-commits, hiraditya. · View Herald Transcript
uweigand added a comment.Feb 7 2020, 2:48 AM

LGTM, thanks!

uweigand accepted this revision.Feb 7 2020, 7:53 AM
This revision is now accepted and ready to land.Feb 7 2020, 7:53 AM
Closed by commit rGa5040d5ec97e: [SytemZ] Disable vector ABI when using option -march=arch[8|9|10] (authored by Kai). · Explain WhyFeb 10 2020, 1:26 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
clang/
test/
CodeGen/
12 lines
llvm/
lib/
Target/
SystemZ/
3 lines

Diff 243479

clang/test/CodeGen/target-data.c

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// ARC: target datalayout = "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-f32:32:32-i64:32-f64:32-a:0:32-n32" // ARC: target datalayout = "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-f32:32:32-i64:32-f64:32-a:0:32-n32"
// RUN: %clang_cc1 -triple hexagon-unknown -o - -emit-llvm %s | \ // RUN: %clang_cc1 -triple hexagon-unknown -o - -emit-llvm %s | \
// RUN: FileCheck %s -check-prefix=HEXAGON // RUN: FileCheck %s -check-prefix=HEXAGON
// HEXAGON: target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048" // HEXAGON: target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
// RUN: %clang_cc1 -triple s390x-unknown -o - -emit-llvm %s | \ // RUN: %clang_cc1 -triple s390x-unknown -o - -emit-llvm %s | \
// RUN: FileCheck %s -check-prefix=SYSTEMZ // RUN: FileCheck %s -check-prefix=SYSTEMZ
// RUN: %clang_cc1 -triple s390x-unknown -target-cpu z10 -o - -emit-llvm %s | \
// RUN: FileCheck %s -check-prefix=SYSTEMZ
// RUN: %clang_cc1 -triple s390x-unknown -target-cpu arch8 -o - -emit-llvm %s | \
// RUN: FileCheck %s -check-prefix=SYSTEMZ
// RUN: %clang_cc1 -triple s390x-unknown -target-cpu z196 -o - -emit-llvm %s | \
// RUN: FileCheck %s -check-prefix=SYSTEMZ
// RUN: %clang_cc1 -triple s390x-unknown -target-cpu arch9 -o - -emit-llvm %s | \
// RUN: FileCheck %s -check-prefix=SYSTEMZ
// RUN: %clang_cc1 -triple s390x-unknown -target-cpu zEC12 -o - -emit-llvm %s | \
// RUN: FileCheck %s -check-prefix=SYSTEMZ
// RUN: %clang_cc1 -triple s390x-unknown -target-cpu arch10 -o - -emit-llvm %s | \
// RUN: FileCheck %s -check-prefix=SYSTEMZ
// RUN: %clang_cc1 -triple s390x-unknown -target-cpu z13 -target-feature +soft-float -o - -emit-llvm %s | \ // RUN: %clang_cc1 -triple s390x-unknown -target-cpu z13 -target-feature +soft-float -o - -emit-llvm %s | \
// RUN: FileCheck %s -check-prefix=SYSTEMZ // RUN: FileCheck %s -check-prefix=SYSTEMZ
// SYSTEMZ: target datalayout = "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-a:8:16-n32:64" // SYSTEMZ: target datalayout = "E-m:e-i1:8:16-i8:8:16-i64:64-f128:64-a:8:16-n32:64"
// RUN: %clang_cc1 -triple s390x-unknown -target-cpu z13 -o - -emit-llvm %s | \ // RUN: %clang_cc1 -triple s390x-unknown -target-cpu z13 -o - -emit-llvm %s | \
// RUN: FileCheck %s -check-prefix=SYSTEMZ-VECTOR // RUN: FileCheck %s -check-prefix=SYSTEMZ-VECTOR
// RUN: %clang_cc1 -triple s390x-unknown -target-cpu arch11 -o - -emit-llvm %s | \ // RUN: %clang_cc1 -triple s390x-unknown -target-cpu arch11 -o - -emit-llvm %s | \
// RUN: FileCheck %s -check-prefix=SYSTEMZ-VECTOR // RUN: FileCheck %s -check-prefix=SYSTEMZ-VECTOR
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llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp

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// Determine whether we use the vector ABI. // Determine whether we use the vector ABI.
static bool UsesVectorABI(StringRef CPU, StringRef FS) { static bool UsesVectorABI(StringRef CPU, StringRef FS) {
// We use the vector ABI whenever the vector facility is avaiable. // We use the vector ABI whenever the vector facility is avaiable.
// This is the case by default if CPU is z13 or later, and can be // This is the case by default if CPU is z13 or later, and can be
// overridden via "[+-]vector" feature string elements. // overridden via "[+-]vector" feature string elements.
bool VectorABI = true; bool VectorABI = true;
bool SoftFloat = false; bool SoftFloat = false;
if (CPU.empty() || CPU == "generic" || if (CPU.empty() || CPU == "generic" ||
CPU == "z10" || CPU == "z196" || CPU == "zEC12") CPU == "z10" || CPU == "z196" || CPU == "zEC12" ||
CPU == "arch8" || CPU == "arch9" || CPU == "arch10")
VectorABI = false; VectorABI = false;
SmallVector<StringRef, 3> Features; SmallVector<StringRef, 3> Features;
FS.split(Features, ',', -1, false /* KeepEmpty */); FS.split(Features, ',', -1, false /* KeepEmpty */);
for (auto &Feature : Features) { for (auto &Feature : Features) {
if (Feature == "vector" || Feature == "+vector") if (Feature == "vector" || Feature == "+vector")
VectorABI = true; VectorABI = true;
if (Feature == "-vector") if (Feature == "-vector")
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