Details
Details
Diff Detail
Diff Detail
- Repository
- rG LLVM Github Monorepo
Paths
| Differential D73972
[ARM] Correct missing newline after outputting .tlsdescseq directive. ClosedPublic Authored by DavidSpickett on Feb 4 2020, 9:10 AM.
Details
Diff Detail
Event TimelineDavidSpickett added a parent revision: D73469: [ARM][AsmParser] Make assembly directives case insensitive.Feb 4 2020, 9:10 AM This revision is now accepted and ready to land.Feb 4 2020, 9:28 AM Closed by commit rGa05566c99419: [ARM] Correct missing newline after outputting .tlsdescseq directive. (authored by DavidSpickett). · Explain WhyFeb 4 2020, 9:44 AM This revision was automatically updated to reflect the committed changes.
Revision Contents
Diff 242360 llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
llvm/test/MC/ARM/directive-tlsdescseq.s
|