[X86] Use carry flag from add for (seteq (add X, -1), -1).

[craig.topper]

Summary

If we just subtracted 1 and are checking if the result is -1. We can use the carry flag from the ADD instead of an explicit CMP. I'm using the same checks for the add users as EmitTest.

Fixes PR44412

[craig.topper]

Invert the condition. Despite what the PR said, it should be jb to the top of the loop not jae. The original code condition was jne on a compare with -1. If the add produce a value != -1, then the carry flag is set since -1 plus anything but 0 will have unsigned overflow and produce a value other than -1. Only 0+-1 produces -1 and it does it without overflowing.

[spatel]

llvm/lib/Target/X86/X86ISelLowering.cpp

21692

Make this a static helper, so we're not duplicating the code in EmitTest()?
Also, can use a for-range loop?

for (SDNode *User : Op->uses())

llvm/test/CodeGen/X86/pr44412.ll

29–30

Add the sibling test to produce 'jae' by inverting the icmp or the branch labels?

[craig.topper]

Address review comments

[spatel]

LGTM

[xbolva00]

lg too

llvm/lib/Target/X86/X86ISelLowering.cpp

if (Op0.getOpcode() == X86ISD::SETCC) {
         CCode = X86::GetOppositeBranchCondition(CCode);
         X86CC = DAG.getTargetConstant(CCode, dl, MVT::i8);
       }
 
       return Op0.getOperand(1);
     }
   }
 
+  // Try to use the carry flag from the add in place of an separate CMP for:
+  // (seteq (add X, -1), -1). Similar for setne.
+  if (isAllOnesConstant(Op1) && Op0.getOpcode() == ISD::ADD &&
+      Op0.getOperand(1) == Op1 && (CC == ISD::SETEQ || CC == ISD::SETNE)) {
+    // Transform to an x86-specific ALU node with flags if there is a chance of
+    // using an RMW op or only the flags are used. Otherwise, leave
+    // the node alone and emit a 'cmp' instruction.
+    auto CheckAddUsers = [](SDValue Op) {
+      for (SDNode::use_iterator UI = Op.getNode()->use_begin(),
+             UE = Op.getNode()->use_end(); UI != UE; ++UI)
+        if (UI->getOpcode() != ISD::CopyToReg &&
+            UI->getOpcode() != ISD::SETCC &&
+            UI->getOpcode() != ISD::STORE)
+          return false;
+
+      return true;
+    };
+
+    if (CheckAddUsers(Op0)) {
+      SDVTList VTs = DAG.getVTList(Op0.getValueType(), MVT::i32);
+
+      SDValue New = DAG.getNode(X86ISD::ADD, dl, VTs, Op0.getOperand(0),
+                                Op0.getOperand(1));
+      DAG.ReplaceAllUsesOfValueWith(SDValue(Op0.getNode(), 0), New);
+      X86::CondCode CCode = CC == ISD::SETEQ ? X86::COND_AE : X86::COND_B;
+      X86CC = DAG.getTargetConstant(CCode, dl, MVT::i8);
+      return SDValue(New.getNode(), 1);
+    }
+  }
+
   bool IsFP = Op1.getSimpleValueType().isFloatingPoint();
   X86::CondCode CondCode = TranslateX86CC(CC, dl, IsFP, Op0, Op1, DAG);
   if (CondCode == X86::COND_INVALID)
     return SDValue();
 
   std::pair<SDValue, SDValue> Tmp =
       EmitCmp(Op0, Op1, CondCode, dl, DAG, Subtarget, Chain, IsSignaling);
   SDValue EFLAGS = Tmp.first;

llvm/test/CodeGen/X86/pr44412.ll

 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ;RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
 
 define void @bar(i32 %0, i32 %1) nounwind {
 ; CHECK-LABEL: bar:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    pushq %rbx
 ; CHECK-NEXT:    testl %edi, %edi
 ; CHECK-NEXT:    je .LBB0_3
 ; CHECK-NEXT:  # %bb.1: # %.preheader
 ; CHECK-NEXT:    movl %edi, %ebx
 ; CHECK-NEXT:    decl %ebx
 ; CHECK-NEXT:    .p2align 4, 0x90
 ; CHECK-NEXT:  .LBB0_2: # =>This Inner Loop Header: Depth=1
 ; CHECK-NEXT:    movl %ebx, %edi
 ; CHECK-NEXT:    callq foo
-; CHECK-NEXT:    decl %ebx
-; CHECK-NEXT:    cmpl $-1, %ebx
-; CHECK-NEXT:    jne .LBB0_2
+; CHECK-NEXT:    addl $-1, %ebx
+; CHECK-NEXT:    jb .LBB0_2
 ; CHECK-NEXT:  .LBB0_3:
 ; CHECK-NEXT:    popq %rbx
 ; CHECK-NEXT:    retq
   %3 = icmp eq i32 %0, 0
   br i1 %3, label %8, label %4
 
 4:                                                ; preds = %2, %4
   %5 = phi i32 [ %6, %4 ], [ %0, %2 ]
   %6 = add nsw i32 %5, -1
   tail call void @foo(i32 %6)
   %7 = icmp eq i32 %6, 0
   br i1 %7, label %8, label %4
 
 8:                                                ; preds = %4, %2
   ret void
 }
 declare void @foo(i32)