Avoid PT_LOAD to have overlapping p_offset ranges on EM_AMDGPU

[dineshkb-amd]

Summary

Changes introduced in commit https://llvm.org/svn/llvm-project/lld/trunk@370180 allows PT_LOAD to have overlapping p_offset ranges on EM_AMDGPU and EM_SPARCV9. However this is introducing crashes in an AMD internal test cases. Thus is selectively disable for AMDGPU.

The test case is not included as it requires elaborate setup and has several application layers.

[MaskRay]

You can work around your internal tests with -z separate-code, instead of disabling the feature in the code.

[MaskRay]

Ping @dineshkb-amd and @msearles.

[bcain]

Is this a permanent constraint for AMDGPU or just a temporary workaround? If the latter, it's best to annotate that's the case.

If it is a permanent constraint, can it be described as a quality of the target instead of a guard based on a specific target?

ELF/Writer.cpp

2244

This identifier name is clearer if it's more explicit about the meaning. e.g. EnableAlignment, EnableAddrExpr or TargetMachineSupportsAlignment.

[MaskRay]

In D68712#1722274, @bcain wrote:

Is this a permanent constraint for AMDGPU or just a temporary workaround? If the latter, it's best to annotate that's the case.

If it is a permanent constraint, can it be described as a quality of the target instead of a guard based on a specific target?

@dineshkb-amd does not respond. My understanding is that AMD has one or a few tests that rely on the non-overlapping p_offset property. I think @dineshkb-amd should just work around that particular test and don't change lld code at all.

[dineshkb-amd]

Apologies for the late reply, the change is accommodated internally.

ELF/Writer.cpp

if (cmd && !cmd->addrExpr) {
       // the next maximum page size boundary on transitions between executable
       // and non-executable segments.
       //
       // SHT_LLVM_PART_EHDR marks the start of a partition. The partition
       // sections will be extracted to a separate file. Align to the next
       // maximum page size boundary so that we can find the ELF header at the
       // start. We cannot benefit from overlapping p_offset ranges with the
       // previous segment anyway.
-      if (config->zSeparate == SeparateSegmentKind::Loadable ||
+      bool enable = config->emachine != EM_AMDGPU;
+
+      if (!enable || config->zSeparate == SeparateSegmentKind::Loadable ||
           (config->zSeparate == SeparateSegmentKind::Code && prev &&
            (prev->p_flags & PF_X) != (p->p_flags & PF_X)) ||
           cmd->type == SHT_LLVM_PART_EHDR)
         cmd->addrExpr = [] {
           return alignTo(script->getDot(), config->maxPageSize);
         };
       // PT_TLS is at the start of the first RW PT_LOAD. If `p` includes PT_TLS,
       // it must be the RW. Align to p_align(PT_TLS) to make sure

test/ELF/amdgpu-relocs.s

 foo:
   .quad temp2@rel64
   .size foo, 8
 
 # The relocation for local_var{0, 1, 2} and var should be resolved by the
 # linker.
 # CHECK: Relocations [
 # CHECK: .rela.dyn {
-# CHECK-NEXT: R_AMDGPU_RELATIVE64 - 0x3928
+# CHECK-NEXT: R_AMDGPU_RELATIVE64 - 0x3008
 # CHECK-NEXT: R_AMDGPU_ABS64 common_var0 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 common_var1 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 common_var2 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 extern_var0 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 extern_var1 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 extern_var2 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 global_var0 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 global_var1 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 global_var2 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 temp 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 weak_var0 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 weak_var1 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 weak_var2 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 weakref_alias_var0 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 weakref_alias_var1 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 weakref_alias_var2 0x0
 # CHECK-NEXT: }
 # CHECK-NEXT: ]
 
-# NM: 0000000000003930 B common_var0
-# NM: 0000000000003d30 B common_var1
-# NM: 0000000000004130 B common_var2
-# NM: 0000000000003928 d temp2
+# NM: 0000000000003010 B common_var0
+# NM: 0000000000003410 B common_var1
+# NM: 0000000000003810 B common_var2
+# NM: 0000000000003008 d temp2
 
-# temp2 - foo = 0x3928-0x768 = 0x31c0
+# temp2 - foo = 0x3008-0x768 = 0x28a0
 # HEX:      section '.rodata':
-# HEX-NEXT: 0x00000768 c0310000 00000000
+# HEX-NEXT: 0x00000768 a0280000 00000000
 
 # common_var2+4, common_var1+8, and common_var0+12.
 # HEX:      section 'nonalloc':
-# HEX-NEXT: 0x00000000 00000000 34410000 00000000 383d0000
-# HEX-NEXT: 0x00000010 00000000 3c390000
+# HEX-NEXT: 0x00000000 00000000 14380000 00000000 18340000
+# HEX-NEXT: 0x00000010 00000000 1c300000