[IfConversion] Correctly handle cases where analyzeBranch fails.

[efriedma]

Summary

If analyzeBranch fails, on some targets, the out parameters point to some blocks in the function. But we can't use that information, so make sure to clear it out. (In some places in IfConversion, we assume that any block with a TrueBB is analyzable.)

The change to the testcase makes it trigger a bug on builds without this fix: IfConvertDiamond tries to perform a followup "merge" operation, which isn't legal, and we somehow end up with a branch to a deleted MBB. I'm not sure how this doesn't crash the compiler.

Fixes https://bugs.llvm.org/show_bug.cgi?id=42012

[nickdesaulniers]

FWIW, I verified that this patch fixes pr/42012 and the test case pases. Thanks @eli.friedman !

[hans]

Reviewers, please try to prioritize this one, since it's currently the last patch blocking llvm 9-rc4.

[dmgreen]

Sorry, yes, I think this makes sense over the alternative of analyzeBranch not setting TrueBB/FalseBB. LGTM

llvm/trunk/lib/CodeGen/IfConversion.cpp

 void IfConverter::AnalyzeBranches(BBInfo &BBI) {
   if (BBI.IsDone)
     return;
 
   BBI.TrueBB = BBI.FalseBB = nullptr;
   BBI.BrCond.clear();
   BBI.IsBrAnalyzable =
       !TII->analyzeBranch(*BBI.BB, BBI.TrueBB, BBI.FalseBB, BBI.BrCond);
+  if (!BBI.IsBrAnalyzable) {
+    BBI.TrueBB = nullptr;
+    BBI.FalseBB = nullptr;
+    BBI.BrCond.clear();
+  }
+
   SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end());
   BBI.IsBrReversible = (RevCond.size() == 0) ||
       !TII->reverseBranchCondition(RevCond);
   BBI.HasFallThrough = BBI.IsBrAnalyzable && BBI.FalseBB == nullptr;
 
   if (BBI.BrCond.size()) {
     // No false branch. This BB must end with a conditional branch and a
     // fallthrough.

llvm/trunk/test/CodeGen/ARM/ifcvt-diamond-unanalyzable-common.mir

-# RUN: llc %s -o - -run-pass=if-converter | FileCheck %s
+# RUN: llc %s -o - -run-pass=if-converter -verify-machineinstrs | FileCheck %s
 # Make sure we correctly if-convert blocks containing an INLINEASM_BR.
 # CHECK: t2CMPri killed renamable $r2, 34
 # CHECK-NEXT: $r0 = t2MOVi 2, 1, $cpsr, $noreg
 # CHECK-NEXT: $r0 = t2MOVi 3, 0, killed $cpsr, $noreg, implicit killed $r0
 # CHECK-NEXT: tBL 14, $noreg, @fn2
 # CHECK-NEXT: INLINEASM_BR &"", 9, 13, 0, 13, blockaddress(@fn1, %ir-block.l_yes)
 # CHECK-NEXT: t2B %bb.1, 14, $noreg
 --- |
bb.2:
     liveins: $r1
   
     $r0 = t2MOVi 2, 14, $noreg, $noreg
     tBL 14, $noreg, @fn2, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit $r0, implicit $r1, implicit-def $sp, implicit-def dead $r0
     INLINEASM_BR &"", 9, 13, 0, 13, blockaddress(@fn1, %ir-block.l_yes)
     t2B %bb.3, 14, $noreg
   
   bb.3:
-    successors: %bb.4(0x80000000)
-  
     INLINEASM &"", 1
+    $sp = t2LDMIA_RET $sp, 14, $noreg, def $r4, def $pc
   
   bb.4.l_yes (address-taken):
     $sp = t2LDMIA_RET $sp, 14, $noreg, def $r4, def $pc
 
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