[NOT FOR REVIEW][NOT FOR COMMIT] X86 machine instruction counting

[lebedev.ri]

Summary

As discussed in D65148 (https://reviews.llvm.org/D65148#1658556)

$ cat /tmp/test.c 
int a();
int b();
int c(int d) {
    return (d < 0) ? a() : b();
}
$ ./bin/clang -o - -S -g0 -O3 /tmp/test.c -mllvm -print-after-all -mllvm -debug -mllvm -stats 2>&1 | tail -n 76
# End machine code for function c.

********** COUNT MACHINE INSTRUCTIONS: c **********
Found conditional branch instruction: JCC_1 %bb.1, 8, implicit $eflags

Found unconditional branch instruction: TAILJMPd64 @b, <regmask $bh $bl $bp $bph $bpl $bx $ebp $ebx $hbp $hbx $rbp $rbx $r12 $r13 $r14 $r15 $r12b $r13b $r14b $r15b $r12bh $r13bh $r14bh $r15bh $r12d $r13d $r14d $r15d $r12w $r13w $r14w $r15w $r12wh and 3 more...>, implicit $rsp, implicit $ssp, implicit $rsp, implicit $ssp, implicit killed $al

Found unconditional branch instruction: TAILJMPd64 @a, <regmask $bh $bl $bp $bph $bpl $bx $ebp $ebx $hbp $hbx $rbp $rbx $r12 $r13 $r14 $r15 $r12b $r13b $r14b $r15b $r12bh $r13bh $r14bh $r15bh $r12d $r13d $r14d $r15d $r12w $r13w $r14w $r15w $r12wh and 3 more...>, implicit $rsp, implicit $ssp, implicit $rsp, implicit $ssp, implicit killed $al

        discovered a new reachable node %bb.0
        discovered a new reachable node %bb.1
        discovered a new reachable node %bb.2
        .text
        .file   "test.c"
        .globl  c                       # -- Begin function c
        .p2align        4, 0x90
        .type   c,@function
c:                                      # @c
        .cfi_startproc
# %bb.0:                                # %entry
        xorl    %eax, %eax
        testl   %edi, %edi
        js      .LBB0_1
# %bb.2:                                # %cond.false
        jmp     b                       # TAILCALL
.LBB0_1:                                # %cond.true
        jmp     a                       # TAILCALL
.Lfunc_end0:
        .size   c, .Lfunc_end0-c
        .cfi_endproc
                                        # -- End function

        .ident  "clang version 10.0.0 ([e-mail]:LebedevRI/llvm-project.git 1cf013a6519b38fdc585e35bf241c069431be4ca)"
        .section        ".note.GNU-stack","",@progbits
        .addrsig
===-------------------------------------------------------------------------===
                          ... Statistics Collected ...
===-------------------------------------------------------------------------===

 5 asm-printer       - Number of machine instrs printed
 1 branch-folder     - Number of times common instructions are hoisted
 1 cgscc-passmgr     - Maximum CGSCCPassMgr iterations on one SCC
 2 codegenprepare    - Number of return instructions duplicated
 4 dagcombine        - Number of dag nodes combined
 3 globalopt         - Number of globals marked unnamed_addr
 2 instcombine       - Number of insts combined
 3 isel              - Number of blocks selected using DAG
14 isel              - Number of times dag isel has to try another path
 1 isel              - Number of entry blocks encountered
 1 machine-scheduler - Number of instr pairs fused
 1 mem2reg           - Number of alloca's promoted with a single store
 1 prologepilog      - Number of functions seen in PEI
 1 regalloc          - Number of registers assigned
 2 regalloc          - Number of instructions deleted by DCE
 1 regalloc          - Number of identity moves eliminated after rewriting
 2 regalloc          - Number of instructions re-materialized
 2 regalloc          - Number of shrinkToUses called
 2 regalloc          - Number of cross class joins performed
 2 regalloc          - Number of interval joins performed
 1 shrink-wrap       - Number of functions
 1 sroa              - Maximum number of partitions per alloca
 2 sroa              - Maximum number of uses of a partition
 2 sroa              - Number of alloca partition uses rewritten
 1 sroa              - Number of alloca partitions formed
 1 sroa              - Number of allocas analyzed for replacement
 2 sroa              - Number of instructions deleted
 1 sroa              - Number of allocas promoted to SSA values
 1 stackmaps         - Number of functions skipped
 1 stackmaps         - Number of functions visited
 2 x86-isel          - Number of tail calls
 1 x86-mi-counting   - Number of conditional branch instructions
 3 x86-mi-counting   - Number of machine basic blocks
 1 x86-mi-counting   - Number of machine functions
 5 x86-mi-counting   - Number of machine instructions
 2 x86-mi-counting   - Number of unconditional branch instructions

[craig.topper]

llvm/lib/Target/X86/X86CountMIAnalysis.cpp

202

Why VPCLMULQDQ?

203

VPCMOV is a very different instruction than CMOV_*. VPCMOV is "c ? a : b" evaluated independently for each bit. In IR it would be (c & a) | (~c & b)

211

Why is there a CMP in here?

[lebedev.ri]

Count vector blend separately, drop unrelated instructions.

llvm/lib/Target/X86/CMakeLists.txt

 
 set(sources
   X86AsmPrinter.cpp
   X86CallFrameOptimization.cpp
   X86CallingConv.cpp
   X86CallLowering.cpp
   X86CmovConversion.cpp
   X86CondBrFolding.cpp
+  X86CountMIAnalysis.cpp
   X86DomainReassignment.cpp
   X86DiscriminateMemOps.cpp
   X86ExpandPseudo.cpp
   X86FastISel.cpp
   X86FixupBWInsts.cpp
   X86FixupLEAs.cpp
   X86AvoidStoreForwardingBlocks.cpp
   X86FixupSetCC.cpp

llvm/lib/Target/X86/X86.h

 
 /// This pass ensures instructions featuring a memory operand
 /// have distinctive <LineNumber, Discriminator> (with respect to eachother)
 FunctionPass *createX86DiscriminateMemOpsPass();
 
 /// This pass applies profiling information to insert cache prefetches.
 FunctionPass *createX86InsertPrefetchPass();
 
+/// Return a pass that avoids creating store forward block issues in the
+/// hardware.
+FunctionPass *createX86CountMIAnalysis();
+
 InstructionSelector *createX86InstructionSelector(const X86TargetMachine &TM,
                                                   X86Subtarget &,
                                                   X86RegisterBankInfo &);
 
 FunctionPass *createX86SpeculativeLoadHardeningPass();
 
 void initializeEvexToVexInstPassPass(PassRegistry &);
 void initializeFixupBWInstPassPass(PassRegistry &);
 void initializeFixupLEAPassPass(PassRegistry &);
 void initializeFPSPass(PassRegistry &);
 void initializeWinEHStatePassPass(PassRegistry &);
 void initializeX86AvoidSFBPassPass(PassRegistry &);
 void initializeX86CallFrameOptimizationPass(PassRegistry &);
 void initializeX86CmovConverterPassPass(PassRegistry &);
 void initializeX86CondBrFoldingPassPass(PassRegistry &);
 void initializeX86DomainReassignmentPass(PassRegistry &);
 void initializeX86ExecutionDomainFixPass(PassRegistry &);
 void initializeX86ExpandPseudoPass(PassRegistry &);
 void initializeX86FlagsCopyLoweringPassPass(PassRegistry &);
 void initializeX86OptimizeLEAPassPass(PassRegistry &);
 void initializeX86SpeculativeLoadHardeningPassPass(PassRegistry &);
+void initializeX86CountMIPass(PassRegistry &);
+
 } // End llvm namespace
 
 #endif

llvm/lib/Target/X86/X86CountMIAnalysis.cpp

+//===-- CountMIAnalysis.cpp - Count specific MachineInstrs 000000----------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This implements a machine function analysis pass that visits every machine
+// function, every machine basic block, every machine instruction,
+// and counts how many branches and conditional moves there are.
+//
+//===----------------------------------------------------------------------===//
+
+#include "X86InstrInfo.h"
+#include "X86Subtarget.h"
+#include "llvm/ADT/Statistic.h"
+#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/CodeGen/Passes.h"
+#include "llvm/CodeGen/TargetSubtargetInfo.h"
+#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/Debug.h"
+#include "llvm/Support/raw_ostream.h"
+
+using namespace llvm;
+
+#define DEBUG_TYPE "x86-mi-counting"
+
+STATISTIC(NumMachineFunctions, "Number of machine functions");
+STATISTIC(NumMachineBasicBlocks, "Number of machine basic blocks");
+STATISTIC(NumMachineInstructions, "Number of machine instructions");
+STATISTIC(NumUncondBR, "Number of unconditional branch instructions");
+STATISTIC(NumCondBR, "Number of conditional branch instructions");
+STATISTIC(NumCMOV, "Number of conditional move instructions");
+STATISTIC(NumVecCMOV, "Number of vector conditional move instructions");
+
+namespace {
+
+class X86CountMI : public MachineFunctionPass {
+public:
+  static char ID;
+
+  /// Default construct and initialize the pass.
+  X86CountMI() : MachineFunctionPass(ID) {}
+
+  /// Tell the pass manager which passes we depend on and what information we
+  /// preserve.
+  void getAnalysisUsage(AnalysisUsage &AU) const override {
+    // We preserve all information.
+    AU.setPreservesAll();
+    AU.setPreservesCFG();
+    MachineFunctionPass::getAnalysisUsage(AU);
+  }
+
+  /// Perform the counting of the interesting instructions
+  /// in the given machine function.
+  bool runOnMachineFunction(MachineFunction &MF) override;
+
+private:
+  /// Perform the counting of the interesting instructions
+  /// in the given machine basic block.
+  void runOnMachineBasicBlock(const MachineBasicBlock &MBB);
+
+  /// Perform the counting of the interesting instructions,
+  /// given the machine instruction.
+  void runOnMachineInstruction(const MachineInstr &MI);
+};
+
+} // namespace
+
+char X86CountMI::ID = 0;
+
+INITIALIZE_PASS(X86CountMI, DEBUG_TYPE, "X86 Machine Instruction counting",
+                false, false)
+
+bool X86CountMI::runOnMachineFunction(MachineFunction &MF) {
+  LLVM_DEBUG(dbgs() << "********** COUNT MACHINE INSTRUCTIONS: " << MF.getName()
+                    << " **********\n");
+  ++NumMachineFunctions;
+
+  for (const MachineBasicBlock &MBB : MF)
+    runOnMachineBasicBlock(MBB);
+
+  return false; // No changes done.
+}
+
+void X86CountMI::runOnMachineBasicBlock(const MachineBasicBlock &MBB) {
+  ++NumMachineBasicBlocks;
+
+  for (const MachineInstr &MI : MBB)
+    runOnMachineInstruction(MI);
+}
+
+void X86CountMI::runOnMachineInstruction(const MachineInstr &MI) {
+  ++NumMachineInstructions;
+
+  switch (MI.getOpcode()) {
+  case X86::JMP16m:
+  case X86::JMP16m_NT:
+  case X86::JMP16r:
+  case X86::JMP16r_NT:
+  case X86::JMP32m:
+  case X86::JMP32m_NT:
+  case X86::JMP32r:
+  case X86::JMP32r_NT:
+  case X86::JMP64m:
+  case X86::JMP64m_NT:
+  case X86::JMP64m_REX:
+  case X86::JMP64r:
+  case X86::JMP64r_NT:
+  case X86::JMP64r_REX:
+  case X86::JMP_1:
+  case X86::JMP_2:
+  case X86::JMP_4:
+  case X86::TAILJMPd:
+  case X86::TAILJMPd64:
+  case X86::TAILJMPm:
+  case X86::TAILJMPm64:
+  case X86::TAILJMPm64_REX:
+  case X86::TAILJMPr:
+  case X86::TAILJMPr64:
+  case X86::TAILJMPr64_REX:
+    LLVM_DEBUG(dbgs() << "Found unconditional branch instruction: " << MI
+                      << "\n");
+    ++NumUncondBR;
+    break;
+  case X86::JCXZ:
+  case X86::JECXZ:
+  case X86::JRCXZ:
+  case X86::TAILJMPd64_CC:
+  case X86::TAILJMPd_CC:
+  case X86::JCC_1:
+  case X86::JCC_2:
+  case X86::JCC_4:
+    LLVM_DEBUG(dbgs() << "Found conditional branch instruction: " << MI
+                      << "\n");
+    ++NumCondBR;
+    break;
+  case X86::CMOV16rm:
+  case X86::CMOV16rr:
+  case X86::CMOV32rm:
+  case X86::CMOV32rr:
+  case X86::CMOV64rm:
+  case X86::CMOV64rr:
+  case X86::CMOVBE_F:
+  case X86::CMOVBE_Fp32:
+  case X86::CMOVBE_Fp64:
+  case X86::CMOVBE_Fp80:
+  case X86::CMOVB_F:
+  case X86::CMOVB_Fp32:
+  case X86::CMOVB_Fp64:
+  case X86::CMOVB_Fp80:
+  case X86::CMOVE_F:
+  case X86::CMOVE_Fp32:
+  case X86::CMOVE_Fp64:
+  case X86::CMOVE_Fp80:
+  case X86::CMOVNBE_F:
+  case X86::CMOVNBE_Fp32:
+  case X86::CMOVNBE_Fp64:
+  case X86::CMOVNBE_Fp80:
+  case X86::CMOVNB_F:
+  case X86::CMOVNB_Fp32:
+  case X86::CMOVNB_Fp64:
+  case X86::CMOVNB_Fp80:
+  case X86::CMOVNE_F:
+  case X86::CMOVNE_Fp32:
+  case X86::CMOVNE_Fp64:
+  case X86::CMOVNE_Fp80:
+  case X86::CMOVNP_F:
+  case X86::CMOVNP_Fp32:
+  case X86::CMOVNP_Fp64:
+  case X86::CMOVNP_Fp80:
+  case X86::CMOVP_F:
+  case X86::CMOVP_Fp32:
+  case X86::CMOVP_Fp64:
+  case X86::CMOVP_Fp80:
+  case X86::CMOV_FR32:
+  case X86::CMOV_FR32X:
+  case X86::CMOV_FR64:
+  case X86::CMOV_FR64X:
+  case X86::CMOV_GR16:
+  case X86::CMOV_GR32:
+  case X86::CMOV_GR8:
+  case X86::CMOV_RFP32:
+  case X86::CMOV_RFP64:
+  case X86::CMOV_RFP80:
+    LLVM_DEBUG(dbgs() << "Found conditional move: " << MI << "\n");
+    ++NumCMOV;
+    break;
+  case X86::CMOV_VK16:
+  case X86::CMOV_VK2:
+  case X86::CMOV_VK32:
+  case X86::CMOV_VK4:
+  case X86::CMOV_VK64:
+  case X86::CMOV_VK8:
+  case X86::CMOV_VR128:
+  case X86::CMOV_VR128X:
+  case X86::CMOV_VR256:
+  case X86::CMOV_VR256X:
+  case X86::CMOV_VR512:
+  case X86::VPCLMULQDQrr:
+  case X86::VPCMOVYrmr:
+  case X86::VPCMOVYrrm:
+  case X86::VPCMOVYrrr:
+  case X86::VPCMOVYrrr_REV:
+  case X86::VPCMOVrmr:
+  case X86::VPCMOVrrm:
+  case X86::VPCMOVrrr:
+  case X86::VPCMOVrrr_REV:
+  case X86::VPCMPBZ128rmi:
+    LLVM_DEBUG(dbgs() << "Found vector conditional move: " << MI << "\n");
+    ++NumVecCMOV;
+    break;
+  }
+}
+
+FunctionPass *llvm::createX86CountMIAnalysis() { return new X86CountMI(); }

llvm/lib/Target/X86/X86TargetMachine.cpp

void X86PassConfig::addPreEmitPass2() {
   // correct CFA calculation rule where needed by inserting appropriate CFI
   // instructions.
   const Triple &TT = TM->getTargetTriple();
   const MCAsmInfo *MAI = TM->getMCAsmInfo();
   if (!TT.isOSDarwin() &&
       (!TT.isOSWindows() ||
        MAI->getExceptionHandlingType() == ExceptionHandling::DwarfCFI))
     addPass(createCFIInstrInserter());
+
+  addPass(createX86CountMIAnalysis());
 }
 
 std::unique_ptr<CSEConfigBase> X86PassConfig::getCSEConfig() const {
   return getStandardCSEConfigForOpt(TM->getOptLevel());
 }