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Differential D65085

AMDGPU/GlobalISel: Fix flat load/store of pointer types
ClosedPublic

Authored by arsenm on Jul 22 2019, 6:11 AM.

Details

Reviewers
tstellar
nhaehnle

Diff Detail

Event Timeline

arsenm created this revision.Jul 22 2019, 6:11 AM
Herald added subscribers: Petar.Avramovic, t-tye, tpr and 6 others. · View Herald TranscriptJul 22 2019, 6:11 AM
tstellar accepted this revision.Jul 22 2019, 7:17 AM

LGTM.

This revision is now accepted and ready to land.Jul 22 2019, 7:17 AM
arsenm closed this revision.Jul 31 2019, 8:57 PM

r367513

Revision Contents

PathSize
lib/
Target/
AMDGPU/
9 lines
4 lines
4 lines
test/
CodeGen/
AMDGPU/
GlobalISel/
50 lines
50 lines
50 lines
50 lines

Diff 211073

lib/Target/AMDGPU/AMDGPU.td

//===-- AMDGPU.td - AMDGPU Tablegen files --------*- tablegen -*-===// //===-- AMDGPU.td - AMDGPU Tablegen files --------*- tablegen -*-===//
// //
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information. // See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
// //
//===------------------------------------------------------------===// //===------------------------------------------------------------===//
include "llvm/TableGen/SearchableTable.td" include "llvm/TableGen/SearchableTable.td"
include "llvm/Target/Target.td" include "llvm/Target/Target.td"
include "AMDGPUFeatures.td" include "AMDGPUFeatures.td"
def p0 : PtrValueType<i64, 0>;
def p1 : PtrValueType<i64, 1>;
def p2 : PtrValueType<i32, 2>;
def p3 : PtrValueType<i32, 3>;
def p4 : PtrValueType<i64, 4>;
def p5 : PtrValueType<i32, 5>;
def p6 : PtrValueType<i32, 6>;
class BoolToList<bit Value> { class BoolToList<bit Value> {
list<int> ret = !if(Value, [1]<int>, []<int>); list<int> ret = !if(Value, [1]<int>, []<int>);
} }
//===------------------------------------------------------------===// //===------------------------------------------------------------===//
// Subtarget Features (device properties) // Subtarget Features (device properties)
//===------------------------------------------------------------===// //===------------------------------------------------------------===//
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lib/Target/AMDGPU/AMDGPUGISel.td

//===-- AMDGPUGIsel.td - AMDGPU GlobalISel Patterns---------*- tablegen -*-===// //===-- AMDGPUGIsel.td - AMDGPU GlobalISel Patterns---------*- tablegen -*-===//
// //
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information. // See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
// //
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// This files contains patterns that should only be used by GlobalISel. For // This files contains patterns that should only be used by GlobalISel. For
// example patterns for V_* instructions that have S_* equivalents. // example patterns for V_* instructions that have S_* equivalents.
// SelectionDAG does not support selecting V_* instructions. // SelectionDAG does not support selecting V_* instructions.
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
include "AMDGPU.td" include "AMDGPU.td"
def p0 : PtrValueType<i64, 0>;
def p1 : PtrValueType<i64, 1>;
def p4 : PtrValueType<i64, 4>;
def sd_vsrc0 : ComplexPattern<i32, 1, "">; def sd_vsrc0 : ComplexPattern<i32, 1, "">;
def gi_vsrc0 : def gi_vsrc0 :
GIComplexOperandMatcher<s32, "selectVSRC0">, GIComplexOperandMatcher<s32, "selectVSRC0">,
GIComplexPatternEquiv<sd_vsrc0>; GIComplexPatternEquiv<sd_vsrc0>;
def sd_vcsrc : ComplexPattern<i32, 1, "">; def sd_vcsrc : ComplexPattern<i32, 1, "">;
def gi_vcsrc : def gi_vcsrc :
GIComplexOperandMatcher<s32, "selectVCSRC">, GIComplexOperandMatcher<s32, "selectVCSRC">,
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lib/Target/AMDGPU/SIRegisterInfo.td

Show First 20 Lines • Show All 346 Lines • ▼ Show 20 Linesdef TTMP0_TTMP1_TTMP2_TTMP3_TTMP4_TTMP5_TTMP6_TTMP7_TTMP8_TTMP9_TTMP10_TTMP11_TTMP12_TTMP13_TTMP14_TTMP15_gfx9_gfx10 :
TmpRegTuplesBase<0, 16, TmpRegTuplesBase<0, 16,
[TTMP0_gfx9_gfx10, TTMP1_gfx9_gfx10, TTMP2_gfx9_gfx10, TTMP3_gfx9_gfx10, [TTMP0_gfx9_gfx10, TTMP1_gfx9_gfx10, TTMP2_gfx9_gfx10, TTMP3_gfx9_gfx10,
TTMP4_gfx9_gfx10, TTMP5_gfx9_gfx10, TTMP6_gfx9_gfx10, TTMP7_gfx9_gfx10, TTMP4_gfx9_gfx10, TTMP5_gfx9_gfx10, TTMP6_gfx9_gfx10, TTMP7_gfx9_gfx10,
TTMP8_gfx9_gfx10, TTMP9_gfx9_gfx10, TTMP10_gfx9_gfx10, TTMP11_gfx9_gfx10, TTMP8_gfx9_gfx10, TTMP9_gfx9_gfx10, TTMP10_gfx9_gfx10, TTMP11_gfx9_gfx10,
TTMP12_gfx9_gfx10, TTMP13_gfx9_gfx10, TTMP14_gfx9_gfx10, TTMP15_gfx9_gfx10]>; TTMP12_gfx9_gfx10, TTMP13_gfx9_gfx10, TTMP14_gfx9_gfx10, TTMP15_gfx9_gfx10]>;
// VGPR 32-bit registers // VGPR 32-bit registers
// i16/f16 only on VI+ // i16/f16 only on VI+
def VGPR_32 : RegisterClass<"AMDGPU", [i32, f32, i16, f16, v2i16, v2f16], 32, def VGPR_32 : RegisterClass<"AMDGPU", [i32, f32, i16, f16, v2i16, v2f16, p2, p3, p5, p6], 32,
(add (sequence "VGPR%u", 0, 255))> { (add (sequence "VGPR%u", 0, 255))> {
let AllocationPriority = 1; let AllocationPriority = 1;
let Size = 32; let Size = 32;
} }
// VGPR 64-bit registers // VGPR 64-bit registers
def VGPR_64 : SIRegisterTuples<getSubRegs<2>.ret, VGPR_32, 255, 1, 2, "v">; def VGPR_64 : SIRegisterTuples<getSubRegs<2>.ret, VGPR_32, 255, 1, 2, "v">;
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def SReg_1024 : RegisterClass<"AMDGPU", [v32i32, v32f32], 32, def SReg_1024 : RegisterClass<"AMDGPU", [v32i32, v32f32], 32,
(add SGPR_1024)> { (add SGPR_1024)> {
let CopyCost = 16; let CopyCost = 16;
let AllocationPriority = 19; let AllocationPriority = 19;
} }
// Register class for all vector registers (VGPRs + Interploation Registers) // Register class for all vector registers (VGPRs + Interploation Registers)
def VReg_64 : RegisterClass<"AMDGPU", [i64, f64, v2i32, v2f32, v4f16, v4i16], 32, def VReg_64 : RegisterClass<"AMDGPU", [i64, f64, v2i32, v2f32, v4f16, v4i16, p0, p1, p4], 32,
(add VGPR_64)> { (add VGPR_64)> {
let Size = 64; let Size = 64;
// Requires 2 v_mov_b32 to copy // Requires 2 v_mov_b32 to copy
let CopyCost = 2; let CopyCost = 2;
let AllocationPriority = 2; let AllocationPriority = 2;
} }
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test/CodeGen/AMDGPU/GlobalISel/inst-select-load-flat.mir

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tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr0_vgpr1 liveins: $vgpr0_vgpr1
; GFX7-LABEL: name: load_flat_p3_from_4 ; GFX7-LABEL: name: load_flat_p3_from_4
; GFX7: liveins: $vgpr0_vgpr1 ; GFX7: liveins: $vgpr0_vgpr1
; GFX7: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX7: [[LOAD:%[0-9]+]]:vgpr_32(p3) = G_LOAD [[COPY]](p1) :: (load 4) ; GFX7: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4)
; GFX7: $vgpr0 = COPY [[LOAD]](p3) ; GFX7: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
; GFX8-LABEL: name: load_flat_p3_from_4 ; GFX8-LABEL: name: load_flat_p3_from_4
; GFX8: liveins: $vgpr0_vgpr1 ; GFX8: liveins: $vgpr0_vgpr1
; GFX8: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX8: [[LOAD:%[0-9]+]]:vgpr_32(p3) = G_LOAD [[COPY]](p1) :: (load 4) ; GFX8: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4)
; GFX8: $vgpr0 = COPY [[LOAD]](p3) ; GFX8: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
; GFX9-LABEL: name: load_flat_p3_from_4 ; GFX9-LABEL: name: load_flat_p3_from_4
; GFX9: liveins: $vgpr0_vgpr1 ; GFX9: liveins: $vgpr0_vgpr1
; GFX9: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX9: [[LOAD:%[0-9]+]]:vgpr_32(p3) = G_LOAD [[COPY]](p1) :: (load 4) ; GFX9: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4)
; GFX9: $vgpr0 = COPY [[LOAD]](p3) ; GFX9: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
; GFX10-LABEL: name: load_flat_p3_from_4 ; GFX10-LABEL: name: load_flat_p3_from_4
; GFX10: liveins: $vgpr0_vgpr1 ; GFX10: liveins: $vgpr0_vgpr1
; GFX10: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX10: $vcc_hi = IMPLICIT_DEF
; GFX10: [[LOAD:%[0-9]+]]:vgpr_32(p3) = G_LOAD [[COPY]](p1) :: (load 4) ; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX10: $vgpr0 = COPY [[LOAD]](p3) ; GFX10: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4)
; GFX10: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
%0:vgpr(p1) = COPY $vgpr0_vgpr1 %0:vgpr(p1) = COPY $vgpr0_vgpr1
%1:vgpr(p3) = G_LOAD %0 :: (load 4, align 4, addrspace 0) %1:vgpr(p3) = G_LOAD %0 :: (load 4, align 4, addrspace 0)
$vgpr0 = COPY %1 $vgpr0 = COPY %1
... ...
--- ---
name: load_flat_p1_from_8 name: load_flat_p1_from_8
legalized: true legalized: true
regBankSelected: true regBankSelected: true
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr0_vgpr1 liveins: $vgpr0_vgpr1
; GFX7-LABEL: name: load_flat_p1_from_8 ; GFX7-LABEL: name: load_flat_p1_from_8
; GFX7: liveins: $vgpr0_vgpr1 ; GFX7: liveins: $vgpr0_vgpr1
; GFX7: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX7: [[LOAD:%[0-9]+]]:vreg_64(p1) = G_LOAD [[COPY]](p1) :: (load 8) ; GFX7: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 8)
; GFX7: $vgpr0_vgpr1 = COPY [[LOAD]](p1) ; GFX7: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
; GFX8-LABEL: name: load_flat_p1_from_8 ; GFX8-LABEL: name: load_flat_p1_from_8
; GFX8: liveins: $vgpr0_vgpr1 ; GFX8: liveins: $vgpr0_vgpr1
; GFX8: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX8: [[LOAD:%[0-9]+]]:vreg_64(p1) = G_LOAD [[COPY]](p1) :: (load 8) ; GFX8: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 8)
; GFX8: $vgpr0_vgpr1 = COPY [[LOAD]](p1) ; GFX8: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
; GFX9-LABEL: name: load_flat_p1_from_8 ; GFX9-LABEL: name: load_flat_p1_from_8
; GFX9: liveins: $vgpr0_vgpr1 ; GFX9: liveins: $vgpr0_vgpr1
; GFX9: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX9: [[LOAD:%[0-9]+]]:vreg_64(p1) = G_LOAD [[COPY]](p1) :: (load 8) ; GFX9: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 8)
; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](p1) ; GFX9: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
; GFX10-LABEL: name: load_flat_p1_from_8 ; GFX10-LABEL: name: load_flat_p1_from_8
; GFX10: liveins: $vgpr0_vgpr1 ; GFX10: liveins: $vgpr0_vgpr1
; GFX10: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX10: $vcc_hi = IMPLICIT_DEF
; GFX10: [[LOAD:%[0-9]+]]:vreg_64(p1) = G_LOAD [[COPY]](p1) :: (load 8) ; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX10: $vgpr0_vgpr1 = COPY [[LOAD]](p1) ; GFX10: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 8)
; GFX10: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
%0:vgpr(p1) = COPY $vgpr0_vgpr1 %0:vgpr(p1) = COPY $vgpr0_vgpr1
%1:vgpr(p1) = G_LOAD %0 :: (load 8, align 8, addrspace 0) %1:vgpr(p1) = G_LOAD %0 :: (load 8, align 8, addrspace 0)
$vgpr0_vgpr1 = COPY %1 $vgpr0_vgpr1 = COPY %1
... ...
--- ---
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test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global.mir

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tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr0_vgpr1 liveins: $vgpr0_vgpr1
; GFX7-LABEL: name: load_global_p3_from_4 ; GFX7-LABEL: name: load_global_p3_from_4
; GFX7: liveins: $vgpr0_vgpr1 ; GFX7: liveins: $vgpr0_vgpr1
; GFX7: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX7: [[LOAD:%[0-9]+]]:vgpr_32(p3) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1) ; GFX7: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4, addrspace 1)
; GFX7: $vgpr0 = COPY [[LOAD]](p3) ; GFX7: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
; GFX8-LABEL: name: load_global_p3_from_4 ; GFX8-LABEL: name: load_global_p3_from_4
; GFX8: liveins: $vgpr0_vgpr1 ; GFX8: liveins: $vgpr0_vgpr1
; GFX8: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX8: [[LOAD:%[0-9]+]]:vgpr_32(p3) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1) ; GFX8: [[FLAT_LOAD_DWORD:%[0-9]+]]:vgpr_32 = FLAT_LOAD_DWORD [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 4, addrspace 1)
; GFX8: $vgpr0 = COPY [[LOAD]](p3) ; GFX8: $vgpr0 = COPY [[FLAT_LOAD_DWORD]]
; GFX9-LABEL: name: load_global_p3_from_4 ; GFX9-LABEL: name: load_global_p3_from_4
; GFX9: liveins: $vgpr0_vgpr1 ; GFX9: liveins: $vgpr0_vgpr1
; GFX9: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX9: [[LOAD:%[0-9]+]]:vgpr_32(p3) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1) ; GFX9: [[GLOBAL_LOAD_DWORD:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD [[COPY]], 0, 0, 0, 0, implicit $exec :: (load 4, addrspace 1)
; GFX9: $vgpr0 = COPY [[LOAD]](p3) ; GFX9: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD]]
; GFX10-LABEL: name: load_global_p3_from_4 ; GFX10-LABEL: name: load_global_p3_from_4
; GFX10: liveins: $vgpr0_vgpr1 ; GFX10: liveins: $vgpr0_vgpr1
; GFX10: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX10: $vcc_hi = IMPLICIT_DEF
; GFX10: [[LOAD:%[0-9]+]]:vgpr_32(p3) = G_LOAD [[COPY]](p1) :: (load 4, addrspace 1) ; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX10: $vgpr0 = COPY [[LOAD]](p3) ; GFX10: [[GLOBAL_LOAD_DWORD:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD [[COPY]], 0, 0, 0, 0, implicit $exec :: (load 4, addrspace 1)
; GFX10: $vgpr0 = COPY [[GLOBAL_LOAD_DWORD]]
%0:vgpr(p1) = COPY $vgpr0_vgpr1 %0:vgpr(p1) = COPY $vgpr0_vgpr1
%1:vgpr(p3) = G_LOAD %0 :: (load 4, align 4, addrspace 1) %1:vgpr(p3) = G_LOAD %0 :: (load 4, align 4, addrspace 1)
$vgpr0 = COPY %1 $vgpr0 = COPY %1
... ...
--- ---
name: load_global_p1_from_8 name: load_global_p1_from_8
legalized: true legalized: true
regBankSelected: true regBankSelected: true
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr0_vgpr1 liveins: $vgpr0_vgpr1
; GFX7-LABEL: name: load_global_p1_from_8 ; GFX7-LABEL: name: load_global_p1_from_8
; GFX7: liveins: $vgpr0_vgpr1 ; GFX7: liveins: $vgpr0_vgpr1
; GFX7: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX7: [[LOAD:%[0-9]+]]:vreg_64(p1) = G_LOAD [[COPY]](p1) :: (load 8, addrspace 1) ; GFX7: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 8, addrspace 1)
; GFX7: $vgpr0_vgpr1 = COPY [[LOAD]](p1) ; GFX7: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
; GFX8-LABEL: name: load_global_p1_from_8 ; GFX8-LABEL: name: load_global_p1_from_8
; GFX8: liveins: $vgpr0_vgpr1 ; GFX8: liveins: $vgpr0_vgpr1
; GFX8: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX8: [[LOAD:%[0-9]+]]:vreg_64(p1) = G_LOAD [[COPY]](p1) :: (load 8, addrspace 1) ; GFX8: [[FLAT_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = FLAT_LOAD_DWORDX2 [[COPY]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (load 8, addrspace 1)
; GFX8: $vgpr0_vgpr1 = COPY [[LOAD]](p1) ; GFX8: $vgpr0_vgpr1 = COPY [[FLAT_LOAD_DWORDX2_]]
; GFX9-LABEL: name: load_global_p1_from_8 ; GFX9-LABEL: name: load_global_p1_from_8
; GFX9: liveins: $vgpr0_vgpr1 ; GFX9: liveins: $vgpr0_vgpr1
; GFX9: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX9: [[LOAD:%[0-9]+]]:vreg_64(p1) = G_LOAD [[COPY]](p1) :: (load 8, addrspace 1) ; GFX9: [[GLOBAL_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = GLOBAL_LOAD_DWORDX2 [[COPY]], 0, 0, 0, 0, implicit $exec :: (load 8, addrspace 1)
; GFX9: $vgpr0_vgpr1 = COPY [[LOAD]](p1) ; GFX9: $vgpr0_vgpr1 = COPY [[GLOBAL_LOAD_DWORDX2_]]
; GFX10-LABEL: name: load_global_p1_from_8 ; GFX10-LABEL: name: load_global_p1_from_8
; GFX10: liveins: $vgpr0_vgpr1 ; GFX10: liveins: $vgpr0_vgpr1
; GFX10: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX10: $vcc_hi = IMPLICIT_DEF
; GFX10: [[LOAD:%[0-9]+]]:vreg_64(p1) = G_LOAD [[COPY]](p1) :: (load 8, addrspace 1) ; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX10: $vgpr0_vgpr1 = COPY [[LOAD]](p1) ; GFX10: [[GLOBAL_LOAD_DWORDX2_:%[0-9]+]]:vreg_64 = GLOBAL_LOAD_DWORDX2 [[COPY]], 0, 0, 0, 0, implicit $exec :: (load 8, addrspace 1)
; GFX10: $vgpr0_vgpr1 = COPY [[GLOBAL_LOAD_DWORDX2_]]
%0:vgpr(p1) = COPY $vgpr0_vgpr1 %0:vgpr(p1) = COPY $vgpr0_vgpr1
%1:vgpr(p1) = G_LOAD %0 :: (load 8, align 8, addrspace 1) %1:vgpr(p1) = G_LOAD %0 :: (load 8, align 8, addrspace 1)
$vgpr0_vgpr1 = COPY %1 $vgpr0_vgpr1 = COPY %1
... ...
--- ---
▲ Show 20 Lines • Show All 1,161 Lines • Show Last 20 Lines

test/CodeGen/AMDGPU/GlobalISel/inst-select-store-flat.mir

Show First 20 Lines • Show All 531 Lines • ▼ Show 20 Lines
regBankSelected: true regBankSelected: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX7-LABEL: name: store_flat_p1 ; GFX7-LABEL: name: store_flat_p1
; GFX7: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 ; GFX7: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX7: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX7: [[COPY1:%[0-9]+]]:vgpr(p1) = COPY $vgpr2_vgpr3 ; GFX7: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
; GFX7: G_STORE [[COPY1]](p1), [[COPY]](p1) :: (store 8) ; GFX7: FLAT_STORE_DWORDX2 [[COPY]], [[COPY1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 8)
; GFX8-LABEL: name: store_flat_p1 ; GFX8-LABEL: name: store_flat_p1
; GFX8: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 ; GFX8: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX8: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX8: [[COPY1:%[0-9]+]]:vgpr(p1) = COPY $vgpr2_vgpr3 ; GFX8: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
; GFX8: G_STORE [[COPY1]](p1), [[COPY]](p1) :: (store 8) ; GFX8: FLAT_STORE_DWORDX2 [[COPY]], [[COPY1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 8)
; GFX9-LABEL: name: store_flat_p1 ; GFX9-LABEL: name: store_flat_p1
; GFX9: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 ; GFX9: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX9: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX9: [[COPY1:%[0-9]+]]:vgpr(p1) = COPY $vgpr2_vgpr3 ; GFX9: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
; GFX9: G_STORE [[COPY1]](p1), [[COPY]](p1) :: (store 8) ; GFX9: FLAT_STORE_DWORDX2 [[COPY]], [[COPY1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 8)
; GFX10-LABEL: name: store_flat_p1 ; GFX10-LABEL: name: store_flat_p1
; GFX10: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 ; GFX10: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX10: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX10: $vcc_hi = IMPLICIT_DEF
; GFX10: [[COPY1:%[0-9]+]]:vgpr(p1) = COPY $vgpr2_vgpr3 ; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX10: G_STORE [[COPY1]](p1), [[COPY]](p1) :: (store 8) ; GFX10: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
; GFX10: FLAT_STORE_DWORDX2 [[COPY]], [[COPY1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 8)
%0:vgpr(p1) = COPY $vgpr0_vgpr1 %0:vgpr(p1) = COPY $vgpr0_vgpr1
%1:vgpr(p1) = COPY $vgpr2_vgpr3 %1:vgpr(p1) = COPY $vgpr2_vgpr3
G_STORE %1, %0 :: (store 8, align 8, addrspace 0) G_STORE %1, %0 :: (store 8, align 8, addrspace 0)
... ...
--- ---
Show All 40 Lines
regBankSelected: true regBankSelected: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr0_vgpr1, $vgpr2 liveins: $vgpr0_vgpr1, $vgpr2
; GFX7-LABEL: name: store_flat_p3 ; GFX7-LABEL: name: store_flat_p3
; GFX7: liveins: $vgpr0_vgpr1, $vgpr2 ; GFX7: liveins: $vgpr0_vgpr1, $vgpr2
; GFX7: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX7: [[COPY1:%[0-9]+]]:vgpr(p3) = COPY $vgpr2 ; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
; GFX7: G_STORE [[COPY1]](p3), [[COPY]](p1) :: (store 4) ; GFX7: FLAT_STORE_DWORD [[COPY]], [[COPY1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4)
; GFX8-LABEL: name: store_flat_p3 ; GFX8-LABEL: name: store_flat_p3
; GFX8: liveins: $vgpr0_vgpr1, $vgpr2 ; GFX8: liveins: $vgpr0_vgpr1, $vgpr2
; GFX8: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX8: [[COPY1:%[0-9]+]]:vgpr(p3) = COPY $vgpr2 ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
; GFX8: G_STORE [[COPY1]](p3), [[COPY]](p1) :: (store 4) ; GFX8: FLAT_STORE_DWORD [[COPY]], [[COPY1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4)
; GFX9-LABEL: name: store_flat_p3 ; GFX9-LABEL: name: store_flat_p3
; GFX9: liveins: $vgpr0_vgpr1, $vgpr2 ; GFX9: liveins: $vgpr0_vgpr1, $vgpr2
; GFX9: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX9: [[COPY1:%[0-9]+]]:vgpr(p3) = COPY $vgpr2 ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
; GFX9: G_STORE [[COPY1]](p3), [[COPY]](p1) :: (store 4) ; GFX9: FLAT_STORE_DWORD [[COPY]], [[COPY1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4)
; GFX10-LABEL: name: store_flat_p3 ; GFX10-LABEL: name: store_flat_p3
; GFX10: liveins: $vgpr0_vgpr1, $vgpr2 ; GFX10: liveins: $vgpr0_vgpr1, $vgpr2
; GFX10: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX10: $vcc_hi = IMPLICIT_DEF
; GFX10: [[COPY1:%[0-9]+]]:vgpr(p3) = COPY $vgpr2 ; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX10: G_STORE [[COPY1]](p3), [[COPY]](p1) :: (store 4) ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
; GFX10: FLAT_STORE_DWORD [[COPY]], [[COPY1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4)
%0:vgpr(p1) = COPY $vgpr0_vgpr1 %0:vgpr(p1) = COPY $vgpr0_vgpr1
%1:vgpr(p3) = COPY $vgpr2 %1:vgpr(p3) = COPY $vgpr2
G_STORE %1, %0 :: (store 4, align 4, addrspace 0) G_STORE %1, %0 :: (store 4, align 4, addrspace 0)
... ...
--- ---
▲ Show 20 Lines • Show All 177 Lines • Show Last 20 Lines

test/CodeGen/AMDGPU/GlobalISel/inst-select-store-global.mir

Show First 20 Lines • Show All 531 Lines • ▼ Show 20 Lines
regBankSelected: true regBankSelected: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX7-LABEL: name: store_global_p1 ; GFX7-LABEL: name: store_global_p1
; GFX7: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 ; GFX7: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX7: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX7: [[COPY1:%[0-9]+]]:vgpr(p1) = COPY $vgpr2_vgpr3 ; GFX7: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
; GFX7: G_STORE [[COPY1]](p1), [[COPY]](p1) :: (store 8, addrspace 1) ; GFX7: FLAT_STORE_DWORDX2 [[COPY]], [[COPY1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 8, addrspace 1)
; GFX8-LABEL: name: store_global_p1 ; GFX8-LABEL: name: store_global_p1
; GFX8: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 ; GFX8: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX8: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX8: [[COPY1:%[0-9]+]]:vgpr(p1) = COPY $vgpr2_vgpr3 ; GFX8: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
; GFX8: G_STORE [[COPY1]](p1), [[COPY]](p1) :: (store 8, addrspace 1) ; GFX8: FLAT_STORE_DWORDX2 [[COPY]], [[COPY1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 8, addrspace 1)
; GFX9-LABEL: name: store_global_p1 ; GFX9-LABEL: name: store_global_p1
; GFX9: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 ; GFX9: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX9: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX9: [[COPY1:%[0-9]+]]:vgpr(p1) = COPY $vgpr2_vgpr3 ; GFX9: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
; GFX9: G_STORE [[COPY1]](p1), [[COPY]](p1) :: (store 8, addrspace 1) ; GFX9: GLOBAL_STORE_DWORDX2 [[COPY]], [[COPY1]], 0, 0, 0, 0, implicit $exec :: (store 8, addrspace 1)
; GFX10-LABEL: name: store_global_p1 ; GFX10-LABEL: name: store_global_p1
; GFX10: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 ; GFX10: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX10: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX10: $vcc_hi = IMPLICIT_DEF
; GFX10: [[COPY1:%[0-9]+]]:vgpr(p1) = COPY $vgpr2_vgpr3 ; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX10: G_STORE [[COPY1]](p1), [[COPY]](p1) :: (store 8, addrspace 1) ; GFX10: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
; GFX10: GLOBAL_STORE_DWORDX2 [[COPY]], [[COPY1]], 0, 0, 0, 0, implicit $exec :: (store 8, addrspace 1)
%0:vgpr(p1) = COPY $vgpr0_vgpr1 %0:vgpr(p1) = COPY $vgpr0_vgpr1
%1:vgpr(p1) = COPY $vgpr2_vgpr3 %1:vgpr(p1) = COPY $vgpr2_vgpr3
G_STORE %1, %0 :: (store 8, align 8, addrspace 1) G_STORE %1, %0 :: (store 8, align 8, addrspace 1)
... ...
--- ---
Show All 40 Lines
regBankSelected: true regBankSelected: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr0_vgpr1, $vgpr2 liveins: $vgpr0_vgpr1, $vgpr2
; GFX7-LABEL: name: store_global_p3 ; GFX7-LABEL: name: store_global_p3
; GFX7: liveins: $vgpr0_vgpr1, $vgpr2 ; GFX7: liveins: $vgpr0_vgpr1, $vgpr2
; GFX7: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX7: [[COPY1:%[0-9]+]]:vgpr(p3) = COPY $vgpr2 ; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
; GFX7: G_STORE [[COPY1]](p3), [[COPY]](p1) :: (store 4, addrspace 1) ; GFX7: FLAT_STORE_DWORD [[COPY]], [[COPY1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
; GFX8-LABEL: name: store_global_p3 ; GFX8-LABEL: name: store_global_p3
; GFX8: liveins: $vgpr0_vgpr1, $vgpr2 ; GFX8: liveins: $vgpr0_vgpr1, $vgpr2
; GFX8: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX8: [[COPY1:%[0-9]+]]:vgpr(p3) = COPY $vgpr2 ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
; GFX8: G_STORE [[COPY1]](p3), [[COPY]](p1) :: (store 4, addrspace 1) ; GFX8: FLAT_STORE_DWORD [[COPY]], [[COPY1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
; GFX9-LABEL: name: store_global_p3 ; GFX9-LABEL: name: store_global_p3
; GFX9: liveins: $vgpr0_vgpr1, $vgpr2 ; GFX9: liveins: $vgpr0_vgpr1, $vgpr2
; GFX9: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX9: [[COPY1:%[0-9]+]]:vgpr(p3) = COPY $vgpr2 ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
; GFX9: G_STORE [[COPY1]](p3), [[COPY]](p1) :: (store 4, addrspace 1) ; GFX9: GLOBAL_STORE_DWORD [[COPY]], [[COPY1]], 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
; GFX10-LABEL: name: store_global_p3 ; GFX10-LABEL: name: store_global_p3
; GFX10: liveins: $vgpr0_vgpr1, $vgpr2 ; GFX10: liveins: $vgpr0_vgpr1, $vgpr2
; GFX10: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1 ; GFX10: $vcc_hi = IMPLICIT_DEF
; GFX10: [[COPY1:%[0-9]+]]:vgpr(p3) = COPY $vgpr2 ; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
; GFX10: G_STORE [[COPY1]](p3), [[COPY]](p1) :: (store 4, addrspace 1) ; GFX10: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
; GFX10: GLOBAL_STORE_DWORD [[COPY]], [[COPY1]], 0, 0, 0, 0, implicit $exec :: (store 4, addrspace 1)
%0:vgpr(p1) = COPY $vgpr0_vgpr1 %0:vgpr(p1) = COPY $vgpr0_vgpr1
%1:vgpr(p3) = COPY $vgpr2 %1:vgpr(p3) = COPY $vgpr2
G_STORE %1, %0 :: (store 4, align 4, addrspace 1) G_STORE %1, %0 :: (store 4, align 4, addrspace 1)
... ...
--- ---
▲ Show 20 Lines • Show All 167 Lines • Show Last 20 Lines