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Differential D63987

GlobalISel: Try to widen merges with other merges
ClosedPublic

Authored by arsenm on Jul 1 2019, 5:29 AM.

Details

Reviewers
aemerson
paquette
aditya_nandakumar
Summary

If the requested source type an be used as a merge source type, create
a merge of merges. This avoids creating large, illegal extensions and
bit-ops directly to the result type.

Diff Detail

Event Timeline

arsenm created this revision.Jul 1 2019, 5:29 AM
Herald added subscribers: Petar.Avramovic, volkan, kristof.beyls and 4 others. · View Herald TranscriptJul 1 2019, 5:29 AM
paquette accepted this revision.Jul 1 2019, 9:52 AM

I think this seems reasonable. LGTM

This revision is now accepted and ready to land.Jul 1 2019, 9:52 AM
arsenm closed this revision.Jul 1 2019, 12:36 PM

r364841

Revision Contents

PathSize
lib/
CodeGen/
GlobalISel/
28 lines
test/
CodeGen/
AMDGPU/
GlobalISel/
250 lines

Diff 207262

lib/CodeGen/GlobalISel/LegalizerHelper.cpp

Show First 20 Lines • Show All 784 Lines • ▼ Show 20 LinesLegalizerHelper::widenScalarMergeValues(MachineInstr &MI, unsigned TypeIdx,
if (TypeIdx != 1) if (TypeIdx != 1)
return UnableToLegalize; return UnableToLegalize;
Register DstReg = MI.getOperand(0).getReg(); Register DstReg = MI.getOperand(0).getReg();
LLT DstTy = MRI.getType(DstReg); LLT DstTy = MRI.getType(DstReg);
if (!DstTy.isScalar()) if (!DstTy.isScalar())
return UnableToLegalize; return UnableToLegalize;
Register Src1 = MI.getOperand(1).getReg();
LLT SrcTy = MRI.getType(Src1);
int NumMerge = DstTy.getSizeInBits() / WideTy.getSizeInBits();
// Try to turn this into a merge of merges if we can use the requested the
// requested type as the source.
// TODO: Pad with undef if DstTy > WideTy
if (NumMerge > 1 && WideTy.getSizeInBits() % SrcTy.getSizeInBits() == 0) {
int PartsPerMerge = WideTy.getSizeInBits() / SrcTy.getSizeInBits();
SmallVector<Register, 4> Parts;
SmallVector<Register, 4> SubMerges;
for (int I = 0; I != NumMerge; ++I) {
for (int J = 0; J != PartsPerMerge; ++J)
Parts.push_back(MI.getOperand(I * PartsPerMerge + J + 1).getReg());
auto SubMerge = MIRBuilder.buildMerge(WideTy, Parts);
SubMerges.push_back(SubMerge.getReg(0));
Parts.clear();
}
MIRBuilder.buildMerge(DstReg, SubMerges);
MI.eraseFromParent();
return Legalized;
}
unsigned NumOps = MI.getNumOperands(); unsigned NumOps = MI.getNumOperands();
unsigned NumSrc = MI.getNumOperands() - 1; unsigned NumSrc = MI.getNumOperands() - 1;
unsigned PartSize = DstTy.getSizeInBits() / NumSrc; unsigned PartSize = DstTy.getSizeInBits() / NumSrc;
Register Src1 = MI.getOperand(1).getReg();
Register ResultReg = MIRBuilder.buildZExt(DstTy, Src1)->getOperand(0).getReg(); Register ResultReg = MIRBuilder.buildZExt(DstTy, Src1)->getOperand(0).getReg();
for (unsigned I = 2; I != NumOps; ++I) { for (unsigned I = 2; I != NumOps; ++I) {
const unsigned Offset = (I - 1) * PartSize; const unsigned Offset = (I - 1) * PartSize;
Register SrcReg = MI.getOperand(I).getReg(); Register SrcReg = MI.getOperand(I).getReg();
assert(MRI.getType(SrcReg) == LLT::scalar(PartSize)); assert(MRI.getType(SrcReg) == LLT::scalar(PartSize));
▲ Show 20 Lines • Show All 2,307 Lines • Show Last 20 Lines

test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir

Show First 20 Lines • Show All 71 Lines • ▼ Show 20 Lines
name: test_merge_s32_s8_s8_s8_s8 name: test_merge_s32_s8_s8_s8_s8
body: | body: |
bb.0: bb.0:
; CHECK-LABEL: name: test_merge_s32_s8_s8_s8_s8 ; CHECK-LABEL: name: test_merge_s32_s8_s8_s8_s8
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 ; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2 ; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 3 ; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 ; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY [[C]](s32) ; CHECK: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C4]] ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY [[C4]](s32)
; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C5]]
; CHECK: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C1]](s32) ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C4]] ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C6]]
; CHECK: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 ; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[AND]](s32)
; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C5]](s32) ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[C]](s32)
; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] ; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C6]]
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[C2]](s32) ; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[SHL]](s32)
; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C4]] ; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[COPY3]]
; CHECK: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 ; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[OR]](s32)
; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C6]](s32) ; CHECK: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[OR]], [[SHL1]] ; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[C7]](s32)
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[C3]](s32) ; CHECK: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C5]]
; CHECK: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[C4]] ; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C3]](s32)
; CHECK: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 24 ; CHECK: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C6]]
; CHECK: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND3]], [[C7]](s32) ; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND4]], [[AND3]](s32)
; CHECK: [[OR2:%[0-9]+]]:_(s32) = G_OR [[OR1]], [[SHL2]] ; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY [[C2]](s32)
; CHECK: $vgpr0 = COPY [[OR2]](s32) ; CHECK: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C6]]
; CHECK: [[COPY7:%[0-9]+]]:_(s32) = COPY [[SHL1]](s32)
; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND5]], [[COPY7]]
; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[OR1]](s32)
; CHECK: [[MV:%[0-9]+]]:_(s32) = G_MERGE_VALUES [[TRUNC]](s16), [[TRUNC1]](s16)
; CHECK: $vgpr0 = COPY [[MV]](s32)
%0:_(s8) = G_CONSTANT i8 0 %0:_(s8) = G_CONSTANT i8 0
%1:_(s8) = G_CONSTANT i8 1 %1:_(s8) = G_CONSTANT i8 1
%2:_(s8) = G_CONSTANT i8 2 %2:_(s8) = G_CONSTANT i8 2
%3:_(s8) = G_CONSTANT i8 3 %3:_(s8) = G_CONSTANT i8 3
%4:_(s32) = G_MERGE_VALUES %0, %1, %2, %3 %4:_(s32) = G_MERGE_VALUES %0, %1, %2, %3
$vgpr0 = COPY %4 $vgpr0 = COPY %4
... ...
Show All 35 Lines bb.0:
%3:_(s32) = COPY $vgpr3 %3:_(s32) = COPY $vgpr3
%4:_(s16) = G_TRUNC %0 %4:_(s16) = G_TRUNC %0
%5:_(s16) = G_TRUNC %1 %5:_(s16) = G_TRUNC %1
%6:_(s16) = G_TRUNC %2 %6:_(s16) = G_TRUNC %2
%7:_(s16) = G_TRUNC %3 %7:_(s16) = G_TRUNC %3
%8:_(s64) = G_MERGE_VALUES %4, %5, %6, %7 %8:_(s64) = G_MERGE_VALUES %4, %5, %6, %7
$vgpr1_vgpr2 = COPY %8 $vgpr1_vgpr2 = COPY %8
... ...
---
name: test_merge_s64_s8_s8_s8_s8_s8_s8_s8_s8
body: |
bb.0:
; CHECK-LABEL: name: test_merge_s64_s8_s8_s8_s8_s8_s8_s8_s8
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; CHECK: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 5
; CHECK: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 6
; CHECK: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 7
; CHECK: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; CHECK: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY [[C8]](s32)
; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C9]]
; CHECK: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C10]]
; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[AND]](s32)
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[C]](s32)
; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C10]]
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[SHL]](s32)
; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[COPY3]]
; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[OR]](s32)
; CHECK: [[C11:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[C11]](s32)
; CHECK: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C9]]
; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C3]](s32)
; CHECK: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C10]]
; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND4]], [[AND3]](s32)
; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY [[C2]](s32)
; CHECK: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C10]]
; CHECK: [[COPY7:%[0-9]+]]:_(s32) = COPY [[SHL1]](s32)
; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND5]], [[COPY7]]
; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[OR1]](s32)
; CHECK: [[C12:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; CHECK: [[COPY8:%[0-9]+]]:_(s32) = COPY [[C12]](s32)
; CHECK: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C9]]
; CHECK: [[COPY9:%[0-9]+]]:_(s32) = COPY [[C5]](s32)
; CHECK: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C10]]
; CHECK: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[AND6]](s32)
; CHECK: [[COPY10:%[0-9]+]]:_(s32) = COPY [[C4]](s32)
; CHECK: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C10]]
; CHECK: [[COPY11:%[0-9]+]]:_(s32) = COPY [[SHL2]](s32)
; CHECK: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[COPY11]]
; CHECK: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[OR2]](s32)
; CHECK: [[C13:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; CHECK: [[COPY12:%[0-9]+]]:_(s32) = COPY [[C13]](s32)
; CHECK: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C9]]
; CHECK: [[COPY13:%[0-9]+]]:_(s32) = COPY [[C7]](s32)
; CHECK: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C10]]
; CHECK: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[AND9]](s32)
; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[C6]](s32)
; CHECK: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C10]]
; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[SHL3]](s32)
; CHECK: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND11]], [[COPY15]]
; CHECK: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[OR3]](s32)
; CHECK: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[TRUNC]](s16), [[TRUNC1]](s16), [[TRUNC2]](s16), [[TRUNC3]](s16)
; CHECK: $vgpr0_vgpr1 = COPY [[MV]](s64)
%0:_(s8) = G_CONSTANT i8 0
%1:_(s8) = G_CONSTANT i8 1
%2:_(s8) = G_CONSTANT i8 2
%3:_(s8) = G_CONSTANT i8 3
%4:_(s8) = G_CONSTANT i8 4
%5:_(s8) = G_CONSTANT i8 5
%6:_(s8) = G_CONSTANT i8 6
%7:_(s8) = G_CONSTANT i8 7
%8:_(s64) = G_MERGE_VALUES %0, %1, %2, %3, %4, %5, %6, %7
$vgpr0_vgpr1 = COPY %8
...
---
name: test_merge_s96_s8_s8_s8_s8_s8_s8_s8_s8_s8_s8_s8_s8
body: |
bb.0:
; CHECK-LABEL: name: test_merge_s96_s8_s8_s8_s8_s8_s8_s8_s8_s8_s8_s8_s8
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; CHECK: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 5
; CHECK: [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 6
; CHECK: [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 7
; CHECK: [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; CHECK: [[C9:%[0-9]+]]:_(s32) = G_CONSTANT i32 9
; CHECK: [[C10:%[0-9]+]]:_(s32) = G_CONSTANT i32 10
; CHECK: [[C11:%[0-9]+]]:_(s32) = G_CONSTANT i32 11
; CHECK: [[C12:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; CHECK: [[C13:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY [[C12]](s32)
; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C13]]
; CHECK: [[C14:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C1]](s32)
; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C14]]
; CHECK: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[AND]](s32)
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[C]](s32)
; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C14]]
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[SHL]](s32)
; CHECK: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[COPY3]]
; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[OR]](s32)
; CHECK: [[C15:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; CHECK: [[COPY4:%[0-9]+]]:_(s32) = COPY [[C15]](s32)
; CHECK: [[AND3:%[0-9]+]]:_(s32) = G_AND [[COPY4]], [[C13]]
; CHECK: [[COPY5:%[0-9]+]]:_(s32) = COPY [[C3]](s32)
; CHECK: [[AND4:%[0-9]+]]:_(s32) = G_AND [[COPY5]], [[C14]]
; CHECK: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND4]], [[AND3]](s32)
; CHECK: [[COPY6:%[0-9]+]]:_(s32) = COPY [[C2]](s32)
; CHECK: [[AND5:%[0-9]+]]:_(s32) = G_AND [[COPY6]], [[C14]]
; CHECK: [[COPY7:%[0-9]+]]:_(s32) = COPY [[SHL1]](s32)
; CHECK: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND5]], [[COPY7]]
; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[OR1]](s32)
; CHECK: [[C16:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; CHECK: [[COPY8:%[0-9]+]]:_(s32) = COPY [[C16]](s32)
; CHECK: [[AND6:%[0-9]+]]:_(s32) = G_AND [[COPY8]], [[C13]]
; CHECK: [[COPY9:%[0-9]+]]:_(s32) = COPY [[C5]](s32)
; CHECK: [[AND7:%[0-9]+]]:_(s32) = G_AND [[COPY9]], [[C14]]
; CHECK: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[AND7]], [[AND6]](s32)
; CHECK: [[COPY10:%[0-9]+]]:_(s32) = COPY [[C4]](s32)
; CHECK: [[AND8:%[0-9]+]]:_(s32) = G_AND [[COPY10]], [[C14]]
; CHECK: [[COPY11:%[0-9]+]]:_(s32) = COPY [[SHL2]](s32)
; CHECK: [[OR2:%[0-9]+]]:_(s32) = G_OR [[AND8]], [[COPY11]]
; CHECK: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[OR2]](s32)
; CHECK: [[C17:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; CHECK: [[COPY12:%[0-9]+]]:_(s32) = COPY [[C17]](s32)
; CHECK: [[AND9:%[0-9]+]]:_(s32) = G_AND [[COPY12]], [[C13]]
; CHECK: [[COPY13:%[0-9]+]]:_(s32) = COPY [[C7]](s32)
; CHECK: [[AND10:%[0-9]+]]:_(s32) = G_AND [[COPY13]], [[C14]]
; CHECK: [[SHL3:%[0-9]+]]:_(s32) = G_SHL [[AND10]], [[AND9]](s32)
; CHECK: [[COPY14:%[0-9]+]]:_(s32) = COPY [[C6]](s32)
; CHECK: [[AND11:%[0-9]+]]:_(s32) = G_AND [[COPY14]], [[C14]]
; CHECK: [[COPY15:%[0-9]+]]:_(s32) = COPY [[SHL3]](s32)
; CHECK: [[OR3:%[0-9]+]]:_(s32) = G_OR [[AND11]], [[COPY15]]
; CHECK: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[OR3]](s32)
; CHECK: [[C18:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; CHECK: [[COPY16:%[0-9]+]]:_(s32) = COPY [[C18]](s32)
; CHECK: [[AND12:%[0-9]+]]:_(s32) = G_AND [[COPY16]], [[C13]]
; CHECK: [[COPY17:%[0-9]+]]:_(s32) = COPY [[C9]](s32)
; CHECK: [[AND13:%[0-9]+]]:_(s32) = G_AND [[COPY17]], [[C14]]
; CHECK: [[SHL4:%[0-9]+]]:_(s32) = G_SHL [[AND13]], [[AND12]](s32)
; CHECK: [[COPY18:%[0-9]+]]:_(s32) = COPY [[C8]](s32)
; CHECK: [[AND14:%[0-9]+]]:_(s32) = G_AND [[COPY18]], [[C14]]
; CHECK: [[COPY19:%[0-9]+]]:_(s32) = COPY [[SHL4]](s32)
; CHECK: [[OR4:%[0-9]+]]:_(s32) = G_OR [[AND14]], [[COPY19]]
; CHECK: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[OR4]](s32)
; CHECK: [[C19:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
; CHECK: [[COPY20:%[0-9]+]]:_(s32) = COPY [[C19]](s32)
; CHECK: [[AND15:%[0-9]+]]:_(s32) = G_AND [[COPY20]], [[C13]]
; CHECK: [[COPY21:%[0-9]+]]:_(s32) = COPY [[C11]](s32)
; CHECK: [[AND16:%[0-9]+]]:_(s32) = G_AND [[COPY21]], [[C14]]
; CHECK: [[SHL5:%[0-9]+]]:_(s32) = G_SHL [[AND16]], [[AND15]](s32)
; CHECK: [[COPY22:%[0-9]+]]:_(s32) = COPY [[C10]](s32)
; CHECK: [[AND17:%[0-9]+]]:_(s32) = G_AND [[COPY22]], [[C14]]
; CHECK: [[COPY23:%[0-9]+]]:_(s32) = COPY [[SHL5]](s32)
; CHECK: [[OR5:%[0-9]+]]:_(s32) = G_OR [[AND17]], [[COPY23]]
; CHECK: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[OR5]](s32)
; CHECK: [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[TRUNC]](s16), [[TRUNC1]](s16), [[TRUNC2]](s16), [[TRUNC3]](s16), [[TRUNC4]](s16), [[TRUNC5]](s16)
; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[MV]](s96)
%0:_(s8) = G_CONSTANT i8 0
%1:_(s8) = G_CONSTANT i8 1
%2:_(s8) = G_CONSTANT i8 2
%3:_(s8) = G_CONSTANT i8 3
%4:_(s8) = G_CONSTANT i8 4
%5:_(s8) = G_CONSTANT i8 5
%6:_(s8) = G_CONSTANT i8 6
%7:_(s8) = G_CONSTANT i8 7
%9:_(s8) = G_CONSTANT i8 8
%10:_(s8) = G_CONSTANT i8 9
%11:_(s8) = G_CONSTANT i8 10
%12:_(s8) = G_CONSTANT i8 11
%13:_(s96) = G_MERGE_VALUES %0, %1, %2, %3, %4, %5, %6, %7, %9, %10, %11, %12
$vgpr0_vgpr1_vgpr2 = COPY %13
...
---
name: test_merge_s96_s16_s16_s16_s16_s16_s16
body: |
bb.0:
; CHECK-LABEL: name: test_merge_s96_s16_s16_s16_s16_s16_s16
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s32)
; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[C1]](s32)
; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
; CHECK: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[C2]](s32)
; CHECK: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
; CHECK: [[TRUNC3:%[0-9]+]]:_(s16) = G_TRUNC [[C3]](s32)
; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
; CHECK: [[TRUNC4:%[0-9]+]]:_(s16) = G_TRUNC [[C4]](s32)
; CHECK: [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 5
; CHECK: [[TRUNC5:%[0-9]+]]:_(s16) = G_TRUNC [[C5]](s32)
; CHECK: [[MV:%[0-9]+]]:_(s96) = G_MERGE_VALUES [[TRUNC]](s16), [[TRUNC1]](s16), [[TRUNC2]](s16), [[TRUNC3]](s16), [[TRUNC4]](s16), [[TRUNC5]](s16)
; CHECK: $vgpr0_vgpr1_vgpr2 = COPY [[MV]](s96)
%0:_(s16) = G_CONSTANT i16 0
%1:_(s16) = G_CONSTANT i16 1
%2:_(s16) = G_CONSTANT i16 2
%3:_(s16) = G_CONSTANT i16 3
%4:_(s16) = G_CONSTANT i16 4
%5:_(s16) = G_CONSTANT i16 5
%8:_(s96) = G_MERGE_VALUES %0, %1, %2, %3, %4, %5
$vgpr0_vgpr1_vgpr2 = COPY %8
...