Fix ASAN error caused by commit r364512

[rdhindsa]

Summary

This patch intends to fix ASAN stack-use-after-scope error. This error was introduced with commit r364512.

[dblaikie]

Looks good to me, please commit

(@rovka - this is at least a short-term fix, I'm approving this to unbreak LLVM's mainline - feel free to refix with other ideas if you have any (also happy to discuss this further with you here, IRC, or elsewhere on the mailing lists)

[rovka]

In D63905#1561649, @dblaikie wrote:

Looks good to me, please commit

(@rovka - this is at least a short-term fix, I'm approving this to unbreak LLVM's mainline - feel free to refix with other ideas if you have any (also happy to discuss this further with you here, IRC, or elsewhere on the mailing lists)

Thanks for looking into it and sorry about the breakage. I think one InVReg is sufficient, there's no need for a whole SmallVector there. What do you think about something like this?

[dblaikie]

In D63905#1562040, @rovka wrote:

In D63905#1561649, @dblaikie wrote:

Looks good to me, please commit

(@rovka - this is at least a short-term fix, I'm approving this to unbreak LLVM's mainline - feel free to refix with other ideas if you have any (also happy to discuss this further with you here, IRC, or elsewhere on the mailing lists)

Thanks for looking into it and sorry about the breakage. I think one InVReg is sufficient, there's no need for a whole SmallVector there. What do you think about something like this?

Looks good to me - if possible, it'd be nice to have an assert that when assigning to the SwiftInVReg variable, it hasn't been assigned to before (just to demonstrate that invariant - that only one arg would ever be the error arg), but no worries if that's not practical (if there's no clear null state for a Register, etc)

[rdhindsa]

@rovka : There is one more instance of similar code in function translateInvoke around line 1670. I think you will need to update that as well.

[rovka]

Thanks, committed in r364778!

llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp

if (F && F->isIntrinsic()) {
     if (TII && ID == Intrinsic::not_intrinsic)
       ID = static_cast<Intrinsic::ID>(TII->getIntrinsicID(F));
   }
 
   if (!F || !F->isIntrinsic() || ID == Intrinsic::not_intrinsic) {
     ArrayRef<Register> Res = getOrCreateVRegs(CI);
 
     SmallVector<ArrayRef<Register>, 8> Args;
+    SmallVector<Register, 8> InVRegs;
     Register SwiftErrorVReg = 0;
     for (auto &Arg: CI.arg_operands()) {
       if (CLI->supportSwiftError() && isSwiftError(Arg)) {
         LLT Ty = getLLTForType(*Arg->getType(), *DL);
-        Register InVReg = MRI->createGenericVirtualRegister(Ty);
-        MIRBuilder.buildCopy(InVReg, SwiftError.getOrCreateVRegUseAt(
-                                         &CI, &MIRBuilder.getMBB(), Arg));
-        Args.push_back(InVReg);
+        InVRegs.push_back(MRI->createGenericVirtualRegister(Ty));
+        MIRBuilder.buildCopy(
+            InVRegs.back(),
+            SwiftError.getOrCreateVRegUseAt(&CI, &MIRBuilder.getMBB(), Arg));
+        Args.emplace_back(llvm::makeArrayRef(InVRegs.back()));
         SwiftErrorVReg =
             SwiftError.getOrCreateVRegDefAt(&CI, &MIRBuilder.getMBB(), Arg);
         continue;
       }
       Args.push_back(getOrCreateVRegs(*Arg));
     }
 
     MF->getFrameInfo().setHasCalls(true);