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Differential D63486

AMDGPU/GlobalISel: Legalize s16 fcmp
ClosedPublic

Authored by arsenm on Jun 18 2019, 4:50 AM.

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Reviewers
tstellar
nhaehnle

Diff Detail

Event Timeline

arsenm created this revision.Jun 18 2019, 4:50 AM
Herald added subscribers: Petar.Avramovic, t-tye, tpr and 8 others. · View Herald TranscriptJun 18 2019, 4:50 AM
arsenm added a reviewer: nhaehnle.Jul 1 2019, 6:41 AM

ping

tstellar accepted this revision.Jul 1 2019, 7:52 AM

LGTM.

This revision is now accepted and ready to land.Jul 1 2019, 7:52 AM
arsenm closed this revision.Jul 1 2019, 10:36 AM

r364817

Revision Contents

PathSize
lib/
Target/
AMDGPU/
10 lines
test/
CodeGen/
AMDGPU/
GlobalISel/
329 lines

Diff 205305

lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

Show First 20 Lines • Show All 141 Lines • ▼ Show 20 LinesAMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST,
const std::initializer_list<LLT> AddrSpaces64 = { const std::initializer_list<LLT> AddrSpaces64 = {
GlobalPtr, ConstantPtr, FlatPtr GlobalPtr, ConstantPtr, FlatPtr
}; };
const std::initializer_list<LLT> AddrSpaces32 = { const std::initializer_list<LLT> AddrSpaces32 = {
LocalPtr, PrivatePtr LocalPtr, PrivatePtr
}; };
const std::initializer_list<LLT> FPTypesBase = {
S32, S64
};
const std::initializer_list<LLT> FPTypes16 = {
S32, S64, S16
};
setAction({G_BRCOND, S1}, Legal); setAction({G_BRCOND, S1}, Legal);
// TODO: All multiples of 32, vectors of pointers, all v2s16 pairs, more // TODO: All multiples of 32, vectors of pointers, all v2s16 pairs, more
// elements for v3s16 // elements for v3s16
getActionDefinitionsBuilder(G_PHI) getActionDefinitionsBuilder(G_PHI)
.legalFor({S32, S64, V2S16, V4S16, S1, S128, S256}) .legalFor({S32, S64, V2S16, V4S16, S1, S128, S256})
.legalFor(AllS32Vectors) .legalFor(AllS32Vectors)
.legalFor(AllS64Vectors) .legalFor(AllS64Vectors)
▲ Show 20 Lines • Show All 168 Lines • ▼ Show 20 LinesAMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST,
CmpBuilder CmpBuilder
.widenScalarToNextPow2(1) .widenScalarToNextPow2(1)
.clampScalar(1, S32, S64) .clampScalar(1, S32, S64)
.scalarize(0) .scalarize(0)
.legalIf(all(typeIs(0, S1), isPointer(1))); .legalIf(all(typeIs(0, S1), isPointer(1)));
getActionDefinitionsBuilder(G_FCMP) getActionDefinitionsBuilder(G_FCMP)
.legalFor({{S1, S32}, {S1, S64}}) .legalForCartesianProduct({S1}, ST.has16BitInsts() ? FPTypes16 : FPTypesBase)
.widenScalarToNextPow2(1) .widenScalarToNextPow2(1)
.clampScalar(1, S32, S64) .clampScalar(1, S32, S64)
.scalarize(0); .scalarize(0);
// FIXME: fexp, flog2, flog10 needs to be custom lowered. // FIXME: fexp, flog2, flog10 needs to be custom lowered.
getActionDefinitionsBuilder({G_FPOW, G_FEXP, G_FEXP2, getActionDefinitionsBuilder({G_FPOW, G_FEXP, G_FEXP2,
G_FLOG, G_FLOG2, G_FLOG10}) G_FLOG, G_FLOG2, G_FLOG10})
.legalFor({S32}) .legalFor({S32})
▲ Show 20 Lines • Show All 694 Lines • Show Last 20 Lines

test/CodeGen/AMDGPU/GlobalISel/legalize-fcmp.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -march=amdgcn -mcpu=fiji -run-pass=legalizer %s -o - | FileCheck %s # RUN: llc -O0 -march=amdgcn -mcpu=hawaii -run-pass=legalizer -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX7 %s
# RUN: llc -O0 -march=amdgcn -mcpu=fiji -run-pass=legalizer -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX8 %s
# RUN: llc -O0 -march=amdgcn -mcpu=gfx900 -run-pass=legalizer -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX9 %s
--- ---
name: test_fcmp_s32 name: test_fcmp_s32
body: | body: |
bb.0.entry: bb.0:
liveins: $vgpr0 liveins: $vgpr0
; CHECK-LABEL: name: test_fcmp_s32 ; GFX7-LABEL: name: test_fcmp_s32
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 ; GFX7: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 ; GFX7: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; CHECK: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[C]](s32), [[COPY]] ; GFX7: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[C]](s32), [[COPY]]
; CHECK: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[FCMP]](s1), [[C]], [[COPY]] ; GFX7: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[FCMP]](s1), [[C]], [[COPY]]
; CHECK: $vgpr0 = COPY [[SELECT]](s32) ; GFX7: $vgpr0 = COPY [[SELECT]](s32)
; GFX8-LABEL: name: test_fcmp_s32
; GFX8: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; GFX8: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; GFX8: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[C]](s32), [[COPY]]
; GFX8: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[FCMP]](s1), [[C]], [[COPY]]
; GFX8: $vgpr0 = COPY [[SELECT]](s32)
; GFX9-LABEL: name: test_fcmp_s32
; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; GFX9: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[C]](s32), [[COPY]]
; GFX9: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[FCMP]](s1), [[C]], [[COPY]]
; GFX9: $vgpr0 = COPY [[SELECT]](s32)
%0:_(s32) = G_CONSTANT i32 0 %0:_(s32) = G_CONSTANT i32 0
%1:_(s32) = COPY $vgpr0 %1:_(s32) = COPY $vgpr0
%2:_(s1) = G_FCMP floatpred(oeq), %0, %1 %2:_(s1) = G_FCMP floatpred(oeq), %0, %1
%3:_(s32) = G_SELECT %2, %0, %1 %3:_(s32) = G_SELECT %2, %0, %1
$vgpr0 = COPY %3 $vgpr0 = COPY %3
... ...
--- ---
name: test_fcmp_s64 name: test_fcmp_s64
body: | body: |
bb.0.entry: bb.0:
liveins: $vgpr0_vgpr1 liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_fcmp_s64 ; GFX7-LABEL: name: test_fcmp_s64
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0 ; GFX7: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 ; GFX7: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; CHECK: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[C]](s64), [[COPY]] ; GFX7: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[C]](s64), [[COPY]]
; CHECK: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[FCMP]](s1), [[C]], [[COPY]] ; GFX7: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[FCMP]](s1), [[C]], [[COPY]]
; CHECK: $vgpr0_vgpr1 = COPY [[SELECT]](s64) ; GFX7: $vgpr0_vgpr1 = COPY [[SELECT]](s64)
; GFX8-LABEL: name: test_fcmp_s64
; GFX8: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; GFX8: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; GFX8: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[C]](s64), [[COPY]]
; GFX8: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[FCMP]](s1), [[C]], [[COPY]]
; GFX8: $vgpr0_vgpr1 = COPY [[SELECT]](s64)
; GFX9-LABEL: name: test_fcmp_s64
; GFX9: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
; GFX9: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
; GFX9: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[C]](s64), [[COPY]]
; GFX9: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[FCMP]](s1), [[C]], [[COPY]]
; GFX9: $vgpr0_vgpr1 = COPY [[SELECT]](s64)
%0:_(s64) = G_CONSTANT i64 0 %0:_(s64) = G_CONSTANT i64 0
%1:_(s64) = COPY $vgpr0_vgpr1 %1:_(s64) = COPY $vgpr0_vgpr1
%2:_(s1) = G_FCMP floatpred(oeq), %0, %1 %2:_(s1) = G_FCMP floatpred(oeq), %0, %1
%3:_(s64) = G_SELECT %2, %0, %1 %3:_(s64) = G_SELECT %2, %0, %1
$vgpr0_vgpr1 = COPY %3 $vgpr0_vgpr1 = COPY %3
... ...
--- ---
name: test_fcmp_s16 name: test_fcmp_s16
body: | body: |
bb.0.entry: bb.0:
liveins: $vgpr0 liveins: $vgpr0
; CHECK-LABEL: name: test_fcmp_s16 ; GFX7-LABEL: name: test_fcmp_s16
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 ; GFX7: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s32) ; GFX7: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s32)
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 ; GFX7: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; CHECK: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) ; GFX7: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
; CHECK: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16) ; GFX7: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC]](s16)
; CHECK: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC1]](s16) ; GFX7: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[TRUNC1]](s16)
; CHECK: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[FPEXT]](s32), [[FPEXT1]] ; GFX7: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[FPEXT]](s32), [[FPEXT1]]
; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C]](s32) ; GFX7: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C]](s32)
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32) ; GFX7: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; CHECK: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[FCMP]](s1), [[COPY1]], [[COPY2]] ; GFX7: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[FCMP]](s1), [[COPY1]], [[COPY2]]
; CHECK: [[COPY3:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32) ; GFX7: [[COPY3:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
; CHECK: $vgpr0 = COPY [[COPY3]](s32) ; GFX7: $vgpr0 = COPY [[COPY3]](s32)
; GFX8-LABEL: name: test_fcmp_s16
; GFX8: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; GFX8: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s32)
; GFX8: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; GFX8: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
; GFX8: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[TRUNC]](s16), [[TRUNC1]]
; GFX8: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C]](s32)
; GFX8: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; GFX8: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[FCMP]](s1), [[COPY1]], [[COPY2]]
; GFX8: [[COPY3:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
; GFX8: $vgpr0 = COPY [[COPY3]](s32)
; GFX9-LABEL: name: test_fcmp_s16
; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; GFX9: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[C]](s32)
; GFX9: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
; GFX9: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
; GFX9: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[TRUNC]](s16), [[TRUNC1]]
; GFX9: [[COPY1:%[0-9]+]]:_(s32) = COPY [[C]](s32)
; GFX9: [[COPY2:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
; GFX9: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[FCMP]](s1), [[COPY1]], [[COPY2]]
; GFX9: [[COPY3:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
; GFX9: $vgpr0 = COPY [[COPY3]](s32)
%0:_(s16) = G_CONSTANT i16 0 %0:_(s16) = G_CONSTANT i16 0
%1:_(s32) = COPY $vgpr0 %1:_(s32) = COPY $vgpr0
%2:_(s16) = G_TRUNC %1 %2:_(s16) = G_TRUNC %1
%3:_(s1) = G_FCMP floatpred(oeq), %0, %2 %3:_(s1) = G_FCMP floatpred(oeq), %0, %2
%4:_(s16) = G_SELECT %3, %0, %2 %4:_(s16) = G_SELECT %3, %0, %2
%5:_(s32) = G_ANYEXT %4 %5:_(s32) = G_ANYEXT %4
$vgpr0 = COPY %5 $vgpr0 = COPY %5
... ...
--- ---
name: test_fcmp_v2s32 name: test_fcmp_v2s32
body: | body: |
bb.0.entry: bb.0:
liveins: $vgpr0_vgpr1 liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_fcmp_v2s32 ; GFX7-LABEL: name: test_fcmp_v2s32
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 ; GFX7: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 ; GFX7: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) ; GFX7: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
; CHECK: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[C]](s32), [[UV]] ; GFX7: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[C]](s32), [[UV]]
; CHECK: [[FCMP1:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[C]](s32), [[UV1]] ; GFX7: [[FCMP1:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[C]](s32), [[UV1]]
; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s1>) = G_BUILD_VECTOR [[FCMP]](s1), [[FCMP1]](s1) ; GFX7: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s1>) = G_BUILD_VECTOR [[FCMP]](s1), [[FCMP1]](s1)
; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<2 x s1>) ; GFX7: S_NOP 0, implicit [[BUILD_VECTOR]](<2 x s1>)
; GFX8-LABEL: name: test_fcmp_v2s32
; GFX8: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; GFX8: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
; GFX8: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
; GFX8: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[C]](s32), [[UV]]
; GFX8: [[FCMP1:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[C]](s32), [[UV1]]
; GFX8: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s1>) = G_BUILD_VECTOR [[FCMP]](s1), [[FCMP1]](s1)
; GFX8: S_NOP 0, implicit [[BUILD_VECTOR]](<2 x s1>)
; GFX9-LABEL: name: test_fcmp_v2s32
; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; GFX9: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
; GFX9: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
; GFX9: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[C]](s32), [[UV]]
; GFX9: [[FCMP1:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[C]](s32), [[UV1]]
; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s1>) = G_BUILD_VECTOR [[FCMP]](s1), [[FCMP1]](s1)
; GFX9: S_NOP 0, implicit [[BUILD_VECTOR]](<2 x s1>)
%0:_(s32) = G_CONSTANT i32 0 %0:_(s32) = G_CONSTANT i32 0
%1:_(<2 x s32>) = G_BUILD_VECTOR %0, %0 %1:_(<2 x s32>) = G_BUILD_VECTOR %0, %0
%2:_(<2 x s32>) = COPY $vgpr0_vgpr1 %2:_(<2 x s32>) = COPY $vgpr0_vgpr1
%3:_(<2 x s1>) = G_FCMP floatpred(oeq), %1, %2 %3:_(<2 x s1>) = G_FCMP floatpred(oeq), %1, %2
S_NOP 0, implicit %3 S_NOP 0, implicit %3
... ...
--- ---
name: test_fcmp_v2s32_flags name: test_fcmp_v2s32_flags
body: | body: |
bb.0.entry: bb.0:
liveins: $vgpr0_vgpr1 liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: test_fcmp_v2s32_flags ; GFX7-LABEL: name: test_fcmp_v2s32_flags
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 ; GFX7: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; CHECK: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 ; GFX7: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) ; GFX7: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
; CHECK: %8:_(s1) = nnan G_FCMP floatpred(oeq), [[C]](s32), [[UV]] ; GFX7: %8:_(s1) = nnan G_FCMP floatpred(oeq), [[C]](s32), [[UV]]
; CHECK: %9:_(s1) = nnan G_FCMP floatpred(oeq), [[C]](s32), [[UV1]] ; GFX7: %9:_(s1) = nnan G_FCMP floatpred(oeq), [[C]](s32), [[UV1]]
; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s1>) = G_BUILD_VECTOR %8(s1), %9(s1) ; GFX7: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s1>) = G_BUILD_VECTOR %8(s1), %9(s1)
; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<2 x s1>) ; GFX7: S_NOP 0, implicit [[BUILD_VECTOR]](<2 x s1>)
; GFX8-LABEL: name: test_fcmp_v2s32_flags
; GFX8: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; GFX8: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
; GFX8: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
; GFX8: %8:_(s1) = nnan G_FCMP floatpred(oeq), [[C]](s32), [[UV]]
; GFX8: %9:_(s1) = nnan G_FCMP floatpred(oeq), [[C]](s32), [[UV1]]
; GFX8: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s1>) = G_BUILD_VECTOR %8(s1), %9(s1)
; GFX8: S_NOP 0, implicit [[BUILD_VECTOR]](<2 x s1>)
; GFX9-LABEL: name: test_fcmp_v2s32_flags
; GFX9: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
; GFX9: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
; GFX9: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
; GFX9: %8:_(s1) = nnan G_FCMP floatpred(oeq), [[C]](s32), [[UV]]
; GFX9: %9:_(s1) = nnan G_FCMP floatpred(oeq), [[C]](s32), [[UV1]]
; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s1>) = G_BUILD_VECTOR %8(s1), %9(s1)
; GFX9: S_NOP 0, implicit [[BUILD_VECTOR]](<2 x s1>)
%0:_(s32) = G_CONSTANT i32 0 %0:_(s32) = G_CONSTANT i32 0
%1:_(<2 x s32>) = G_BUILD_VECTOR %0, %0 %1:_(<2 x s32>) = G_BUILD_VECTOR %0, %0
%2:_(<2 x s32>) = COPY $vgpr0_vgpr1 %2:_(<2 x s32>) = COPY $vgpr0_vgpr1
%3:_(<2 x s1>) = nnan G_FCMP floatpred(oeq), %1, %2 %3:_(<2 x s1>) = nnan G_FCMP floatpred(oeq), %1, %2
S_NOP 0, implicit %3 S_NOP 0, implicit %3
... ...
--- ---
name: test_fcmp_v3s32 name: test_fcmp_v3s32
body: | body: |
bb.0.entry: bb.0:
liveins: $vgpr0_vgpr1_vgpr2 liveins: $vgpr0_vgpr1_vgpr2
; CHECK-LABEL: name: test_fcmp_v3s32 ; GFX7-LABEL: name: test_fcmp_v3s32
; CHECK: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF ; GFX7: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF
; CHECK: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 ; GFX7: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<3 x s32>) ; GFX7: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<3 x s32>)
; CHECK: [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>) ; GFX7: [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)
; CHECK: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV]](s32), [[UV3]] ; GFX7: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV]](s32), [[UV3]]
; CHECK: [[FCMP1:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV1]](s32), [[UV4]] ; GFX7: [[FCMP1:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV1]](s32), [[UV4]]
; CHECK: [[FCMP2:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV2]](s32), [[UV5]] ; GFX7: [[FCMP2:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV2]](s32), [[UV5]]
; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s1>) = G_BUILD_VECTOR [[FCMP]](s1), [[FCMP1]](s1), [[FCMP2]](s1) ; GFX7: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s1>) = G_BUILD_VECTOR [[FCMP]](s1), [[FCMP1]](s1), [[FCMP2]](s1)
; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<3 x s1>) ; GFX7: S_NOP 0, implicit [[BUILD_VECTOR]](<3 x s1>)
; GFX8-LABEL: name: test_fcmp_v3s32
; GFX8: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF
; GFX8: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
; GFX8: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<3 x s32>)
; GFX8: [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)
; GFX8: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV]](s32), [[UV3]]
; GFX8: [[FCMP1:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV1]](s32), [[UV4]]
; GFX8: [[FCMP2:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV2]](s32), [[UV5]]
; GFX8: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s1>) = G_BUILD_VECTOR [[FCMP]](s1), [[FCMP1]](s1), [[FCMP2]](s1)
; GFX8: S_NOP 0, implicit [[BUILD_VECTOR]](<3 x s1>)
; GFX9-LABEL: name: test_fcmp_v3s32
; GFX9: [[DEF:%[0-9]+]]:_(<3 x s32>) = G_IMPLICIT_DEF
; GFX9: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
; GFX9: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](<3 x s32>)
; GFX9: [[UV3:%[0-9]+]]:_(s32), [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>)
; GFX9: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV]](s32), [[UV3]]
; GFX9: [[FCMP1:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV1]](s32), [[UV4]]
; GFX9: [[FCMP2:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV2]](s32), [[UV5]]
; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s1>) = G_BUILD_VECTOR [[FCMP]](s1), [[FCMP1]](s1), [[FCMP2]](s1)
; GFX9: S_NOP 0, implicit [[BUILD_VECTOR]](<3 x s1>)
%0:_(<3 x s32>) = G_IMPLICIT_DEF %0:_(<3 x s32>) = G_IMPLICIT_DEF
%1:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 %1:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2
%2:_(<3 x s1>) = G_FCMP floatpred(oeq), %0, %1 %2:_(<3 x s1>) = G_FCMP floatpred(oeq), %0, %1
S_NOP 0, implicit %2 S_NOP 0, implicit %2
... ...
--- ---
name: test_fcmp_v4s32 name: test_fcmp_v4s32
body: | body: |
bb.0.entry: bb.0:
liveins: $vgpr0_vgpr1_vgpr2_vgpr3 liveins: $vgpr0_vgpr1_vgpr2_vgpr3
; CHECK-LABEL: name: test_fcmp_v4s32 ; GFX7-LABEL: name: test_fcmp_v4s32
; CHECK: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF ; GFX7: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
; CHECK: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[DEF]](p1) :: (volatile load 16) ; GFX7: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[DEF]](p1) :: (volatile load 16)
; CHECK: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 ; GFX7: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; CHECK: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](<4 x s32>) ; GFX7: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](<4 x s32>)
; CHECK: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>) ; GFX7: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>)
; CHECK: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV]](s32), [[UV4]] ; GFX7: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV]](s32), [[UV4]]
; CHECK: [[FCMP1:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV1]](s32), [[UV5]] ; GFX7: [[FCMP1:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV1]](s32), [[UV5]]
; CHECK: [[FCMP2:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV2]](s32), [[UV6]] ; GFX7: [[FCMP2:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV2]](s32), [[UV6]]
; CHECK: [[FCMP3:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV3]](s32), [[UV7]] ; GFX7: [[FCMP3:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV3]](s32), [[UV7]]
; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s1>) = G_BUILD_VECTOR [[FCMP]](s1), [[FCMP1]](s1), [[FCMP2]](s1), [[FCMP3]](s1) ; GFX7: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s1>) = G_BUILD_VECTOR [[FCMP]](s1), [[FCMP1]](s1), [[FCMP2]](s1), [[FCMP3]](s1)
; CHECK: S_NOP 0, implicit [[BUILD_VECTOR]](<4 x s1>) ; GFX7: S_NOP 0, implicit [[BUILD_VECTOR]](<4 x s1>)
; GFX8-LABEL: name: test_fcmp_v4s32
; GFX8: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
; GFX8: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[DEF]](p1) :: (volatile load 16)
; GFX8: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; GFX8: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](<4 x s32>)
; GFX8: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>)
; GFX8: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV]](s32), [[UV4]]
; GFX8: [[FCMP1:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV1]](s32), [[UV5]]
; GFX8: [[FCMP2:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV2]](s32), [[UV6]]
; GFX8: [[FCMP3:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV3]](s32), [[UV7]]
; GFX8: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s1>) = G_BUILD_VECTOR [[FCMP]](s1), [[FCMP1]](s1), [[FCMP2]](s1), [[FCMP3]](s1)
; GFX8: S_NOP 0, implicit [[BUILD_VECTOR]](<4 x s1>)
; GFX9-LABEL: name: test_fcmp_v4s32
; GFX9: [[DEF:%[0-9]+]]:_(p1) = G_IMPLICIT_DEF
; GFX9: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[DEF]](p1) :: (volatile load 16)
; GFX9: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
; GFX9: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](<4 x s32>)
; GFX9: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>)
; GFX9: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV]](s32), [[UV4]]
; GFX9: [[FCMP1:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV1]](s32), [[UV5]]
; GFX9: [[FCMP2:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV2]](s32), [[UV6]]
; GFX9: [[FCMP3:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV3]](s32), [[UV7]]
; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s1>) = G_BUILD_VECTOR [[FCMP]](s1), [[FCMP1]](s1), [[FCMP2]](s1), [[FCMP3]](s1)
; GFX9: S_NOP 0, implicit [[BUILD_VECTOR]](<4 x s1>)
%0:_(p1) = G_IMPLICIT_DEF %0:_(p1) = G_IMPLICIT_DEF
%1:_(<4 x s32>) = G_LOAD %0 :: (volatile load 16) %1:_(<4 x s32>) = G_LOAD %0 :: (volatile load 16)
%2:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 %2:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
%3:_(<4 x s1>) = G_FCMP floatpred(oeq) , %1, %2 %3:_(<4 x s1>) = G_FCMP floatpred(oeq) , %1, %2
S_NOP 0, implicit %3 S_NOP 0, implicit %3
... ...
---
name: test_icmp_v2s16
body: |
bb.0:
liveins: $vgpr0, $vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5
; GFX7-LABEL: name: test_icmp_v2s16
; GFX7: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
; GFX7: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1
; GFX7: [[COPY2:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3
; GFX7: [[COPY3:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr4_vgpr5
; GFX7: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<2 x s16>)
; GFX7: [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY1]](<2 x s16>)
; GFX7: [[FPEXT:%[0-9]+]]:_(s32) = G_FPEXT [[UV]](s16)
; GFX7: [[FPEXT1:%[0-9]+]]:_(s32) = G_FPEXT [[UV2]](s16)
; GFX7: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[FPEXT]](s32), [[FPEXT1]]
; GFX7: [[FPEXT2:%[0-9]+]]:_(s32) = G_FPEXT [[UV1]](s16)
; GFX7: [[FPEXT3:%[0-9]+]]:_(s32) = G_FPEXT [[UV3]](s16)
; GFX7: [[FCMP1:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[FPEXT2]](s32), [[FPEXT3]]
; GFX7: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY2]](<2 x s32>)
; GFX7: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY3]](<2 x s32>)
; GFX7: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[FCMP]](s1), [[UV4]], [[UV6]]
; GFX7: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[FCMP1]](s1), [[UV5]], [[UV7]]
; GFX7: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[SELECT]](s32), [[SELECT1]](s32)
; GFX7: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
; GFX8-LABEL: name: test_icmp_v2s16
; GFX8: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
; GFX8: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1
; GFX8: [[COPY2:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3
; GFX8: [[COPY3:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr4_vgpr5
; GFX8: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<2 x s16>)
; GFX8: [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY1]](<2 x s16>)
; GFX8: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV]](s16), [[UV2]]
; GFX8: [[FCMP1:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV1]](s16), [[UV3]]
; GFX8: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY2]](<2 x s32>)
; GFX8: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY3]](<2 x s32>)
; GFX8: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[FCMP]](s1), [[UV4]], [[UV6]]
; GFX8: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[FCMP1]](s1), [[UV5]], [[UV7]]
; GFX8: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[SELECT]](s32), [[SELECT1]](s32)
; GFX8: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
; GFX9-LABEL: name: test_icmp_v2s16
; GFX9: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
; GFX9: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1
; GFX9: [[COPY2:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr2_vgpr3
; GFX9: [[COPY3:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr4_vgpr5
; GFX9: [[UV:%[0-9]+]]:_(s16), [[UV1:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY]](<2 x s16>)
; GFX9: [[UV2:%[0-9]+]]:_(s16), [[UV3:%[0-9]+]]:_(s16) = G_UNMERGE_VALUES [[COPY1]](<2 x s16>)
; GFX9: [[FCMP:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV]](s16), [[UV2]]
; GFX9: [[FCMP1:%[0-9]+]]:_(s1) = G_FCMP floatpred(oeq), [[UV1]](s16), [[UV3]]
; GFX9: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY2]](<2 x s32>)
; GFX9: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY3]](<2 x s32>)
; GFX9: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[FCMP]](s1), [[UV4]], [[UV6]]
; GFX9: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[FCMP1]](s1), [[UV5]], [[UV7]]
; GFX9: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[SELECT]](s32), [[SELECT1]](s32)
; GFX9: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
%0:_(<2 x s16>) = COPY $vgpr0
%1:_(<2 x s16>) = COPY $vgpr1
%2:_(<2 x s32>) = COPY $vgpr2_vgpr3
%3:_(<2 x s32>) = COPY $vgpr4_vgpr5
%4:_(<2 x s1>) = G_FCMP floatpred(oeq), %0, %1
%5:_(<2 x s32>) = G_SELECT %4, %2, %3
$vgpr0_vgpr1 = COPY %5
...