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Differential D63485

AMDGPU/GlobalISel: Improve regbankselect for icmp s16
ClosedPublic

Authored by arsenm on Jun 18 2019, 4:48 AM.

Details

Reviewers
tstellar
nhaehnle
Summary

Account for 64-bit scalar eq/ne when available.

Diff Detail

Event Timeline

arsenm created this revision.Jun 18 2019, 4:48 AM
Herald added subscribers: Petar.Avramovic, t-tye, tpr and 8 others. · View Herald TranscriptJun 18 2019, 4:48 AM
arsenm updated this revision to Diff 206242.Jun 24 2019, 9:28 AM

Fix test diff

arsenm added a reviewer: nhaehnle.Jul 1 2019, 3:10 PM

ping

arsenm added a comment.Jul 8 2019, 10:28 AM

ping

tstellar accepted this revision.Jul 8 2019, 9:09 PM

LGTM.

This revision is now accepted and ready to land.Jul 8 2019, 9:09 PM
arsenm closed this revision.Jul 9 2019, 7:13 AM

r365487

Revision Contents

PathSize
lib/
Target/
AMDGPU/
15 lines
test/
CodeGen/
AMDGPU/
GlobalISel/
308 lines
83 lines

Diff 206242

lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp

Show First 20 Lines • Show All 1,547 Lines • ▼ Show 20 Lines const ValueMapping *PtrMapping =
AMDGPU::getValueMapping(AMDGPU::VGPRRegBankID, 64); AMDGPU::getValueMapping(AMDGPU::VGPRRegBankID, 64);
OpdsMapping[0] = ValMapping; OpdsMapping[0] = ValMapping;
OpdsMapping[1] = PtrMapping; OpdsMapping[1] = PtrMapping;
break; break;
} }
case AMDGPU::G_ICMP: { case AMDGPU::G_ICMP: {
auto Pred = static_cast<CmpInst::Predicate>(MI.getOperand(1).getPredicate());
unsigned Size = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); unsigned Size = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits();
unsigned Op2Bank = getRegBankID(MI.getOperand(2).getReg(), MRI, *TRI); unsigned Op2Bank = getRegBankID(MI.getOperand(2).getReg(), MRI, *TRI);
unsigned Op3Bank = getRegBankID(MI.getOperand(3).getReg(), MRI, *TRI); unsigned Op3Bank = getRegBankID(MI.getOperand(3).getReg(), MRI, *TRI);
unsigned Op0Bank = Op2Bank == AMDGPU::SGPRRegBankID &&
Op3Bank == AMDGPU::SGPRRegBankID ? bool CanUseSCC = Op2Bank == AMDGPU::SGPRRegBankID &&
AMDGPU::SCCRegBankID : AMDGPU::VCCRegBankID; Op3Bank == AMDGPU::SGPRRegBankID &&
(Size == 32 || (Size == 64 &&
(Pred == CmpInst::ICMP_EQ || Pred == CmpInst::ICMP_NE) &&
MF.getSubtarget<GCNSubtarget>().hasScalarCompareEq64()));
unsigned Op0Bank = CanUseSCC ? AMDGPU::SCCRegBankID : AMDGPU::VCCRegBankID;
OpdsMapping[0] = AMDGPU::getValueMapping(Op0Bank, 1); OpdsMapping[0] = AMDGPU::getValueMapping(Op0Bank, 1);
OpdsMapping[1] = nullptr; // Predicate Operand. OpdsMapping[1] = nullptr; // Predicate Operand.
OpdsMapping[2] = AMDGPU::getValueMapping(Op2Bank, Size); OpdsMapping[2] = AMDGPU::getValueMapping(Op2Bank, Size);
OpdsMapping[3] = AMDGPU::getValueMapping(Op3Bank, Size); OpdsMapping[3] = AMDGPU::getValueMapping(Op3Bank, Size);
break; break;
} }
case AMDGPU::G_EXTRACT_VECTOR_ELT: { case AMDGPU::G_EXTRACT_VECTOR_ELT: {
unsigned OutputBankID = isSALUMapping(MI) ? unsigned OutputBankID = isSALUMapping(MI) ?
AMDGPU::SGPRRegBankID : AMDGPU::VGPRRegBankID; AMDGPU::SGPRRegBankID : AMDGPU::VGPRRegBankID;
unsigned SrcSize = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); unsigned SrcSize = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits();
unsigned IdxSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); unsigned IdxSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits();
unsigned IdxBank = getRegBankID(MI.getOperand(2).getReg(), MRI, *TRI); unsigned IdxBank = getRegBankID(MI.getOperand(2).getReg(), MRI, *TRI);
OpdsMapping[0] = AMDGPU::getValueMapping(OutputBankID, SrcSize); OpdsMapping[0] = AMDGPU::getValueMapping(OutputBankID, SrcSize);
▲ Show 20 Lines • Show All 363 Lines • Show Last 20 Lines

test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s # RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=regbankselect -regbankselect-fast -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX7 %s
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s # RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -regbankselect-fast -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX8 %s
# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=regbankselect -regbankselect-greedy -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX7 %s
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -regbankselect-greedy -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX8 %s
--- ---
name: icmp_ss name: icmp_eq_s32_ss
legalized: true legalized: true
body: | body: |
bb.0: bb.0:
liveins: $sgpr0, $sgpr1 liveins: $sgpr0, $sgpr1
; CHECK-LABEL: name: icmp_ss ; GFX7-LABEL: name: icmp_eq_s32_ss
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 ; GFX7: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1 ; GFX7: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
; CHECK: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]] ; GFX7: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[COPY1]]
; GFX8-LABEL: name: icmp_eq_s32_ss
; GFX8: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; GFX8: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
; GFX8: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[COPY1]]
%0:_(s32) = COPY $sgpr0 %0:_(s32) = COPY $sgpr0
%1:_(s32) = COPY $sgpr1 %1:_(s32) = COPY $sgpr1
%2:_(s1) = G_ICMP intpred(ne), %0, %1 %2:_(s1) = G_ICMP intpred(eq), %0, %1
... ...
--- ---
name: icmp_sv name: icmp_eq_s32_sv
legalized: true legalized: true
body: | body: |
bb.0: bb.0:
liveins: $sgpr0, $vgpr0 liveins: $sgpr0, $vgpr0
; CHECK-LABEL: name: icmp_sv ; GFX7-LABEL: name: icmp_eq_s32_sv
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 ; GFX7: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 ; GFX7: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; CHECK: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]] ; GFX7: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[COPY1]]
; GFX8-LABEL: name: icmp_eq_s32_sv
; GFX8: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; GFX8: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; GFX8: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[COPY1]]
%0:_(s32) = COPY $sgpr0 %0:_(s32) = COPY $sgpr0
%1:_(s32) = COPY $vgpr0 %1:_(s32) = COPY $vgpr0
%2:_(s1) = G_ICMP intpred(ne), %0, %1 %2:_(s1) = G_ICMP intpred(eq), %0, %1
... ...
--- ---
name: icmp_vs name: icmp_eq_s32_vs
legalized: true legalized: true
body: | body: |
bb.0: bb.0:
liveins: $sgpr0, $vgpr0 liveins: $sgpr0, $vgpr0
; CHECK-LABEL: name: icmp_vs ; GFX7-LABEL: name: icmp_eq_s32_vs
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0 ; GFX7: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 ; GFX7: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; CHECK: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY1]](s32), [[COPY]] ; GFX7: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[COPY]]
; GFX8-LABEL: name: icmp_eq_s32_vs
; GFX8: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; GFX8: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; GFX8: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY1]](s32), [[COPY]]
%0:_(s32) = COPY $sgpr0 %0:_(s32) = COPY $sgpr0
%1:_(s32) = COPY $vgpr0 %1:_(s32) = COPY $vgpr0
%2:_(s1) = G_ICMP intpred(ne), %1, %0 %2:_(s1) = G_ICMP intpred(eq), %1, %0
... ...
--- ---
name: icmp_vv name: icmp_eq_s32_vv
legalized: true legalized: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr0, $vgpr1 liveins: $vgpr0, $vgpr1
; CHECK-LABEL: name: icmp_vv ; GFX7-LABEL: name: icmp_eq_s32_vv
; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0 ; GFX7: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1 ; GFX7: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
; CHECK: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]] ; GFX7: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[COPY1]]
; GFX8-LABEL: name: icmp_eq_s32_vv
; GFX8: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; GFX8: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
; GFX8: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[COPY1]]
%0:_(s32) = COPY $vgpr0 %0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1 %1:_(s32) = COPY $vgpr1
%2:_(s1) = G_ICMP intpred(eq), %0, %1
...
---
name: icmp_eq_s64_ss
legalized: true
body: |
bb.0:
liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
; GFX7-LABEL: name: icmp_eq_s64_ss
; GFX7: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
; GFX7: [[COPY1:%[0-9]+]]:sgpr(s64) = COPY $sgpr2_sgpr3
; GFX7: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY]](s64), [[COPY1]]
; GFX8-LABEL: name: icmp_eq_s64_ss
; GFX8: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
; GFX8: [[COPY1:%[0-9]+]]:sgpr(s64) = COPY $sgpr2_sgpr3
; GFX8: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY]](s64), [[COPY1]]
%0:_(s64) = COPY $sgpr0_sgpr1
%1:_(s64) = COPY $sgpr2_sgpr3
%2:_(s1) = G_ICMP intpred(eq), %0, %1
...
---
name: icmp_eq_s64_sv
legalized: true
body: |
bb.0:
liveins: $sgpr0_sgpr1, $vgpr0_vgpr1
; GFX7-LABEL: name: icmp_eq_s64_sv
; GFX7: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
; GFX7: [[COPY1:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
; GFX7: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY]](s64), [[COPY1]]
; GFX8-LABEL: name: icmp_eq_s64_sv
; GFX8: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
; GFX8: [[COPY1:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
; GFX8: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY]](s64), [[COPY1]]
%0:_(s64) = COPY $sgpr0_sgpr1
%1:_(s64) = COPY $vgpr0_vgpr1
%2:_(s1) = G_ICMP intpred(eq), %0, %1
...
---
name: icmp_eq_s64_vs
legalized: true
body: |
bb.0:
liveins: $sgpr0_sgpr1, $vgpr0_vgpr1
; GFX7-LABEL: name: icmp_eq_s64_vs
; GFX7: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
; GFX7: [[COPY1:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
; GFX7: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY1]](s64), [[COPY]]
; GFX8-LABEL: name: icmp_eq_s64_vs
; GFX8: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
; GFX8: [[COPY1:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
; GFX8: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY1]](s64), [[COPY]]
%0:_(s64) = COPY $sgpr0_sgpr1
%1:_(s64) = COPY $vgpr0_vgpr1
%2:_(s1) = G_ICMP intpred(eq), %1, %0
...
---
name: icmp_eq_s64_vv
legalized: true
body: |
bb.0:
liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX7-LABEL: name: icmp_eq_s64_vv
; GFX7: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
; GFX7: [[COPY1:%[0-9]+]]:vgpr(s64) = COPY $vgpr2_vgpr3
; GFX7: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY]](s64), [[COPY1]]
; GFX8-LABEL: name: icmp_eq_s64_vv
; GFX8: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
; GFX8: [[COPY1:%[0-9]+]]:vgpr(s64) = COPY $vgpr2_vgpr3
; GFX8: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY]](s64), [[COPY1]]
%0:_(s64) = COPY $vgpr0_vgpr1
%1:_(s64) = COPY $vgpr2_vgpr3
%2:_(s1) = G_ICMP intpred(eq), %0, %1
...
---
name: icmp_ne_s64_ss
legalized: true
body: |
bb.0:
liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
; GFX7-LABEL: name: icmp_ne_s64_ss
; GFX7: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
; GFX7: [[COPY1:%[0-9]+]]:sgpr(s64) = COPY $sgpr2_sgpr3
; GFX7: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY]](s64), [[COPY1]]
; GFX8-LABEL: name: icmp_ne_s64_ss
; GFX8: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
; GFX8: [[COPY1:%[0-9]+]]:sgpr(s64) = COPY $sgpr2_sgpr3
; GFX8: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(ne), [[COPY]](s64), [[COPY1]]
%0:_(s64) = COPY $sgpr0_sgpr1
%1:_(s64) = COPY $sgpr2_sgpr3
%2:_(s1) = G_ICMP intpred(ne), %0, %1
...
---
name: icmp_ne_s64_sv
legalized: true
body: |
bb.0:
liveins: $sgpr0_sgpr1, $vgpr0_vgpr1
; GFX7-LABEL: name: icmp_ne_s64_sv
; GFX7: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
; GFX7: [[COPY1:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
; GFX7: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY]](s64), [[COPY1]]
; GFX8-LABEL: name: icmp_ne_s64_sv
; GFX8: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
; GFX8: [[COPY1:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
; GFX8: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY]](s64), [[COPY1]]
%0:_(s64) = COPY $sgpr0_sgpr1
%1:_(s64) = COPY $vgpr0_vgpr1
%2:_(s1) = G_ICMP intpred(ne), %0, %1 %2:_(s1) = G_ICMP intpred(ne), %0, %1
... ...
---
name: icmp_ne_s64_vs
legalized: true
body: |
bb.0:
liveins: $sgpr0_sgpr1, $vgpr0_vgpr1
; GFX7-LABEL: name: icmp_ne_s64_vs
; GFX7: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
; GFX7: [[COPY1:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
; GFX7: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY1]](s64), [[COPY]]
; GFX8-LABEL: name: icmp_ne_s64_vs
; GFX8: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
; GFX8: [[COPY1:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
; GFX8: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY1]](s64), [[COPY]]
%0:_(s64) = COPY $sgpr0_sgpr1
%1:_(s64) = COPY $vgpr0_vgpr1
%2:_(s1) = G_ICMP intpred(ne), %1, %0
...
---
name: icmp_ne_s64_vv
legalized: true
body: |
bb.0:
liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX7-LABEL: name: icmp_ne_s64_vv
; GFX7: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
; GFX7: [[COPY1:%[0-9]+]]:vgpr(s64) = COPY $vgpr2_vgpr3
; GFX7: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY]](s64), [[COPY1]]
; GFX8-LABEL: name: icmp_ne_s64_vv
; GFX8: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
; GFX8: [[COPY1:%[0-9]+]]:vgpr(s64) = COPY $vgpr2_vgpr3
; GFX8: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(ne), [[COPY]](s64), [[COPY1]]
%0:_(s64) = COPY $vgpr0_vgpr1
%1:_(s64) = COPY $vgpr2_vgpr3
%2:_(s1) = G_ICMP intpred(ne), %0, %1
...
---
name: icmp_slt_s64_ss
legalized: true
body: |
bb.0:
liveins: $sgpr0_sgpr1, $sgpr2_sgpr3
; GFX7-LABEL: name: icmp_slt_s64_ss
; GFX7: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
; GFX7: [[COPY1:%[0-9]+]]:sgpr(s64) = COPY $sgpr2_sgpr3
; GFX7: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(slt), [[COPY]](s64), [[COPY1]]
; GFX8-LABEL: name: icmp_slt_s64_ss
; GFX8: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
; GFX8: [[COPY1:%[0-9]+]]:sgpr(s64) = COPY $sgpr2_sgpr3
; GFX8: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(slt), [[COPY]](s64), [[COPY1]]
%0:_(s64) = COPY $sgpr0_sgpr1
%1:_(s64) = COPY $sgpr2_sgpr3
%2:_(s1) = G_ICMP intpred(slt), %0, %1
...
---
name: icmp_slt_s64_sv
legalized: true
body: |
bb.0:
liveins: $sgpr0_sgpr1, $vgpr0_vgpr1
; GFX7-LABEL: name: icmp_slt_s64_sv
; GFX7: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
; GFX7: [[COPY1:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
; GFX7: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(slt), [[COPY]](s64), [[COPY1]]
; GFX8-LABEL: name: icmp_slt_s64_sv
; GFX8: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
; GFX8: [[COPY1:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
; GFX8: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(slt), [[COPY]](s64), [[COPY1]]
%0:_(s64) = COPY $sgpr0_sgpr1
%1:_(s64) = COPY $vgpr0_vgpr1
%2:_(s1) = G_ICMP intpred(slt), %0, %1
...
---
name: icmp_slt_s64_vs
legalized: true
body: |
bb.0:
liveins: $sgpr0_sgpr1, $vgpr0_vgpr1
; GFX7-LABEL: name: icmp_slt_s64_vs
; GFX7: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
; GFX7: [[COPY1:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
; GFX7: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(slt), [[COPY1]](s64), [[COPY]]
; GFX8-LABEL: name: icmp_slt_s64_vs
; GFX8: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
; GFX8: [[COPY1:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
; GFX8: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(slt), [[COPY1]](s64), [[COPY]]
%0:_(s64) = COPY $sgpr0_sgpr1
%1:_(s64) = COPY $vgpr0_vgpr1
%2:_(s1) = G_ICMP intpred(slt), %1, %0
...
---
name: icmp_slt_s64_vv
legalized: true
body: |
bb.0:
liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
; GFX7-LABEL: name: icmp_slt_s64_vv
; GFX7: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
; GFX7: [[COPY1:%[0-9]+]]:vgpr(s64) = COPY $vgpr2_vgpr3
; GFX7: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(slt), [[COPY]](s64), [[COPY1]]
; GFX8-LABEL: name: icmp_slt_s64_vv
; GFX8: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
; GFX8: [[COPY1:%[0-9]+]]:vgpr(s64) = COPY $vgpr2_vgpr3
; GFX8: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(slt), [[COPY]](s64), [[COPY1]]
%0:_(s64) = COPY $vgpr0_vgpr1
%1:_(s64) = COPY $vgpr2_vgpr3
%2:_(s1) = G_ICMP intpred(slt), %0, %1
...

test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.s16.mir

  • This file was added.
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -regbankselect-fast -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX8 %s
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -regbankselect-greedy -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX8 %s
---
name: icmp_eq_s16_ss
legalized: true
body: |
bb.0:
liveins: $sgpr0, $sgpr1
; GFX8-LABEL: name: icmp_eq_s16_ss
; GFX8: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; GFX8: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
; GFX8: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
; GFX8: [[TRUNC1:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY1]](s32)
; GFX8: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[TRUNC]](s16), [[TRUNC1]]
%0:_(s32) = COPY $sgpr0
%1:_(s32) = COPY $sgpr1
%2:_(s16) = G_TRUNC %0
%3:_(s16) = G_TRUNC %1
%4:_(s1) = G_ICMP intpred(eq), %2, %3
...
---
name: icmp_eq_s16_sv
legalized: true
body: |
bb.0:
liveins: $sgpr0, $vgpr0
; GFX8-LABEL: name: icmp_eq_s16_sv
; GFX8: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; GFX8: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; GFX8: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
; GFX8: [[TRUNC1:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY1]](s32)
; GFX8: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[TRUNC]](s16), [[TRUNC1]]
%0:_(s32) = COPY $sgpr0
%1:_(s32) = COPY $vgpr0
%2:_(s16) = G_TRUNC %0
%3:_(s16) = G_TRUNC %1
%4:_(s1) = G_ICMP intpred(eq), %2, %3
...
---
name: icmp_eq_s16_vs
legalized: true
body: |
bb.0:
liveins: $sgpr0, $vgpr0
; GFX8-LABEL: name: icmp_eq_s16_vs
; GFX8: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; GFX8: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; GFX8: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
; GFX8: [[TRUNC1:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY1]](s32)
; GFX8: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[TRUNC]](s16), [[TRUNC1]]
%0:_(s32) = COPY $sgpr0
%1:_(s32) = COPY $vgpr0
%2:_(s16) = G_TRUNC %0
%3:_(s16) = G_TRUNC %1
%4:_(s1) = G_ICMP intpred(eq), %2, %3
...
---
name: icmp_eq_s16_vv
legalized: true
body: |
bb.0:
liveins: $vgpr0, $vgpr1
; GFX8-LABEL: name: icmp_eq_s16_vv
; GFX8: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; GFX8: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
; GFX8: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
; GFX8: [[TRUNC1:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY1]](s32)
; GFX8: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[TRUNC]](s16), [[TRUNC1]]
%0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1
%2:_(s16) = G_TRUNC %0
%3:_(s16) = G_TRUNC %1
%4:_(s1) = G_ICMP intpred(eq), %2, %3
...