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Tablegen type comparison LE should be LT or equal.
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Authored by petecoup on May 8 2019, 4:01 PM.

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petecoup created this revision.May 8 2019, 4:01 PM
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petecoup marked an inline comment as done.May 8 2019, 4:08 PM
petecoup added inline comments.
llvm/utils/TableGen/CodeGenDAGPatterns.cpp
517 ↗(On Diff #198741)

Krzysztof, I believe you made this change? I was not able to find these trunc patterns in the X86 backend, and all the default backends seem to build/test fine with my change here. Can you comment on whether this looks OK to you?

The X86 patterns are probably heavily hidden in tablegen classes, but they should be easily visible in X86GenDAGISel.inc. Does that file generate the same before and after this change?

/*515111*/    /*Scope*/ 26, /*->515138*/
/*515112*/      OPC_CheckChild0Type, MVT::v4i32,
/*515114*/      OPC_SwitchType /*2 cases */, 9, MVT::v16i8,// ->515126
/*515117*/        OPC_CheckPatternPredicate, 2, // (Subtarget->hasAVX512()) && (Subtarget->hasVLX())
/*515119*/        OPC_MorphNodeTo1, TARGET_VAL(X86::VPMOVDBZ128rr), 0,
                      MVT::v16i8, 1/*#Ops*/, 0,·
                  // Src: (X86vtrunc:{ *:[v16i8] } VR128X:{ *:[v4i32] }:$src) - Complexity = 3
                  // Dst: (VPMOVDBZ128rr:{ *:[v16i8] } VR128X:{ *:[v4i32] }:$src)
kparzysz added inline comments.May 9 2019, 5:47 AM
llvm/utils/TableGen/CodeGenDAGPatterns.cpp
517 ↗(On Diff #198741)

I think it was originally < or ==, but then I encountered those issues in the x86 backend, so I changed it to <. In any case, the original intent was <=, so if it works now, I'm fine with it.

@craig.topper Yes, X86GenDAGIsel.inc generates the same before/after this change.

kparzysz accepted this revision.May 16 2019, 8:23 AM
This revision is now accepted and ready to land.May 16 2019, 8:23 AM
This revision was automatically updated to reflect the committed changes.