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[X86] Make the post machine scheduler macrofusion-aware.
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Authored by courbet on Apr 3 2019, 1:42 AM.

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Summary

Given that X86 does not use this currently, this is an NFC. I'll
experiment with enabling and will report numbers.

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rL LLVM

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courbet created this revision.Apr 3 2019, 1:42 AM
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andreadb accepted this revision.Apr 3 2019, 2:32 AM

Sounds reasonable to me.

I look forward to seeing the results from your experiment.

This revision is now accepted and ready to land.Apr 3 2019, 2:32 AM

Thanks Andrea.

This revision was automatically updated to reflect the committed changes.

Given that X86 does not use this currently, this is an NFC.

Are you sure?

This could use test coverage i guess?

This is actually an NFC as the post-ra scheduler is not on by default. The next patch that enables scheduling will show the actual changes.

What about CPU's that specify let PostRAScheduler = 1; ?

Ah yes, sorry I lost track of this. Interestingly there are no tests that fail currently. I'll try to come up with some that do.

For now I'll submit the refactoring part of this change (D59689).

Are you sure ?

To enable this you need either the flag, or substitutePass(&PostRASchedulerID, &PostMachineSchedulerID); in your target. Only Arm, Aaarch64, PPC and SytemZ add the pass manually.