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AMDGPU: Split block for si_end_cf
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Authored by arsenm on Apr 1 2019, 6:45 PM.

Details

Reviewers
rampitec
nhaehnle
Summary

Relying on no spill or other code being inserted before this was
precarious. It relied on code diligently checking isBasicBlockPrologue
which is likely to be forgotten.

Ideally this could be done earlier, but this doesn't work because of
phis. Any other instruction can't be placed before them, so we have to
accept the position being incorrect during SSA.

This avoids regressions in the fast register allocator rewrite from
inverting the direction.

Diff Detail

Event Timeline

arsenm created this revision.Apr 1 2019, 6:45 PM
This revision is now accepted and ready to land.Apr 3 2019, 11:31 AM
arsenm closed this revision.Apr 3 2019, 1:52 PM

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