[MC] Remove unused `NONE` fixup kinds. NFC.

[sbc100]

Summary

The Mips and Lanai targets included MCFixupKind corresponding the
their NONE relocation types. However these were:

a. never used
b. not included by any other targets in the Fixup enum

As far as I can tell llvm never generated relocs of type NONE so these
fixup types don't need to exist.

llvm/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp

static const MCFixupKindInfo Infos[Lanai::NumTargetFixupKinds] = {
       // Note: The number of bits indicated here are assumed to be contiguous.
       //   This does not hold true for LANAI_21 and LANAI_21_F which are applied
       //   to bits 0x7cffff and 0x7cfffc, respectively. Since the 'bits' counts
       //   here are used only for cosmetic purposes, we set the size to 16 bits
       //   for these 21-bit relocation as llvm/lib/MC/MCAsmStreamer.cpp checks
       //   no bits are set in the fixup range.
       //
       // name          offset bits flags
-      {"FIXUP_LANAI_NONE", 0, 32, 0},
       {"FIXUP_LANAI_21", 16, 16 /*21*/, 0},
       {"FIXUP_LANAI_21_F", 16, 16 /*21*/, 0},
       {"FIXUP_LANAI_25", 7, 25, 0},
       {"FIXUP_LANAI_32", 0, 32, 0},
       {"FIXUP_LANAI_HI16", 16, 16, 0},
       {"FIXUP_LANAI_LO16", 16, 16, 0}};
 
   if (Kind < FirstTargetFixupKind)

llvm/lib/Target/Lanai/MCTargetDesc/LanaiELFObjectWriter.cpp

case FK_Data_4:
     Type = ELF::R_LANAI_32;
     break;
   case Lanai::FIXUP_LANAI_HI16:
     Type = ELF::R_LANAI_HI16;
     break;
   case Lanai::FIXUP_LANAI_LO16:
     Type = ELF::R_LANAI_LO16;
     break;
-  case Lanai::FIXUP_LANAI_NONE:
-    Type = ELF::R_LANAI_NONE;
-    break;
 
   default:
     llvm_unreachable("Invalid fixup kind!");
   }
   return Type;
 }
 
 bool LanaiELFObjectWriter::needsRelocateWithSymbol(const MCSymbol & /*SD*/,

llvm/lib/Target/Lanai/MCTargetDesc/LanaiFixupKinds.h

 // one can have multiple fixup types for a given relocation and thus need
 // to be uniquely named.
 //
 // This table *must* be in the save order of
 // MCFixupKindInfo Infos[Lanai::NumTargetFixupKinds]
 // in LanaiAsmBackend.cpp.
 //
 enum Fixups {
-  // Results in R_Lanai_NONE
-  FIXUP_LANAI_NONE = FirstTargetFixupKind,
-
-  FIXUP_LANAI_21,   // 21-bit symbol relocation
+  FIXUP_LANAI_21 = FirstTargetFixupKind, // 21-bit symbol relocation
   FIXUP_LANAI_21_F, // 21-bit symbol relocation, last two bits masked to 0
   FIXUP_LANAI_25,   // 25-bit branch targets
   FIXUP_LANAI_32,   // general 32-bit relocation
   FIXUP_LANAI_HI16, // upper 16-bits of a symbolic relocation
   FIXUP_LANAI_LO16, // lower 16-bits of a symbolic relocation
 
   // Marker
   LastTargetFixupKind,
   NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
 };
 } // namespace Lanai
 } // namespace llvm
 
 #endif // LLVM_LIB_TARGET_LANAI_MCTARGETDESC_LANAIFIXUPKINDS_H

llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp

unsigned Idx = Endian == support::little
                        ? (microMipsLEByteOrder ? calculateMMLEIndex(i) : i)
                        : (FullSize - 1 - i);
     Data[Offset + Idx] = (uint8_t)((CurVal >> (i*8)) & 0xff);
   }
 }
 
 Optional<MCFixupKind> MipsAsmBackend::getFixupKind(StringRef Name) const {
   return StringSwitch<Optional<MCFixupKind>>(Name)
-      .Case("R_MIPS_NONE", (MCFixupKind)Mips::fixup_Mips_NONE)
       .Case("R_MIPS_32", FK_Data_4)
       .Case("R_MIPS_GOT_PAGE", (MCFixupKind)Mips::fixup_Mips_GOT_PAGE)
       .Case("R_MIPS_CALL_HI16", (MCFixupKind)Mips::fixup_Mips_CALL_HI16)
       .Case("R_MIPS_CALL_LO16", (MCFixupKind)Mips::fixup_Mips_CALL_LO16)
       .Case("R_MIPS_CALL16", (MCFixupKind)Mips::fixup_Mips_CALL16)
       .Case("R_MIPS_GOT16", (MCFixupKind)Mips::fixup_Mips_GOT)
       .Case("R_MIPS_GOT_PAGE", (MCFixupKind)Mips::fixup_Mips_GOT_PAGE)
       .Case("R_MIPS_GOT_OFST", (MCFixupKind)Mips::fixup_Mips_GOT_OFST)

 
 const MCFixupKindInfo &MipsAsmBackend::
 getFixupKindInfo(MCFixupKind Kind) const {
   const static MCFixupKindInfo LittleEndianInfos[] = {
     // This table *must* be in same the order of fixup_* kinds in
     // MipsFixupKinds.h.
     //
     // name                    offset  bits  flags
-    { "fixup_Mips_NONE",         0,      0,   0 },
     { "fixup_Mips_16",           0,     16,   0 },
     { "fixup_Mips_32",           0,     32,   0 },
     { "fixup_Mips_REL32",        0,     32,   0 },
     { "fixup_Mips_26",           0,     26,   0 },
     { "fixup_Mips_HI16",         0,     16,   0 },
     { "fixup_Mips_LO16",         0,     16,   0 },
     { "fixup_Mips_GPREL16",      0,     16,   0 },
     { "fixup_Mips_LITERAL",      0,     16,   0 },
getFixupKindInfo(MCFixupKind Kind) const {
   static_assert(array_lengthof(LittleEndianInfos) == Mips::NumTargetFixupKinds,
                 "Not all MIPS little endian fixup kinds added!");
 
   const static MCFixupKindInfo BigEndianInfos[] = {
     // This table *must* be in same the order of fixup_* kinds in
     // MipsFixupKinds.h.
     //
     // name                    offset  bits  flags
-    { "fixup_Mips_NONE",         0,      0,   0 },
     { "fixup_Mips_16",          16,     16,   0 },
     { "fixup_Mips_32",           0,     32,   0 },
     { "fixup_Mips_REL32",        0,     32,   0 },
     { "fixup_Mips_26",           6,     26,   0 },
     { "fixup_Mips_HI16",        16,     16,   0 },
     { "fixup_Mips_LO16",        16,     16,   0 },
     { "fixup_Mips_GPREL16",     16,     16,   0 },
     { "fixup_Mips_LITERAL",     16,     16,   0 },

llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp

 unsigned MipsELFObjectWriter::getRelocType(MCContext &Ctx,
                                            const MCValue &Target,
                                            const MCFixup &Fixup,
                                            bool IsPCRel) const {
   // Determine the type of the relocation.
   unsigned Kind = (unsigned)Fixup.getKind();
 
   switch (Kind) {
-  case Mips::fixup_Mips_NONE:
-    return ELF::R_MIPS_NONE;
   case FK_Data_1:
     Ctx.reportError(Fixup.getLoc(),
                     "MIPS does not support one byte relocations");
     return ELF::R_MIPS_NONE;
   case Mips::fixup_Mips_16:
   case FK_Data_2:
     return IsPCRel ? ELF::R_MIPS_PC16 : ELF::R_MIPS_16;
   case Mips::fixup_Mips_32:

llvm/lib/Target/Mips/MCTargetDesc/MipsFixupKinds.h

namespace Mips {
   // one can have multiple fixup types for a given relocation and thus need
   // to be uniquely named.
   //
   // This table *must* be in the same order of
   // MCFixupKindInfo Infos[Mips::NumTargetFixupKinds]
   // in MipsAsmBackend.cpp.
   //
   enum Fixups {
-    // Branch fixups resulting in R_MIPS_NONE.
-    fixup_Mips_NONE = FirstTargetFixupKind,
-
     // Branch fixups resulting in R_MIPS_16.
-    fixup_Mips_16,
+    fixup_Mips_16 = FirstTargetFixupKind,
 
     // Pure 32 bit data fixup resulting in - R_MIPS_32.
     fixup_Mips_32,
 
     // Full 32 bit data relative data fixup resulting in - R_MIPS_REL32.
     fixup_Mips_REL32,
 
     // Jump 26 bit fixup resulting in - R_MIPS_26.