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Differential D59760

[ARM][Asm] Accept upper case coprocessor number and registers
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Authored by olista01 on Mar 25 2019, 4:13 AM.

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Reviewers
efriedma
DavidSpickett
Commits
rG5c9023847919: [ARM][Asm] Accept upper case coprocessor number and registers
rL356984: [ARM][Asm] Accept upper case coprocessor number and registers

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rL LLVM

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olista01 created this revision.Mar 25 2019, 4:13 AM
Herald added a project: Restricted Project. · View Herald TranscriptMar 25 2019, 4:13 AM
Herald added subscribers: kristof.beyls, javed.absar. · View Herald Transcript
efriedma accepted this revision.Mar 25 2019, 12:19 PM

LGTM

This revision is now accepted and ready to land.Mar 25 2019, 12:19 PM
Closed by commit rL356984: [ARM][Asm] Accept upper case coprocessor number and registers (authored by olista01). · Explain WhyMar 26 2019, 3:25 AM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
lib/
Target/
ARM/
AsmParser/
4 lines
test/
MC/
ARM/
28 lines
28 lines

Diff 192071

lib/Target/ARM/AsmParser/ARMAsmParser.cpp

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OperandMatchResultTy OperandMatchResultTy
ARMAsmParser::parseCoprocNumOperand(OperandVector &Operands) { ARMAsmParser::parseCoprocNumOperand(OperandVector &Operands) {
MCAsmParser &Parser = getParser(); MCAsmParser &Parser = getParser();
SMLoc S = Parser.getTok().getLoc(); SMLoc S = Parser.getTok().getLoc();
const AsmToken &Tok = Parser.getTok(); const AsmToken &Tok = Parser.getTok();
if (Tok.isNot(AsmToken::Identifier)) if (Tok.isNot(AsmToken::Identifier))
return MatchOperand_NoMatch; return MatchOperand_NoMatch;
int Num = MatchCoprocessorOperandName(Tok.getString(), 'p'); int Num = MatchCoprocessorOperandName(Tok.getString().lower(), 'p');
if (Num == -1) if (Num == -1)
return MatchOperand_NoMatch; return MatchOperand_NoMatch;
// ARMv7 and v8 don't allow cp10/cp11 due to VFP/NEON specific instructions // ARMv7 and v8 don't allow cp10/cp11 due to VFP/NEON specific instructions
if ((hasV7Ops() || hasV8Ops()) && (Num == 10 || Num == 11)) if ((hasV7Ops() || hasV8Ops()) && (Num == 10 || Num == 11))
return MatchOperand_NoMatch; return MatchOperand_NoMatch;
Parser.Lex(); // Eat identifier token. Parser.Lex(); // Eat identifier token.
Operands.push_back(ARMOperand::CreateCoprocNum(Num, S)); Operands.push_back(ARMOperand::CreateCoprocNum(Num, S));
return MatchOperand_Success; return MatchOperand_Success;
} }
/// parseCoprocRegOperand - Try to parse an coprocessor register operand. The /// parseCoprocRegOperand - Try to parse an coprocessor register operand. The
/// token must be an Identifier when called, and if it is a coprocessor /// token must be an Identifier when called, and if it is a coprocessor
/// number, the token is eaten and the operand is added to the operand list. /// number, the token is eaten and the operand is added to the operand list.
OperandMatchResultTy OperandMatchResultTy
ARMAsmParser::parseCoprocRegOperand(OperandVector &Operands) { ARMAsmParser::parseCoprocRegOperand(OperandVector &Operands) {
MCAsmParser &Parser = getParser(); MCAsmParser &Parser = getParser();
SMLoc S = Parser.getTok().getLoc(); SMLoc S = Parser.getTok().getLoc();
const AsmToken &Tok = Parser.getTok(); const AsmToken &Tok = Parser.getTok();
if (Tok.isNot(AsmToken::Identifier)) if (Tok.isNot(AsmToken::Identifier))
return MatchOperand_NoMatch; return MatchOperand_NoMatch;
int Reg = MatchCoprocessorOperandName(Tok.getString(), 'c'); int Reg = MatchCoprocessorOperandName(Tok.getString().lower(), 'c');
if (Reg == -1) if (Reg == -1)
return MatchOperand_NoMatch; return MatchOperand_NoMatch;
Parser.Lex(); // Eat identifier token. Parser.Lex(); // Eat identifier token.
Operands.push_back(ARMOperand::CreateCoprocReg(Reg, S)); Operands.push_back(ARMOperand::CreateCoprocReg(Reg, S));
return MatchOperand_Success; return MatchOperand_Success;
} }
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test/MC/ARM/basic-arm-instructions.s

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@ CHECK: lsr r4, r4, #2 @ encoding: [0x24,0x41,0xa0,0xe1] @ CHECK: lsr r4, r4, #2 @ encoding: [0x24,0x41,0xa0,0xe1]
@------------------------------------------------------------------------------ @------------------------------------------------------------------------------
@ MCR/MCR2 @ MCR/MCR2
@------------------------------------------------------------------------------ @------------------------------------------------------------------------------
mcr p7, #1, r5, c1, c1, #4 mcr p7, #1, r5, c1, c1, #4
mcr2 p7, #1, r5, c1, c1, #4 mcr2 p7, #1, r5, c1, c1, #4
MCR P7, #1, R5, C1, C1, #4
MCR2 P7, #1, R5, C1, C1, #4
@ CHECK: mcr p7, #1, r5, c1, c1, #4 @ encoding: [0x91,0x57,0x21,0xee] @ CHECK: mcr p7, #1, r5, c1, c1, #4 @ encoding: [0x91,0x57,0x21,0xee]
@ CHECK: mcr2 p7, #1, r5, c1, c1, #4 @ encoding: [0x91,0x57,0x21,0xfe] @ CHECK: mcr2 p7, #1, r5, c1, c1, #4 @ encoding: [0x91,0x57,0x21,0xfe]
@ CHECK: mcr p7, #1, r5, c1, c1, #4 @ encoding: [0x91,0x57,0x21,0xee]
@ CHECK: mcr2 p7, #1, r5, c1, c1, #4 @ encoding: [0x91,0x57,0x21,0xfe]
mcrls p7, #1, r5, c1, c1, #4 mcrls p7, #1, r5, c1, c1, #4
MCRLS P7, #1, R5, C1, C1, #4
@ CHECK: mcrls p7, #1, r5, c1, c1, #4 @ encoding: [0x91,0x57,0x21,0x9e]
@ CHECK: mcrls p7, #1, r5, c1, c1, #4 @ encoding: [0x91,0x57,0x21,0x9e] @ CHECK: mcrls p7, #1, r5, c1, c1, #4 @ encoding: [0x91,0x57,0x21,0x9e]
@------------------------------------------------------------------------------ @------------------------------------------------------------------------------
@ MCRR/MCRR2 @ MCRR/MCRR2
@------------------------------------------------------------------------------ @------------------------------------------------------------------------------
mcrr p7, #15, r5, r4, c1 mcrr p7, #15, r5, r4, c1
mcrr2 p7, #15, r5, r4, c1 mcrr2 p7, #15, r5, r4, c1
MCRR P7, #15, R5, R4, C1
MCRR2 P7, #15, R5, R4, C1
@ CHECK: mcrr p7, #15, r5, r4, c1 @ encoding: [0xf1,0x57,0x44,0xec] @ CHECK: mcrr p7, #15, r5, r4, c1 @ encoding: [0xf1,0x57,0x44,0xec]
@ CHECK: mcrr2 p7, #15, r5, r4, c1 @ encoding: [0xf1,0x57,0x44,0xfc] @ CHECK: mcrr2 p7, #15, r5, r4, c1 @ encoding: [0xf1,0x57,0x44,0xfc]
@ CHECK: mcrr p7, #15, r5, r4, c1 @ encoding: [0xf1,0x57,0x44,0xec]
@ CHECK: mcrr2 p7, #15, r5, r4, c1 @ encoding: [0xf1,0x57,0x44,0xfc]
mcrrgt p7, #15, r5, r4, c1 mcrrgt p7, #15, r5, r4, c1
MCRRGT P7, #15, R5, R4, C1
@ CHECK: mcrrgt p7, #15, r5, r4, c1 @ encoding: [0xf1,0x57,0x44,0xcc]
@ CHECK: mcrrgt p7, #15, r5, r4, c1 @ encoding: [0xf1,0x57,0x44,0xcc] @ CHECK: mcrrgt p7, #15, r5, r4, c1 @ encoding: [0xf1,0x57,0x44,0xcc]
@------------------------------------------------------------------------------ @------------------------------------------------------------------------------
@ MLA @ MLA
@------------------------------------------------------------------------------ @------------------------------------------------------------------------------
mla r1,r2,r3,r4 mla r1,r2,r3,r4
mlas r1,r2,r3,r4 mlas r1,r2,r3,r4
mlane r1,r2,r3,r4 mlane r1,r2,r3,r4
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@------------------------------------------------------------------------------ @------------------------------------------------------------------------------
@ MRC/MRC2 @ MRC/MRC2
@------------------------------------------------------------------------------ @------------------------------------------------------------------------------
mrc p14, #0, r1, c1, c2, #4 mrc p14, #0, r1, c1, c2, #4
mrc p15, #7, apsr_nzcv, c15, c6, #6 mrc p15, #7, apsr_nzcv, c15, c6, #6
mrc2 p14, #0, r1, c1, c2, #4 mrc2 p14, #0, r1, c1, c2, #4
mrc2 p9, #7, apsr_nzcv, c15, c0, #1 mrc2 p9, #7, apsr_nzcv, c15, c0, #1
MRC P14, #0, R1, C1, C2, #4
MRC P15, #7, APSR_NZCV, C15, C6, #6
MRC2 P14, #0, R1, C1, C2, #4
MRC2 P9, #7, APSR_NZCV, C15, C0, #1
@ CHECK: mrc p14, #0, r1, c1, c2, #4 @ encoding: [0x92,0x1e,0x11,0xee] @ CHECK: mrc p14, #0, r1, c1, c2, #4 @ encoding: [0x92,0x1e,0x11,0xee]
@ CHECK: mrc p15, #7, apsr_nzcv, c15, c6, #6 @ encoding: [0xd6,0xff,0xff,0xee] @ CHECK: mrc p15, #7, apsr_nzcv, c15, c6, #6 @ encoding: [0xd6,0xff,0xff,0xee]
@ CHECK: mrc2 p14, #0, r1, c1, c2, #4 @ encoding: [0x92,0x1e,0x11,0xfe] @ CHECK: mrc2 p14, #0, r1, c1, c2, #4 @ encoding: [0x92,0x1e,0x11,0xfe]
@ CHECK: mrc2 p9, #7, apsr_nzcv, c15, c0, #1 @ encoding: [0x30,0xf9,0xff,0xfe] @ CHECK: mrc2 p9, #7, apsr_nzcv, c15, c0, #1 @ encoding: [0x30,0xf9,0xff,0xfe]
@ CHECK: mrc p14, #0, r1, c1, c2, #4 @ encoding: [0x92,0x1e,0x11,0xee]
@ CHECK: mrc p15, #7, apsr_nzcv, c15, c6, #6 @ encoding: [0xd6,0xff,0xff,0xee]
@ CHECK: mrc2 p14, #0, r1, c1, c2, #4 @ encoding: [0x92,0x1e,0x11,0xfe]
@ CHECK: mrc2 p9, #7, apsr_nzcv, c15, c0, #1 @ encoding: [0x30,0xf9,0xff,0xfe]
mrceq p15, #7, apsr_nzcv, c15, c6, #6 mrceq p15, #7, apsr_nzcv, c15, c6, #6
MRCEQ P15, #7, APSR_NZCV, C15, C6, #6
@ CHECK: mrceq p15, #7, apsr_nzcv, c15, c6, #6 @ encoding: [0xd6,0xff,0xff,0x0e]
@ CHECK: mrceq p15, #7, apsr_nzcv, c15, c6, #6 @ encoding: [0xd6,0xff,0xff,0x0e] @ CHECK: mrceq p15, #7, apsr_nzcv, c15, c6, #6 @ encoding: [0xd6,0xff,0xff,0x0e]
@------------------------------------------------------------------------------ @------------------------------------------------------------------------------
@ MRRC/MRRC2 @ MRRC/MRRC2
@------------------------------------------------------------------------------ @------------------------------------------------------------------------------
mrrc p7, #1, r5, r4, c1 mrrc p7, #1, r5, r4, c1
mrrc2 p7, #1, r5, r4, c1 mrrc2 p7, #1, r5, r4, c1
MRRC P7, #1, R5, R4, C1
MRRC2 P7, #1, R5, R4, C1
@ CHECK: mrrc p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0xec] @ CHECK: mrrc p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0xec]
@ CHECK: mrrc2 p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0xfc] @ CHECK: mrrc2 p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0xfc]
@ CHECK: mrrc p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0xec]
@ CHECK: mrrc2 p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0xfc]
mrrclo p7, #1, r5, r4, c1 mrrclo p7, #1, r5, r4, c1
MRRCLO P7, #1, R5, R4, C1
@ CHECK: mrrclo p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0x3c]
@ CHECK: mrrclo p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0x3c] @ CHECK: mrrclo p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0x3c]
@------------------------------------------------------------------------------ @------------------------------------------------------------------------------
@ MRS @ MRS
@------------------------------------------------------------------------------ @------------------------------------------------------------------------------
mrs r8, apsr mrs r8, apsr
mrs r8, cpsr mrs r8, cpsr
mrs r8, spsr mrs r8, spsr
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test/MC/ARM/basic-thumb2-instructions.s

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@------------------------------------------------------------------------------ @------------------------------------------------------------------------------
@ MCR/MCR2 @ MCR/MCR2
@------------------------------------------------------------------------------ @------------------------------------------------------------------------------
mcr p7, #1, r5, c1, c1, #4 mcr p7, #1, r5, c1, c1, #4
mcr2 p7, #1, r5, c1, c1, #4 mcr2 p7, #1, r5, c1, c1, #4
mcr p14, #0, r4, c0, c5 mcr p14, #0, r4, c0, c5
mcr2 p4, #2, r2, c1, c3 mcr2 p4, #2, r2, c1, c3
MCR P7, #1, R5, C1, C1, #4
MCR2 P7, #1, R5, C1, C1, #4
MCR P14, #0, R4, C0, C5
MCR2 P4, #2, R2, C1, C3
@ CHECK: mcr p7, #1, r5, c1, c1, #4 @ encoding: [0x21,0xee,0x91,0x57] @ CHECK: mcr p7, #1, r5, c1, c1, #4 @ encoding: [0x21,0xee,0x91,0x57]
@ CHECK: mcr2 p7, #1, r5, c1, c1, #4 @ encoding: [0x21,0xfe,0x91,0x57] @ CHECK: mcr2 p7, #1, r5, c1, c1, #4 @ encoding: [0x21,0xfe,0x91,0x57]
@ CHECK: mcr p14, #0, r4, c0, c5, #0 @ encoding: [0x00,0xee,0x15,0x4e] @ CHECK: mcr p14, #0, r4, c0, c5, #0 @ encoding: [0x00,0xee,0x15,0x4e]
@ CHECK: mcr2 p4, #2, r2, c1, c3, #0 @ encoding: [0x41,0xfe,0x13,0x24] @ CHECK: mcr2 p4, #2, r2, c1, c3, #0 @ encoding: [0x41,0xfe,0x13,0x24]
@ CHECK: mcr p7, #1, r5, c1, c1, #4 @ encoding: [0x21,0xee,0x91,0x57]
@ CHECK: mcr2 p7, #1, r5, c1, c1, #4 @ encoding: [0x21,0xfe,0x91,0x57]
@ CHECK: mcr p14, #0, r4, c0, c5, #0 @ encoding: [0x00,0xee,0x15,0x4e]
@ CHECK: mcr2 p4, #2, r2, c1, c3, #0 @ encoding: [0x41,0xfe,0x13,0x24]
@------------------------------------------------------------------------------ @------------------------------------------------------------------------------
@ MCRR/MCRR2 @ MCRR/MCRR2
@------------------------------------------------------------------------------ @------------------------------------------------------------------------------
mcrr p7, #15, r5, r4, c1 mcrr p7, #15, r5, r4, c1
mcrr2 p7, #15, r5, r4, c1 mcrr2 p7, #15, r5, r4, c1
MCRR P7, #15, R5, R4, C1
MCRR2 P7, #15, R5, R4, C1
@ CHECK: mcrr p7, #15, r5, r4, c1 @ encoding: [0x44,0xec,0xf1,0x57] @ CHECK: mcrr p7, #15, r5, r4, c1 @ encoding: [0x44,0xec,0xf1,0x57]
@ CHECK: mcrr2 p7, #15, r5, r4, c1 @ encoding: [0x44,0xfc,0xf1,0x57] @ CHECK: mcrr2 p7, #15, r5, r4, c1 @ encoding: [0x44,0xfc,0xf1,0x57]
@ CHECK: mcrr p7, #15, r5, r4, c1 @ encoding: [0x44,0xec,0xf1,0x57]
@ CHECK: mcrr2 p7, #15, r5, r4, c1 @ encoding: [0x44,0xfc,0xf1,0x57]
@------------------------------------------------------------------------------ @------------------------------------------------------------------------------
@ MLA/MLS @ MLA/MLS
@------------------------------------------------------------------------------ @------------------------------------------------------------------------------
mla r1,r2,r3,r4 mla r1,r2,r3,r4
mls r1,r2,r3,r4 mls r1,r2,r3,r4
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@ MRC/MRC2 @ MRC/MRC2
@------------------------------------------------------------------------------ @------------------------------------------------------------------------------
mrc p14, #0, r1, c1, c2, #4 mrc p14, #0, r1, c1, c2, #4
mrc p15, #7, apsr_nzcv, c15, c6, #6 mrc p15, #7, apsr_nzcv, c15, c6, #6
mrc p9, #1, r1, c2, c2 mrc p9, #1, r1, c2, c2
mrc2 p12, #3, r3, c3, c4 mrc2 p12, #3, r3, c3, c4
mrc2 p14, #0, r1, c1, c2, #4 mrc2 p14, #0, r1, c1, c2, #4
mrc2 p8, #7, apsr_nzcv, c15, c0, #1 mrc2 p8, #7, apsr_nzcv, c15, c0, #1
MRC P14, #0, R1, C1, C2, #4
MRC P15, #7, APSR_NZCV, C15, C6, #6
MRC P9, #1, R1, C2, C2
MRC2 P12, #3, R3, C3, C4
MRC2 P14, #0, R1, C1, C2, #4
MRC2 P8, #7, APSR_NZCV, C15, C0, #1
@ CHECK: mrc p14, #0, r1, c1, c2, #4 @ encoding: [0x11,0xee,0x92,0x1e] @ CHECK: mrc p14, #0, r1, c1, c2, #4 @ encoding: [0x11,0xee,0x92,0x1e]
@ CHECK: mrc p15, #7, apsr_nzcv, c15, c6, #6 @ encoding: [0xff,0xee,0xd6,0xff] @ CHECK: mrc p15, #7, apsr_nzcv, c15, c6, #6 @ encoding: [0xff,0xee,0xd6,0xff]
@ CHECK: mrc p9, #1, r1, c2, c2, #0 @ encoding: [0x32,0xee,0x12,0x19] @ CHECK: mrc p9, #1, r1, c2, c2, #0 @ encoding: [0x32,0xee,0x12,0x19]
@ CHECK: mrc2 p12, #3, r3, c3, c4, #0 @ encoding: [0x73,0xfe,0x14,0x3c] @ CHECK: mrc2 p12, #3, r3, c3, c4, #0 @ encoding: [0x73,0xfe,0x14,0x3c]
@ CHECK: mrc2 p14, #0, r1, c1, c2, #4 @ encoding: [0x11,0xfe,0x92,0x1e] @ CHECK: mrc2 p14, #0, r1, c1, c2, #4 @ encoding: [0x11,0xfe,0x92,0x1e]
@ CHECK: mrc2 p8, #7, apsr_nzcv, c15, c0, #1 @ encoding: [0xff,0xfe,0x30,0xf8] @ CHECK: mrc2 p8, #7, apsr_nzcv, c15, c0, #1 @ encoding: [0xff,0xfe,0x30,0xf8]
@ CHECK: mrc p14, #0, r1, c1, c2, #4 @ encoding: [0x11,0xee,0x92,0x1e]
@ CHECK: mrc p15, #7, apsr_nzcv, c15, c6, #6 @ encoding: [0xff,0xee,0xd6,0xff]
@ CHECK: mrc p9, #1, r1, c2, c2, #0 @ encoding: [0x32,0xee,0x12,0x19]
@ CHECK: mrc2 p12, #3, r3, c3, c4, #0 @ encoding: [0x73,0xfe,0x14,0x3c]
@ CHECK: mrc2 p14, #0, r1, c1, c2, #4 @ encoding: [0x11,0xfe,0x92,0x1e]
@ CHECK: mrc2 p8, #7, apsr_nzcv, c15, c0, #1 @ encoding: [0xff,0xfe,0x30,0xf8]
@------------------------------------------------------------------------------ @------------------------------------------------------------------------------
@ MRRC/MRRC2 @ MRRC/MRRC2
@------------------------------------------------------------------------------ @------------------------------------------------------------------------------
mrrc p7, #1, r5, r4, c1 mrrc p7, #1, r5, r4, c1
mrrc2 p7, #1, r5, r4, c1 mrrc2 p7, #1, r5, r4, c1
MRRC P7, #1, R5, R4, C1
MRRC2 P7, #1, R5, R4, C1
@ CHECK: mrrc p7, #1, r5, r4, c1 @ encoding: [0x54,0xec,0x11,0x57] @ CHECK: mrrc p7, #1, r5, r4, c1 @ encoding: [0x54,0xec,0x11,0x57]
@ CHECK: mrrc2 p7, #1, r5, r4, c1 @ encoding: [0x54,0xfc,0x11,0x57] @ CHECK: mrrc2 p7, #1, r5, r4, c1 @ encoding: [0x54,0xfc,0x11,0x57]
@ CHECK: mrrc p7, #1, r5, r4, c1 @ encoding: [0x54,0xec,0x11,0x57]
@ CHECK: mrrc2 p7, #1, r5, r4, c1 @ encoding: [0x54,0xfc,0x11,0x57]
@------------------------------------------------------------------------------ @------------------------------------------------------------------------------
@ MRS @ MRS
@------------------------------------------------------------------------------ @------------------------------------------------------------------------------
mrs r8, apsr mrs r8, apsr
mrs r8, cpsr mrs r8, cpsr
mrs r8, spsr mrs r8, spsr
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