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[X86] Use movq for i64 atomic load on 32-bit targets when sse2 is enable
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Authored by craig.topper on Mar 21 2019, 5:22 PM.

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Summary

We used a lock cmpxchg8b to do i64 atomic loads. But if we have SSE2 we can do better and use a plain movq to do the load instead.

I tried to just use an f64 atomic load and add isel patterns to MOVSD(which the domain fixing pass can turn to MOVQ), but the atomic_load SDNode in TargetSelectionDAG.td requires the type to be integer.

So I've emitted VZEXT_LOAD instead which should be selected by isel to a MOVQ. Hopefully we don't need a specific atomic flavor of this. I kept the memory operand from the original AtomicSDNode. I wasn't sure if I might need to set the MOVolatile flag?

I've left some FIXMEs for improvements we can do without SSE2.

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craig.topper created this revision.Mar 21 2019, 5:22 PM
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From what I understand, the atomic marking in the memory operand should be enough (assuming there aren't any relevant target-specific DAGCombines).

Maybe also add CHECK lines to test/CodeGen/X86/atomic-non-integer.ll?

llvm/test/CodeGen/X86/atomic-load-store-wide.ll
41 ↗(On Diff #191806)

Maybe we should keep test coverage for old CPUs? Or is that unlikely to be useful?

Update atomic-non-integer.ll too. Add an old CPU command line to atomic-load-store-wide.ll

Do we need to check for NoImplicitFloat somewhere?

Block the transform if noimplicitfloat is set on the function.

This revision is now accepted and ready to land.Mar 22 2019, 1:10 PM
This revision was automatically updated to reflect the committed changes.