AMDGPU: Don't bother checking the chain in areLoadsFromSameBasePtr

[arsenm]

Summary

This is only called in contexts that are verifying the chain itself,
and the query itself is only asking about the address.

[rampitec]

LGTM

[arsenm]

r355723

[hakzsam]

Hi,

This introduces a regression with this LLVM IR https://hastebin.com/yuzomezazi
It crashes inside llvm::SIInstrInfo::areLoadsFromSameBasePtr for some reasons.

Can you take a look?
Thanks!

lib/Target/AMDGPU/SIInstrInfo.cpp

 
 static unsigned getNumOperandsNoGlue(SDNode *Node) {
   unsigned N = Node->getNumOperands();
   while (N && Node->getOperand(N - 1).getValueType() == MVT::Glue)
     --N;
   return N;
 }
 
-static SDValue findChainOperand(SDNode *Load) {
-  SDValue LastOp = Load->getOperand(getNumOperandsNoGlue(Load) - 1);
-  assert(LastOp.getValueType() == MVT::Other && "Chain missing from load node");
-  return LastOp;
-}
-
 /// Returns true if both nodes have the same value for the given
 ///        operand \p Op, or if both nodes do not have this operand.
 static bool nodesHaveSameOperandValue(SDNode *N0, SDNode* N1, unsigned OpName) {
   unsigned Opc0 = N0->getMachineOpcode();
   unsigned Opc1 = N1->getMachineOpcode();
 
   int Op0Idx = AMDGPU::getNamedOperandIdx(Opc0, OpName);
   int Op1Idx = AMDGPU::getNamedOperandIdx(Opc1, OpName);
if (isDS(Opc0) && isDS(Opc1)) {
     // FIXME: Handle this case:
     if (getNumOperandsNoGlue(Load0) != getNumOperandsNoGlue(Load1))
       return false;
 
     // Check base reg.
     if (Load0->getOperand(0) != Load1->getOperand(0))
       return false;
 
-    // Check chain.
-    if (findChainOperand(Load0) != findChainOperand(Load1))
-      return false;
-
     // Skip read2 / write2 variants for simplicity.
     // TODO: We should report true if the used offsets are adjacent (excluded
     // st64 versions).
     if (AMDGPU::getNamedOperandIdx(Opc0, AMDGPU::OpName::data1) != -1 ||
         AMDGPU::getNamedOperandIdx(Opc1, AMDGPU::OpName::data1) != -1)
       return false;
 
     Offset0 = cast<ConstantSDNode>(Load0->getOperand(1))->getZExtValue();
if (isSMRD(Opc0) && isSMRD(Opc1)) {
     const ConstantSDNode *Load0Offset =
         dyn_cast<ConstantSDNode>(Load0->getOperand(1));
     const ConstantSDNode *Load1Offset =
         dyn_cast<ConstantSDNode>(Load1->getOperand(1));
 
     if (!Load0Offset || !Load1Offset)
       return false;
 
-    // Check chain.
-    if (findChainOperand(Load0) != findChainOperand(Load1))
-      return false;
-
     Offset0 = Load0Offset->getZExtValue();
     Offset1 = Load1Offset->getZExtValue();
     return true;
   }
 
   // MUBUF and MTBUF can access the same addresses.
   if ((isMUBUF(Opc0) || isMTBUF(Opc0)) && (isMUBUF(Opc1) || isMTBUF(Opc1))) {
 
     // MUBUF and MTBUF have vaddr at different indices.
     if (!nodesHaveSameOperandValue(Load0, Load1, AMDGPU::OpName::soffset) ||
-        findChainOperand(Load0) != findChainOperand(Load1) ||
         !nodesHaveSameOperandValue(Load0, Load1, AMDGPU::OpName::vaddr) ||
         !nodesHaveSameOperandValue(Load0, Load1, AMDGPU::OpName::srsrc))
       return false;
 
     int OffIdx0 = AMDGPU::getNamedOperandIdx(Opc0, AMDGPU::OpName::offset);
     int OffIdx1 = AMDGPU::getNamedOperandIdx(Opc1, AMDGPU::OpName::offset);
 
     if (OffIdx0 == -1 || OffIdx1 == -1)