- Add LLVM backend support for Cortex-M35P
- Documentation can be found at https://developer.arm.com/products/processors/cortex-m/cortex-m35p
Details
Diff Detail
Event Timeline
| lib/Target/ARM/ARM.td | ||
|---|---|---|
| 756 | Whitespace change. | |
| 1019 | Why are you enabling FeatureUseMISched? This is using the Cortex-M3 sched model, and Cortex-M3 doesn't have it. | |
| test/CodeGen/ARM/build-attributes.ll | ||
| 111 | It's confusing to have this share the CORTEX-M33-FAST check prefix, could you rename it to something more generic? (or remove it, I don't think these build attributes are related to the core). | |
| 1412 | This is an Arm-internal ticket number, this should be fixed to check standard LLVM behaviour. | |
| lib/Target/ARM/ARM.td | ||
|---|---|---|
| 1019 | My understanding is that this is very similar to the M33 from a compiler perspective. You can use the same features as there from a performance perspective (FeaturePrefLoopAlign32, FeatureHasSlowFPVMLx, FeatureHasNoBranchPredictor). | |
- Remove FeatureMISched to match Cortex-M33
- Remove arm internal ticket number
- Remove unnecessary test
Other than adding the two optimisation features, this LGTM.
| lib/Target/ARM/ARM.td | ||
|---|---|---|
| 1018 | You can add FeaturePrefLoopAlign32 and FeatureHasSlowFPVMLx too. | |
Whitespace change.