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[ARM] Add Cortex-M35P
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Authored by LukeCheeseman on Feb 5 2019, 9:24 AM.

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olista01
dmgreen
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LukeCheeseman created this revision.Feb 5 2019, 9:24 AM
LukeCheeseman edited the summary of this revision. (Show Details)Feb 5 2019, 9:25 AM
olista01 requested changes to this revision.Feb 6 2019, 5:22 AM
olista01 added inline comments.
lib/Target/ARM/ARM.td
756

Whitespace change.

1019

Why are you enabling FeatureUseMISched? This is using the Cortex-M3 sched model, and Cortex-M3 doesn't have it.

test/CodeGen/ARM/build-attributes.ll
111

It's confusing to have this share the CORTEX-M33-FAST check prefix, could you rename it to something more generic? (or remove it, I don't think these build attributes are related to the core).

1412

This is an Arm-internal ticket number, this should be fixed to check standard LLVM behaviour.

This revision now requires changes to proceed.Feb 6 2019, 5:22 AM
dmgreen added a subscriber: dmgreen.Feb 6 2019, 2:04 PM
dmgreen added inline comments.
lib/Target/ARM/ARM.td
1019

My understanding is that this is very similar to the M33 from a compiler perspective. You can use the same features as there from a performance perspective (FeaturePrefLoopAlign32, FeatureHasSlowFPVMLx, FeatureHasNoBranchPredictor).

  • Remove FeatureMISched to match Cortex-M33
  • Remove arm internal ticket number
  • Remove unnecessary test
LukeCheeseman marked 3 inline comments as done.Feb 25 2019, 10:12 AM
dmgreen accepted this revision.Feb 26 2019, 12:57 AM

Other than adding the two optimisation features, this LGTM.

lib/Target/ARM/ARM.td
1018

You can add FeaturePrefLoopAlign32 and FeatureHasSlowFPVMLx too.

  • Add FeaturePrefLoopAlign32 and FeatureHasSlowFPVMLx to Cortex-M35P
dmgreen accepted this revision.Feb 26 2019, 3:46 AM

LGTM, cheers

olista01 accepted this revision.Mar 14 2019, 3:00 AM
This revision is now accepted and ready to land.Mar 14 2019, 3:00 AM
LukeCheeseman closed this revision.Mar 14 2019, 3:21 AM

closed by r354868