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Differential D57078

[PowerPC] Enhance the fast selection of cmp instruction and clean up related asserts
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Authored by • wuzish on Jan 22 2019, 7:12 PM.

Details

Reviewers
hfinkel
nemanjai
jsji
Commits
rG308a609c6ee9: [PowerPC] Enhance the fast selection of cmp instruction and clean up related…
rL352174: [PowerPC] Enhance the fast selection of cmp instruction and clean up related…
Summary

Fast selection of llvm icmp and fcmp instructions is not handled well about VSX instruction support.

We'd use VSX float comparison instruction instead of non-vsx float comparison instruction if the operand register class is VSSRC or VSFRC because i32 and i64 are mapped to VSSRC and VSFRC correspondingly if VSX feature is opened.

If the target does not have corresponding VSX instruction comparison for some type, just copy VSX-related register to common float register class and use non-vsx comparison instruction.

Diff Detail

Repository
rL LLVM

Event Timeline

• wuzish created this revision.Jan 22 2019, 7:12 PM
Herald added subscribers: llvm-commits, kbarton, hiraditya. · View Herald TranscriptJan 22 2019, 7:12 PM
• wuzish updated this revision to Diff 183025.Jan 22 2019, 7:31 PM

Make patch up-to-date.

• wuzish added a comment.Jan 23 2019, 11:22 PM

gentle pin 😄

hfinkel accepted this revision.Jan 24 2019, 8:56 AM

LGTM

This revision is now accepted and ready to land.Jan 24 2019, 8:56 AM
Closed by commit rL352174: [PowerPC] Enhance the fast selection of cmp instruction and clean up related… (authored by • wuzish). · Explain WhyJan 24 2019, 11:25 PM
This revision was automatically updated to reflect the committed changes.

Revision Contents

PathSize
llvm/
trunk/
lib/
Target/
PowerPC/
15 lines
test/
CodeGen/
PowerPC/
179 lines

Diff 183484

llvm/trunk/lib/Target/PowerPC/PPCFastISel.cpp

Show First 20 Lines • Show All 867 Lines • ▼ Show 20 Linesbool PPCFastISel::PPCEmitCmp(const Value *SrcValue1, const Value *SrcValue2,
if (!UseImm) { if (!UseImm) {
SrcReg2 = getRegForValue(SrcValue2); SrcReg2 = getRegForValue(SrcValue2);
if (SrcReg2 == 0) if (SrcReg2 == 0)
return false; return false;
} }
unsigned CmpOpc; unsigned CmpOpc;
bool NeedsExt = false; bool NeedsExt = false;
auto RC = MRI.getRegClass(SrcReg1);
auto RC1 = MRI.getRegClass(SrcReg1);
auto RC2 = SrcReg2 != 0 ? MRI.getRegClass(SrcReg2) : nullptr;
switch (SrcVT.SimpleTy) { switch (SrcVT.SimpleTy) {
default: return false; default: return false;
case MVT::f32: case MVT::f32:
if (HasSPE) { if (HasSPE) {
switch (Pred) { switch (Pred) {
default: return false; default: return false;
case PPC::PRED_EQ: case PPC::PRED_EQ:
CmpOpc = PPC::EFSCMPEQ; CmpOpc = PPC::EFSCMPEQ;
break; break;
case PPC::PRED_LT: case PPC::PRED_LT:
CmpOpc = PPC::EFSCMPLT; CmpOpc = PPC::EFSCMPLT;
break; break;
case PPC::PRED_GT: case PPC::PRED_GT:
CmpOpc = PPC::EFSCMPGT; CmpOpc = PPC::EFSCMPGT;
break; break;
} }
} else { } else {
CmpOpc = PPC::FCMPUS; CmpOpc = PPC::FCMPUS;
if (isVSSRCRegClass(RC)) { if (isVSSRCRegClass(RC1)) {
unsigned TmpReg = createResultReg(&PPC::F4RCRegClass); unsigned TmpReg = createResultReg(&PPC::F4RCRegClass);
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
TII.get(TargetOpcode::COPY), TmpReg).addReg(SrcReg1); TII.get(TargetOpcode::COPY), TmpReg).addReg(SrcReg1);
SrcReg1 = TmpReg; SrcReg1 = TmpReg;
} }
if (RC2 && isVSSRCRegClass(RC2)) {
unsigned TmpReg = createResultReg(&PPC::F4RCRegClass);
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
TII.get(TargetOpcode::COPY), TmpReg).addReg(SrcReg2);
SrcReg2 = TmpReg;
}
} }
break; break;
case MVT::f64: case MVT::f64:
if (HasSPE) { if (HasSPE) {
switch (Pred) { switch (Pred) {
default: return false; default: return false;
case PPC::PRED_EQ: case PPC::PRED_EQ:
CmpOpc = PPC::EFDCMPEQ; CmpOpc = PPC::EFDCMPEQ;
break; break;
case PPC::PRED_LT: case PPC::PRED_LT:
CmpOpc = PPC::EFDCMPLT; CmpOpc = PPC::EFDCMPLT;
break; break;
case PPC::PRED_GT: case PPC::PRED_GT:
CmpOpc = PPC::EFDCMPGT; CmpOpc = PPC::EFDCMPGT;
break; break;
} }
} else if (isVSFRCRegClass(RC)) { } else if (isVSFRCRegClass(RC1) || (RC2 && isVSFRCRegClass(RC2))) {
CmpOpc = PPC::XSCMPUDP; CmpOpc = PPC::XSCMPUDP;
} else { } else {
CmpOpc = PPC::FCMPUD; CmpOpc = PPC::FCMPUD;
} }
break; break;
case MVT::i1: case MVT::i1:
case MVT::i8: case MVT::i8:
case MVT::i16: case MVT::i16:
▲ Show 20 Lines • Show All 1,551 Lines • Show Last 20 Lines

llvm/trunk/test/CodeGen/PowerPC/fast-isel-cmp-imm.ll

; FIXME: FastISel currently returns false if it hits code that uses VSX
; registers and with -fast-isel-abort=1 turned on the test case will then fail.
; When fastisel better supports VSX fix up this test case.
;
; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx | FileCheck %s --check-prefix=ELF64 ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx | FileCheck %s --check-prefix=ELF64
; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -mtriple=powerpc64le-unknown-linux-gnu -mattr=+vsx | FileCheck %s --check-prefix=VSX
; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -mtriple=powerpc-unknown-linux-gnu -mcpu=e500 -mattr=spe | FileCheck %s --check-prefix=SPE ; RUN: llc < %s -O0 -verify-machineinstrs -fast-isel-abort=1 -mtriple=powerpc-unknown-linux-gnu -mcpu=e500 -mattr=spe | FileCheck %s --check-prefix=SPE
declare void @foo()
define void @t1a(float %a) nounwind { define void @t1a(float %a) nounwind {
entry: entry:
; ELF64: t1a ; ELF64-LABEL: @t1a
; SPE: t1a ; SPE-LABEL: @t1a
; VSX-LABEL: @t1a
%cmp = fcmp oeq float %a, 0.000000e+00 %cmp = fcmp oeq float %a, 0.000000e+00
; ELF64: addis ; ELF64: addis
; ELF64: lfs ; ELF64: lfs
; ELF64: fcmpu ; ELF64: fcmpu
; VSX: addis
; VSX: lfs
; VSX: fcmpu
; SPE: efscmpeq ; SPE: efscmpeq
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
call void @foo() call void @foo()
br label %if.end br label %if.end
if.end: ; preds = %if.then, %entry if.end: ; preds = %if.then, %entry
ret void ret void
} }
declare void @foo()
define void @t1b(float %a) nounwind { define void @t1b(float %a) nounwind {
entry: entry:
; ELF64: t1b ; ELF64-LABEL: @t1b
; SPE: t1b ; SPE-LABEL: @t1b
; VSX-LABEL: @t1b
%cmp = fcmp oeq float %a, -0.000000e+00 %cmp = fcmp oeq float %a, -0.000000e+00
; ELF64: addis ; ELF64: addis
; ELF64: lfs ; ELF64: lfs
; ELF64: fcmpu ; ELF64: fcmpu
; VSX: addis
; VSX: lfs
; VSX: fcmpu
; SPE: efscmpeq
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
call void @foo()
br label %if.end
if.end: ; preds = %if.then, %entry
ret void
}
define void @t1c(float %a) nounwind {
entry:
; ELF64-LABEL: @t1c
; SPE-LABEL: @t1c
; VSX-LABEL: @t1c
%cmp = fcmp oeq float -0.000000e+00, %a
; ELF64: addis
; ELF64: lfs
; ELF64: fcmpu
; VSX: addis
; VSX: lfs
; VSX: fcmpu
; SPE: efscmpeq ; SPE: efscmpeq
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
call void @foo() call void @foo()
br label %if.end br label %if.end
if.end: ; preds = %if.then, %entry if.end: ; preds = %if.then, %entry
ret void ret void
} }
define void @t2a(double %a) nounwind { define void @t2a(double %a) nounwind {
entry: entry:
; ELF64: t2a ; ELF64-LABEL: @t2a
; SPE: t2a ; SPE-LABEL: @t2a
; VSX-LABEL: @t2a
%cmp = fcmp oeq double %a, 0.000000e+00 %cmp = fcmp oeq double %a, 0.000000e+00
; ELF64: addis ; ELF64: addis
; ELF64: lfd ; ELF64: lfd
; ELF64: fcmpu ; ELF64: fcmpu
; VSX: addis
; VSX: lfd
; VSX: xscmpudp
; SPE: efdcmpeq ; SPE: efdcmpeq
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
call void @foo() call void @foo()
br label %if.end br label %if.end
if.end: ; preds = %if.then, %entry if.end: ; preds = %if.then, %entry
ret void ret void
} }
define void @t2b(double %a) nounwind { define void @t2b(double %a) nounwind {
entry: entry:
; ELF64: t2b ; ELF64-LABEL: @t2b
; SPE: t2b ; SPE-LABEL: @t2b
; VSX-LABEL: @t2b
%cmp = fcmp oeq double %a, -0.000000e+00 %cmp = fcmp oeq double %a, -0.000000e+00
; ELF64: addis ; ELF64: addis
; ELF64: lfd ; ELF64: lfd
; ELF64: fcmpu ; ELF64: fcmpu
; VSX: addis
; VSX: lfd
; VSX: xscmpudp
; SPE: efdcmpeq
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
call void @foo()
br label %if.end
if.end: ; preds = %if.then, %entry
ret void
}
define void @t2c(double %a) nounwind {
entry:
; ELF64-LABEL: @t2c
; SPE-LABEL: @t2c
; VSX-LABEL: @t2c
%cmp = fcmp oeq double -0.000000e+00, %a
; ELF64: addis
; ELF64: lfd
; ELF64: fcmpu
; VSX: addis
; VSX: lfd
; VSX: xscmpudp
; SPE: efdcmpeq ; SPE: efdcmpeq
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
call void @foo() call void @foo()
br label %if.end br label %if.end
if.end: ; preds = %if.then, %entry if.end: ; preds = %if.then, %entry
ret void ret void
} }
define void @t4(i8 signext %a) nounwind { define void @t4(i8 signext %a) nounwind {
entry: entry:
; ELF64: t4 ; ELF64-LABEL: @t4
%cmp = icmp eq i8 %a, -1 %cmp = icmp eq i8 %a, -1
; ELF64: extsb ; ELF64: extsb
; ELF64: cmpwi ; ELF64: cmpwi
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
call void @foo() call void @foo()
br label %if.end br label %if.end
if.end: ; preds = %if.then, %entry if.end: ; preds = %if.then, %entry
ret void ret void
} }
define void @t5(i8 zeroext %a) nounwind { define void @t5(i8 zeroext %a) nounwind {
entry: entry:
; ELF64: t5 ; ELF64-LABEL: @t5
%cmp = icmp eq i8 %a, 1 %cmp = icmp eq i8 %a, 1
; ELF64: extsb ; ELF64: extsb
; ELF64: cmpwi ; ELF64: cmpwi
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
call void @foo() call void @foo()
br label %if.end br label %if.end
if.end: ; preds = %if.then, %entry if.end: ; preds = %if.then, %entry
ret void ret void
} }
define void @t5a(i8 zeroext %a) nounwind {
entry:
; ELF64-LABEL: @t5a
%cmp = icmp eq i8 1, %a
; ELF64: extsb
; ELF64: cmpw
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
call void @foo()
br label %if.end
if.end: ; preds = %if.then, %entry
ret void
}
define void @t6(i16 signext %a) nounwind { define void @t6(i16 signext %a) nounwind {
entry: entry:
; ELF64: t6 ; ELF64-LABEL: @t6
%cmp = icmp eq i16 %a, -1 %cmp = icmp eq i16 %a, -1
; ELF64: extsh ; ELF64: extsh
; ELF64: cmpwi ; ELF64: cmpwi
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
call void @foo() call void @foo()
br label %if.end br label %if.end
if.end: ; preds = %if.then, %entry if.end: ; preds = %if.then, %entry
ret void ret void
} }
define void @t7(i16 zeroext %a) nounwind { define void @t7(i16 zeroext %a) nounwind {
entry: entry:
; ELF64: t7 ; ELF64-LABEL: @t7
%cmp = icmp eq i16 %a, 1 %cmp = icmp eq i16 %a, 1
; ELF64: extsh ; ELF64: extsh
; ELF64: cmpwi ; ELF64: cmpwi
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
call void @foo() call void @foo()
br label %if.end br label %if.end
if.end: ; preds = %if.then, %entry if.end: ; preds = %if.then, %entry
ret void ret void
} }
define void @t7a(i16 zeroext %a) nounwind {
entry:
; ELF64-LABEL: @t7a
%cmp = icmp eq i16 1, %a
; ELF64: extsh
; ELF64: cmpw
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
call void @foo()
br label %if.end
if.end: ; preds = %if.then, %entry
ret void
}
define void @t8(i32 %a) nounwind { define void @t8(i32 %a) nounwind {
entry: entry:
; ELF64: t8 ; ELF64-LABEL: @t8
%cmp = icmp eq i32 %a, -1 %cmp = icmp eq i32 %a, -1
; ELF64: cmpwi ; ELF64: cmpwi
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
call void @foo() call void @foo()
br label %if.end br label %if.end
if.end: ; preds = %if.then, %entry if.end: ; preds = %if.then, %entry
ret void ret void
} }
define void @t9(i32 %a) nounwind { define void @t9(i32 %a) nounwind {
entry: entry:
; ELF64: t9 ; ELF64-LABEL: @t9
%cmp = icmp eq i32 %a, 1 %cmp = icmp eq i32 %a, 1
; ELF64: cmpwi ; ELF64: cmpwi
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
call void @foo() call void @foo()
br label %if.end br label %if.end
if.end: ; preds = %if.then, %entry if.end: ; preds = %if.then, %entry
ret void ret void
} }
define void @t10(i32 %a) nounwind { define void @t10(i32 %a) nounwind {
entry: entry:
; ELF64: t10 ; ELF64-LABEL: @t10
%cmp = icmp eq i32 %a, 384 %cmp = icmp eq i32 %a, 384
; ELF64: cmpwi ; ELF64: cmpwi
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
call void @foo() call void @foo()
br label %if.end br label %if.end
if.end: ; preds = %if.then, %entry if.end: ; preds = %if.then, %entry
ret void ret void
} }
define void @t11(i32 %a) nounwind { define void @t11(i32 %a) nounwind {
entry: entry:
; ELF64: t11 ; ELF64-LABEL: @t11
%cmp = icmp eq i32 %a, 4096 %cmp = icmp eq i32 %a, 4096
; ELF64: cmpwi ; ELF64: cmpwi
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
call void @foo() call void @foo()
br label %if.end br label %if.end
if.end: ; preds = %if.then, %entry if.end: ; preds = %if.then, %entry
ret void ret void
} }
define void @t11a(i32 %a) nounwind {
entry:
; ELF64-LABEL: @t11a
%cmp = icmp eq i32 4096, %a
; ELF64: cmpw
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
call void @foo()
br label %if.end
if.end: ; preds = %if.then, %entry
ret void
}
define void @t12(i8 %a) nounwind { define void @t12(i8 %a) nounwind {
entry: entry:
; ELF64: t12 ; ELF64-LABEL: @t12
%cmp = icmp ugt i8 %a, -113 %cmp = icmp ugt i8 %a, -113
; ELF64: clrlwi ; ELF64: clrlwi
; ELF64: cmplwi ; ELF64: cmplwi
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
call void @foo() call void @foo()
br label %if.end br label %if.end
if.end: ; preds = %if.then, %entry if.end: ; preds = %if.then, %entry
ret void ret void
} }
define void @t13() nounwind ssp { define void @t13() nounwind ssp {
entry: entry:
; ELF64: t13 ; ELF64-LABEL: @t13
%cmp = icmp slt i32 -123, -2147483648 %cmp = icmp slt i32 -123, -2147483648
; ELF64: li ; ELF64: li
; ELF64: lis ; ELF64: lis
; ELF64: cmpw ; ELF64: cmpw
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
ret void ret void
if.end: ; preds = %entry if.end: ; preds = %entry
ret void ret void
} }
define void @t14(i64 %a) nounwind { define void @t14(i64 %a) nounwind {
entry: entry:
; ELF64: t14 ; ELF64-LABEL: @t14
%cmp = icmp eq i64 %a, -1 %cmp = icmp eq i64 %a, -1
; ELF64: cmpdi ; ELF64: cmpdi
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
call void @foo() call void @foo()
br label %if.end br label %if.end
if.end: ; preds = %if.then, %entry if.end: ; preds = %if.then, %entry
ret void ret void
} }
define void @t15(i64 %a) nounwind { define void @t15(i64 %a) nounwind {
entry: entry:
; ELF64: t15 ; ELF64-LABEL: @t15
%cmp = icmp eq i64 %a, 1 %cmp = icmp eq i64 %a, 1
; ELF64: cmpdi ; ELF64: cmpdi
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
call void @foo() call void @foo()
br label %if.end br label %if.end
if.end: ; preds = %if.then, %entry if.end: ; preds = %if.then, %entry
ret void ret void
} }
define void @t16(i64 %a) nounwind { define void @t16(i64 %a) nounwind {
entry: entry:
; ELF64: t16 ; ELF64-LABEL: @t16
%cmp = icmp eq i64 %a, 384 %cmp = icmp eq i64 %a, 384
; ELF64: cmpdi ; ELF64: cmpdi
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
call void @foo() call void @foo()
br label %if.end br label %if.end
if.end: ; preds = %if.then, %entry if.end: ; preds = %if.then, %entry
ret void ret void
} }
define void @t17(i64 %a) nounwind { define void @t17(i64 %a) nounwind {
entry: entry:
; ELF64: t17 ; ELF64-LABEL: @t17
%cmp = icmp eq i64 %a, 32768 %cmp = icmp eq i64 %a, 32768
; Extra operand so we don't match on cmpdi. ; Extra operand so we don't match on cmpdi.
; ELF64: cmpd {{[0-9]+}} ; ELF64: cmpd {{[0-9]+}}
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry if.then: ; preds = %entry
call void @foo() call void @foo()
br label %if.end br label %if.end
if.end: ; preds = %if.then, %entry if.end: ; preds = %if.then, %entry
ret void ret void
} }
define void @t17a(i64 %a) nounwind {
entry:
; ELF64-LABEL: @t17a
%cmp = icmp eq i64 32768, %a
; Extra operand so we don't match on cmpdi.
; ELF64: cmpd {{[0-9]+}}
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %entry
call void @foo()
br label %if.end
if.end: ; preds = %if.then, %entry
ret void
}