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Differential D56449

[UnrollRuntime] Support multi-exiting blocks to LatchExit
AbandonedPublic

Authored by anna on Jan 8 2019, 12:41 PM.

Details

Reviewers
reames
dmgreen
mkazantsev
mzolotukhin
Summary

This patch implements runtime unrolling for multi-exit loops where
there are multiple exiting blocks that go to the latchExit.
This requires updating the ConnectProlog and ConnectEpilog code.

For this patch, the implementation is only for remainder code which is
prolog code. Added test cases for various scenarios.
No DT or LI changes required.

Diff Detail

Event Timeline

anna created this revision.Jan 8 2019, 12:41 PM
Herald added a subscriber: zzheng. · View Herald TranscriptJan 8 2019, 12:41 PM
Harbormaster completed remote builds in B26523: Diff 180719.Jan 8 2019, 12:43 PM
mkazantsev added inline comments.Jan 10 2019, 9:40 PM
lib/Transforms/Utils/LoopUnrollRuntime.cpp
105

Line too long.

121

Could you please add more comments on this piece of logic? I don't quite understand it. Why do we make difference between phi latch inputs that come from inside the loop and from outside the loop?

124

Maybe dyn_cast here and remove cast on line below?

137

That looks like it can go as a separate NFC.

142

Why can we expect that? Other usage in code accounts for nullptr case.

efriedma added a subscriber: efriedma.Jan 11 2019, 12:26 PM
efriedma added inline comments.
lib/Transforms/Utils/LoopUnrollRuntime.cpp
508

I don't like the "!DT" check; if the domtree is required to unroll certain loops, we should just assert that the caller always passes a domtree. (I haven't reviewed the logic carefully to see if the dominates() check is strictly necessary.)

anna planned changes to this revision.Jan 22 2019, 5:39 AM

need to update comments and address review comments. moving out of queue for now.

anna abandoned this revision.Jan 28 2022, 7:53 AM
Herald added a project: Restricted Project. · View Herald TranscriptJan 28 2022, 7:53 AM

Revision Contents

PathSize
lib/
Transforms/
Utils/
111 lines
test/
Transforms/
LoopUnroll/
731 lines

Diff 180719

lib/Transforms/Utils/LoopUnrollRuntime.cpp

Show First 20 Lines • Show All 79 Lines • ▼ Show 20 Linesstatic void ConnectProlog(Loop *L, Value *BECount, unsigned Count,
// Header // Header
// ... // ...
// Latch // Latch
// LatchExit // LatchExit
BasicBlock *Latch = L->getLoopLatch(); BasicBlock *Latch = L->getLoopLatch();
assert(Latch && "Loop must have a latch"); assert(Latch && "Loop must have a latch");
BasicBlock *PrologLatch = cast<BasicBlock>(VMap[Latch]); BasicBlock *PrologLatch = cast<BasicBlock>(VMap[Latch]);
BasicBlock *Header = L->getHeader();
auto *PrologHeader = cast<BasicBlock>(VMap[Header]);
bool isHeaderPredOfLatchExit = false;
for (auto *Pred : predecessors(OriginalLoopLatchExit))
if (Pred == Header && Header != Latch)
isHeaderPredOfLatchExit = true;
SmallVector<BasicBlock *, 4> PrologExitPreds(predecessors(PrologExit));
// Create a PHI node for each outgoing value from the original loop // Create a PHI node for each outgoing value from the original loop
// (which means it is an outgoing value from the prolog code too). // (which means it is an outgoing value from the prolog code too).
// The new PHI node is inserted in the prolog end basic block. // The new PHI node is inserted in the prolog end basic block.
// The new PHI node value is added as an operand of a PHI node in either // The new PHI node value is added as an operand of a PHI node in either
// the loop header or the loop exit block. // the loop header or the loop exit block.
for (BasicBlock *Succ : successors(Latch)) { for (BasicBlock *Succ : successors(Latch)) {
for (PHINode &PN : Succ->phis()) { for (PHINode &PN : Succ->phis()) {
// Add a new PHI node to the prolog end block and add the // Add a new PHI node to the prolog end block and add the
// appropriate incoming values. // appropriate incoming values.
// TODO: This code assumes that the PrologExit (or the LatchExit block for PHINode *NewPN = PHINode::Create(PN.getType(), PrologExitPreds.size(), PN.getName() + ".unr",
mkazantsevUnsubmitted
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Line too long.

mkazantsev: Line too long.
// prolog loop) contains only one predecessor from the loop, i.e. the
// PrologLatch. When supporting multiple-exiting block loops, we can have
// two or more blocks that have the LatchExit as the target in the
// original loop.
PHINode *NewPN = PHINode::Create(PN.getType(), 2, PN.getName() + ".unr",
PrologExit->getFirstNonPHI()); PrologExit->getFirstNonPHI());
// The PrologExit predecessors definitely include the PreHeader and PrologLatch.
// With multi-exit unrolling, we can have other predecessors to the
// PrologExit, such as the PrologHeader or other blocks in the
// PrologLoop or remainder code. We need to add the incoming values from
// all relevant predecessors.
// Succ is loop header.
if (L->contains(&PN)) {
// Adding a value to the new PHI node from the original loop preheader. // Adding a value to the new PHI node from the original loop preheader.
// This is the value that skips all the prolog code. // This is the value that skips all the prolog code.
if (L->contains(&PN)) {
// Succ is loop header.
NewPN->addIncoming(PN.getIncomingValueForBlock(NewPreHeader), NewPN->addIncoming(PN.getIncomingValueForBlock(NewPreHeader),
PreHeader); PreHeader);
Value *LatchV = PN.getIncomingValueForBlock(Latch);
BasicBlock *LatchVBB = nullptr;
if (Instruction *I = dyn_cast<Instruction>(LatchV)) {
mkazantsevUnsubmitted
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Could you please add more comments on this piece of logic? I don't quite understand it. Why do we make difference between phi latch inputs that come from inside the loop and from outside the loop?

mkazantsev: Could you please add more comments on this piece of logic? I don't quite understand it. Why do…
if (L->contains(I)) {
LatchV = VMap.lookup(I);
if (isa<Instruction>(LatchV))
mkazantsevUnsubmitted
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Maybe dyn_cast here and remove cast on line below?

mkazantsev: Maybe dyn_cast here and remove cast on line below?
LatchVBB = cast<Instruction>(LatchV)->getParent();
}
}
// Adding a value to the new PHI node from the last prolog block
// that was created.
NewPN->addIncoming(LatchV, PrologLatch);
Value *HeaderV = VMap[&PN];
// When header is pred of LatchExit (i.e. the PrologHeader is also a
// pred of PrologExit), we need to add the corresponding cloned value of
// PN as the incoming value for NewPN.
if (isHeaderPredOfLatchExit)
NewPN->addIncoming(HeaderV, PrologHeader);
// Update NewPN with values for the remaining loop exiting blocks that go to the PrologExit.
for (auto *Pred : PrologExitPreds) {
if (Pred == PrologHeader || Pred == PrologLatch || Pred == PreHeader)
continue;
Value *PredIncomingValue = nullptr;
assert(DT && "We should have a DT at this point!");
mkazantsevUnsubmitted
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Why can we expect that? Other usage in code accounts for nullptr case.

mkazantsev: Why can we expect that? Other usage in code accounts for nullptr case.
// The incoming value should either be LatchV or
// HeaderV. If LatchVBB dominates the Pred, we should use that value
// as the incoming value.
if (LatchVBB && PrologHeader != LatchVBB &&
DT->dominates(LatchVBB, Pred))
PredIncomingValue = LatchV;
else
PredIncomingValue = HeaderV;
assert(PredIncomingValue && "PredIncomingValue is null!");
NewPN->addIncoming(PredIncomingValue, Pred);
}
} else { } else {
// Succ is LatchExit. // Succ is LatchExit.
NewPN->addIncoming(UndefValue::get(PN.getType()), PreHeader); NewPN->addIncoming(UndefValue::get(PN.getType()), PreHeader);
} // Update NewPN incoming values based on PN's incoming values.
// This is needed when the LatchExit has predecessors other than the
Value *V = PN.getIncomingValueForBlock(Latch); // Latch.
if (Instruction *I = dyn_cast<Instruction>(V)) { for (unsigned i = 0; i < PN.getNumIncomingValues(); i++) {
if (L->contains(I)) { Value *V = PN.getIncomingValue(i);
BasicBlock *BBIncoming = PN.getIncomingBlock(i);
if (LI->getLoopFor(BBIncoming) != L)
continue;
if (auto *I = dyn_cast<Instruction>(V)) {
if (L->contains(I))
V = VMap.lookup(I); V = VMap.lookup(I);
} }
NewPN->addIncoming(V, cast<BasicBlock>(VMap[BBIncoming]));
} }
// Adding a value to the new PHI node from the last prolog block }
// that was created. assert(NewPN->getNumIncomingValues() == PrologExitPreds.size() &&
NewPN->addIncoming(V, PrologLatch); "expected from phi node definition!");
// Update the existing PHI node operand with the value from the // Update the existing PHI node operand with the value from the
// new PHI node. How this is done depends on if the existing // new PHI node. How this is done depends on if the existing
// PHI node is in the original loop block, or the exit block. // PHI node is in the original loop block, or the exit block.
if (L->contains(&PN)) { if (L->contains(&PN)) {
PN.setIncomingValue(PN.getBasicBlockIndex(NewPreHeader), NewPN); PN.setIncomingValue(PN.getBasicBlockIndex(NewPreHeader), NewPN);
} else { } else {
PN.addIncoming(NewPN, PrologExit); PN.addIncoming(NewPN, PrologExit);
} }
} }
} }
// Make sure that created prolog loop is in simplified form // Make sure that created prolog loop is in simplified form
SmallVector<BasicBlock *, 4> PrologExitPreds;
mkazantsevUnsubmitted
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That looks like it can go as a separate NFC.

mkazantsev: That looks like it can go as a separate NFC.
Loop *PrologLoop = LI->getLoopFor(PrologLatch); Loop *PrologLoop = LI->getLoopFor(PrologLatch);
if (PrologLoop) { if (PrologLoop) {
SmallVector<BasicBlock *, 4> PrologExitPreds;
for (BasicBlock *PredBB : predecessors(PrologExit)) for (BasicBlock *PredBB : predecessors(PrologExit))
if (PrologLoop->contains(PredBB)) if (PrologLoop->contains(PredBB))
PrologExitPreds.push_back(PredBB); PrologExitPreds.push_back(PredBB);
SplitBlockPredecessors(PrologExit, PrologExitPreds, ".unr-lcssa", DT, LI, SplitBlockPredecessors(PrologExit, PrologExitPreds, ".unr-lcssa", DT, LI,
nullptr, PreserveLCSSA); nullptr, PreserveLCSSA);
} }
▲ Show 20 Lines • Show All 215 Lines • ▼ Show 20 Lines if (Latch == *BB) {
Builder.CreateSub(NewIdx, ConstantInt::get(NewIdx->getType(), 1), Builder.CreateSub(NewIdx, ConstantInt::get(NewIdx->getType(), 1),
NewIdx->getName() + ".sub"); NewIdx->getName() + ".sub");
Value *IdxCmp = Value *IdxCmp =
Builder.CreateIsNotNull(IdxSub, NewIdx->getName() + ".cmp"); Builder.CreateIsNotNull(IdxSub, NewIdx->getName() + ".cmp");
Builder.CreateCondBr(IdxCmp, FirstLoopBB, InsertBot); Builder.CreateCondBr(IdxCmp, FirstLoopBB, InsertBot);
NewIdx->addIncoming(NewIter, InsertTop); NewIdx->addIncoming(NewIter, InsertTop);
NewIdx->addIncoming(IdxSub, NewBB); NewIdx->addIncoming(IdxSub, NewBB);
} }
{
// Populate the VMap for the OrigLatchExit.
BranchInst *OrigLatchBR = cast<BranchInst>(Latch->getTerminator());
unsigned ExitIndex = OrigLatchBR->getSuccessor(0) == Header ? 1 : 0;
BasicBlock *OrigLatchExit = OrigLatchBR->getSuccessor(ExitIndex);
VMap[OrigLatchExit] = InsertBot;
}
LatchBR->eraseFromParent(); LatchBR->eraseFromParent();
} }
} }
// Change the incoming values to the ones defined in the preheader or // Change the incoming values to the ones defined in the preheader or
// cloned loop. // cloned loop.
for (BasicBlock::iterator I = Header->begin(); isa<PHINode>(I); ++I) { for (BasicBlock::iterator I = Header->begin(); isa<PHINode>(I); ++I) {
PHINode *NewPHI = cast<PHINode>(VMap[&*I]); PHINode *NewPHI = cast<PHINode>(VMap[&*I]);
▲ Show 20 Lines • Show All 45 Lines • ▼ Show 20 Lines else
return nullptr; return nullptr;
} }
/// Returns true if we can safely unroll a multi-exit/exiting loop. OtherExits /// Returns true if we can safely unroll a multi-exit/exiting loop. OtherExits
/// is populated with all the loop exit blocks other than the LatchExit block. /// is populated with all the loop exit blocks other than the LatchExit block.
static bool static bool
canSafelyUnrollMultiExitLoop(Loop *L, SmallVectorImpl<BasicBlock *> &OtherExits, canSafelyUnrollMultiExitLoop(Loop *L, SmallVectorImpl<BasicBlock *> &OtherExits,
BasicBlock *LatchExit, bool PreserveLCSSA, BasicBlock *LatchExit, bool PreserveLCSSA,
bool UseEpilogRemainder) { bool UseEpilogRemainder, DominatorTree *DT) {
// We currently have some correctness constrains in unrolling a multi-exit // We currently have some correctness constrains in unrolling a multi-exit
// loop. Check for these below. // loop. Check for these below.
// We rely on LCSSA form being preserved when the exit blocks are transformed. // We rely on LCSSA form being preserved when the exit blocks are transformed.
if (!PreserveLCSSA) if (!PreserveLCSSA)
return false; return false;
SmallVector<BasicBlock *, 4> Exits; SmallVector<BasicBlock *, 4> Exits;
L->getUniqueExitBlocks(Exits); L->getUniqueExitBlocks(Exits);
for (auto *BB : Exits) for (auto *BB : Exits)
if (BB != LatchExit) if (BB != LatchExit)
OtherExits.push_back(BB); OtherExits.push_back(BB);
// TODO: Support multiple exiting blocks jumping to the `LatchExit` when // TODO: Support multiple exiting blocks jumping to the `LatchExit` when
// UnrollRuntimeMultiExit is true. This will need updating the logic in // UnrollRuntimeMultiExit is true. This will need updating the logic in
// connectEpilog/connectProlog. // connectEpilog.
if (!LatchExit->getSinglePredecessor()) { // We also need DT support when we have multiple exiting blocks to the
// LatchExit.
if (!LatchExit->getSinglePredecessor() && (UseEpilogRemainder || !DT)) {
efriedmaUnsubmitted
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I don't like the "!DT" check; if the domtree is required to unroll certain loops, we should just assert that the caller always passes a domtree. (I haven't reviewed the logic carefully to see if the dominates() check is strictly necessary.)

efriedma: I don't like the "!DT" check; if the domtree is required to unroll certain loops, we should…
LLVM_DEBUG( LLVM_DEBUG(
dbgs() << "Bailout for multi-exit handling when latch exit has >1 " dbgs() << "Bailout for multi-exit handling when latch exit has >1 "
"predecessor.\n"); "predecessor.\n");
return false; return false;
} }
// FIXME: We bail out of multi-exit unrolling when epilog loop is generated // FIXME: We bail out of multi-exit unrolling when epilog loop is generated
// and L is an inner loop. This is because in presence of multiple exits, the // and L is an inner loop. This is because in presence of multiple exits, the
// outer loop is incorrect: we do not add the EpilogPreheader and exit to the // outer loop is incorrect: we do not add the EpilogPreheader and exit to the
// outer loop. This is automatically handled in the prolog case, so we do not // outer loop. This is automatically handled in the prolog case, so we do not
// have that bug in prolog generation. // have that bug in prolog generation.
if (UseEpilogRemainder && L->getParentLoop()) if (UseEpilogRemainder && L->getParentLoop())
return false; return false;
// All constraints have been satisfied. // All constraints have been satisfied.
return true; return true;
} }
/// Returns true if we can profitably unroll the multi-exit loop L. Currently, /// Returns true if we can profitably unroll the multi-exit loop L. Currently,
/// we return true only if UnrollRuntimeMultiExit is set to true. /// we return true only if UnrollRuntimeMultiExit is set to true.
static bool canProfitablyUnrollMultiExitLoop( static bool canProfitablyUnrollMultiExitLoop(
Loop *L, SmallVectorImpl<BasicBlock *> &OtherExits, BasicBlock *LatchExit, Loop *L, SmallVectorImpl<BasicBlock *> &OtherExits, BasicBlock *LatchExit,
bool PreserveLCSSA, bool UseEpilogRemainder) { bool PreserveLCSSA, bool UseEpilogRemainder, DominatorTree *DT) {
#if !defined(NDEBUG) #if !defined(NDEBUG)
SmallVector<BasicBlock *, 8> OtherExitsDummyCheck; SmallVector<BasicBlock *, 8> OtherExitsDummyCheck;
assert(canSafelyUnrollMultiExitLoop(L, OtherExitsDummyCheck, LatchExit, assert(canSafelyUnrollMultiExitLoop(L, OtherExitsDummyCheck, LatchExit,
PreserveLCSSA, UseEpilogRemainder) && PreserveLCSSA, UseEpilogRemainder, DT) &&
"Should be safe to unroll before checking profitability!"); "Should be safe to unroll before checking profitability!");
#endif #endif
// Priority goes to UnrollRuntimeMultiExit if it's supplied. // Priority goes to UnrollRuntimeMultiExit if it's supplied.
if (UnrollRuntimeMultiExit.getNumOccurrences()) if (UnrollRuntimeMultiExit.getNumOccurrences())
return UnrollRuntimeMultiExit; return UnrollRuntimeMultiExit;
// The main pain point with multi-exit loop unrolling is that once unrolled, // The main pain point with multi-exit loop unrolling is that once unrolled,
▲ Show 20 Lines • Show All 109 Lines • ▼ Show 20 Lines LLVM_DEBUG(
<< "One of the loop latch successors must be the exit block.\n"); << "One of the loop latch successors must be the exit block.\n");
return false; return false;
} }
// These are exit blocks other than the target of the latch exiting block. // These are exit blocks other than the target of the latch exiting block.
SmallVector<BasicBlock *, 4> OtherExits; SmallVector<BasicBlock *, 4> OtherExits;
bool isMultiExitUnrollingEnabled = bool isMultiExitUnrollingEnabled =
canSafelyUnrollMultiExitLoop(L, OtherExits, LatchExit, PreserveLCSSA, canSafelyUnrollMultiExitLoop(L, OtherExits, LatchExit, PreserveLCSSA,
UseEpilogRemainder) && UseEpilogRemainder, DT) &&
canProfitablyUnrollMultiExitLoop(L, OtherExits, LatchExit, PreserveLCSSA, canProfitablyUnrollMultiExitLoop(L, OtherExits, LatchExit, PreserveLCSSA,
UseEpilogRemainder); UseEpilogRemainder, DT);
// Support only single exit and exiting block unless multi-exit loop unrolling is enabled. // Support only single exit and exiting block unless multi-exit loop unrolling is enabled.
if (!isMultiExitUnrollingEnabled && if (!isMultiExitUnrollingEnabled &&
(!L->getExitingBlock() || OtherExits.size())) { (!L->getExitingBlock() || OtherExits.size())) {
LLVM_DEBUG( LLVM_DEBUG(
dbgs() dbgs()
<< "Multiple exit/exiting blocks in loop and multi-exit unrolling not " << "Multiple exit/exiting blocks in loop and multi-exit unrolling not "
"enabled!\n"); "enabled!\n");
return false; return false;
▲ Show 20 Lines • Show All 353 Lines • Show Last 20 Lines

test/Transforms/LoopUnroll/runtime-loop-multiple-exits.ll

Show First 20 Lines • Show All 207 Lines • ▼ Show 20 Lines
; FIXME: Support multiple exiting blocks to the same latch exit block. ; FIXME: Support multiple exiting blocks to the same latch exit block.
; Three exiting blocks where header and latch exit to same LatchExit. ; Three exiting blocks where header and latch exit to same LatchExit.
define i32 @hdr_latch_same_exit(i32* nocapture %a, i64 %n, i1 %cond) { define i32 @hdr_latch_same_exit(i32* nocapture %a, i64 %n, i1 %cond) {
; EPILOG: hdr_latch_same_exit( ; EPILOG: hdr_latch_same_exit(
; EPILOG-NOT: .unr ; EPILOG-NOT: .unr
; EPILOG-NOT: .epil ; EPILOG-NOT: .epil
; PROLOG: hdr_latch_same_exit( ; PROLOG-LABEL: @hdr_latch_same_exit(
; PROLOG-NOT: .unr ; PROLOG-NEXT: entry:
; PROLOG-NOT: .prol ; PROLOG-NEXT: [[TMP0:%.*]] = add i64 [[N:%.*]], -1
; PROLOG-NEXT: [[XTRAITER:%.*]] = and i64 [[N]], 7
; PROLOG-NEXT: [[LCMP_MOD:%.*]] = icmp eq i64 [[XTRAITER]], 0
; PROLOG-NEXT: br i1 [[LCMP_MOD]], label [[HEADER_PROL_LOOPEXIT:%.*]], label [[HEADER_PROL_PREHEADER:%.*]]
; PROLOG: header.prol.preheader:
; PROLOG-NEXT: br label [[HEADER_PROL:%.*]]
; PROLOG: header.prol:
; PROLOG-NEXT: [[INDVARS_IV_PROL:%.*]] = phi i64 [ [[INDVARS_IV_NEXT_PROL:%.*]], [[LATCH_PROL:%.*]] ], [ 0, [[HEADER_PROL_PREHEADER]] ]
; PROLOG-NEXT: [[SUM_02_PROL:%.*]] = phi i32 [ [[ADD_PROL:%.*]], [[LATCH_PROL]] ], [ 0, [[HEADER_PROL_PREHEADER]] ]
; PROLOG-NEXT: [[PROL_ITER:%.*]] = phi i64 [ [[PROL_ITER_SUB:%.*]], [[LATCH_PROL]] ], [ [[XTRAITER]], [[HEADER_PROL_PREHEADER]] ]
; PROLOG-NEXT: br i1 [[COND:%.*]], label [[HEADER_PROL_LOOPEXIT_UNR_LCSSA:%.*]], label [[FOR_EXITING_BLOCK_PROL:%.*]]
; PROLOG: for.exiting_block.prol:
; PROLOG-NEXT: [[CMP_PROL:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_PROL]], label [[FOR_EXIT2_LOOPEXIT1:%.*]], label [[LATCH_PROL]]
; PROLOG: latch.prol:
; PROLOG-NEXT: [[ARRAYIDX_PROL:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDVARS_IV_PROL]]
; PROLOG-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX_PROL]], align 4
; PROLOG-NEXT: [[ADD_PROL]] = add nsw i32 [[TMP1]], [[SUM_02_PROL]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_PROL]] = add i64 [[INDVARS_IV_PROL]], 1
; PROLOG-NEXT: [[PROL_ITER_SUB]] = add i64 [[PROL_ITER]], -1
; PROLOG-NEXT: [[PROL_ITER_CMP:%.*]] = icmp eq i64 [[PROL_ITER_SUB]], 0
; PROLOG-NEXT: br i1 [[PROL_ITER_CMP]], label [[HEADER_PROL_LOOPEXIT_UNR_LCSSA]], label [[HEADER_PROL]]
; PROLOG: header.prol.loopexit.unr-lcssa:
; PROLOG-NEXT: [[RESULT_UNR_PH:%.*]] = phi i32 [ [[ADD_PROL]], [[LATCH_PROL]] ], [ 0, [[HEADER_PROL]] ]
; PROLOG-NEXT: [[INDVARS_IV_UNR_PH:%.*]] = phi i64 [ [[INDVARS_IV_NEXT_PROL]], [[LATCH_PROL]] ], [ [[INDVARS_IV_PROL]], [[HEADER_PROL]] ]
; PROLOG-NEXT: [[SUM_02_UNR_PH:%.*]] = phi i32 [ [[ADD_PROL]], [[LATCH_PROL]] ], [ [[SUM_02_PROL]], [[HEADER_PROL]] ]
; PROLOG-NEXT: br label [[HEADER_PROL_LOOPEXIT]]
; PROLOG: header.prol.loopexit:
; PROLOG-NEXT: [[RESULT_UNR:%.*]] = phi i32 [ undef, [[ENTRY:%.*]] ], [ [[RESULT_UNR_PH]], [[HEADER_PROL_LOOPEXIT_UNR_LCSSA]] ]
; PROLOG-NEXT: [[INDVARS_IV_UNR:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_UNR_PH]], [[HEADER_PROL_LOOPEXIT_UNR_LCSSA]] ]
; PROLOG-NEXT: [[SUM_02_UNR:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[SUM_02_UNR_PH]], [[HEADER_PROL_LOOPEXIT_UNR_LCSSA]] ]
; PROLOG-NEXT: [[TMP2:%.*]] = icmp ult i64 [[TMP0]], 7
; PROLOG-NEXT: br i1 [[TMP2]], label [[LATCHEXIT:%.*]], label [[ENTRY_NEW:%.*]]
; PROLOG: entry.new:
; PROLOG-NEXT: br label [[HEADER:%.*]]
; PROLOG: header:
; PROLOG-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_UNR]], [[ENTRY_NEW]] ], [ [[INDVARS_IV_NEXT_7:%.*]], [[LATCH_7:%.*]] ]
; PROLOG-NEXT: [[SUM_02:%.*]] = phi i32 [ [[SUM_02_UNR]], [[ENTRY_NEW]] ], [ [[ADD_7:%.*]], [[LATCH_7]] ]
; PROLOG-NEXT: br i1 [[COND]], label [[LATCHEXIT_UNR_LCSSA:%.*]], label [[FOR_EXITING_BLOCK:%.*]]
; PROLOG: for.exiting_block:
; PROLOG-NEXT: [[CMP:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP]], label [[FOR_EXIT2_LOOPEXIT:%.*]], label [[LATCH:%.*]]
; PROLOG: latch:
; PROLOG-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV]]
; PROLOG-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
; PROLOG-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], [[SUM_02]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT:%.*]] = add i64 [[INDVARS_IV]], 1
; PROLOG-NEXT: br i1 [[COND]], label [[LATCHEXIT_UNR_LCSSA]], label [[FOR_EXITING_BLOCK_1:%.*]]
; PROLOG: latchExit.unr-lcssa:
; PROLOG-NEXT: [[RESULT_PH:%.*]] = phi i32 [ 0, [[HEADER]] ], [ 0, [[LATCH]] ], [ 0, [[LATCH_1:%.*]] ], [ 0, [[LATCH_2:%.*]] ], [ 0, [[LATCH_3:%.*]] ], [ 0, [[LATCH_4:%.*]] ], [ 0, [[LATCH_5:%.*]] ], [ 0, [[LATCH_6:%.*]] ], [ [[ADD_7]], [[LATCH_7]] ]
; PROLOG-NEXT: br label [[LATCHEXIT]]
; PROLOG: latchExit:
; PROLOG-NEXT: [[RESULT:%.*]] = phi i32 [ [[RESULT_UNR]], [[HEADER_PROL_LOOPEXIT]] ], [ [[RESULT_PH]], [[LATCHEXIT_UNR_LCSSA]] ]
; PROLOG-NEXT: ret i32 [[RESULT]]
; PROLOG: for.exit2.loopexit:
; PROLOG-NEXT: br label [[FOR_EXIT2:%.*]]
; PROLOG: for.exit2.loopexit1:
; PROLOG-NEXT: br label [[FOR_EXIT2]]
; PROLOG: for.exit2:
; PROLOG-NEXT: ret i32 42
; PROLOG: for.exiting_block.1:
; PROLOG-NEXT: [[CMP_1:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_1]], label [[FOR_EXIT2_LOOPEXIT]], label [[LATCH_1]]
; PROLOG: latch.1:
; PROLOG-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT]]
; PROLOG-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARRAYIDX_1]], align 4
; PROLOG-NEXT: [[ADD_1:%.*]] = add nsw i32 [[TMP4]], [[ADD]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_1:%.*]] = add i64 [[INDVARS_IV]], 2
; PROLOG-NEXT: br i1 [[COND]], label [[LATCHEXIT_UNR_LCSSA]], label [[FOR_EXITING_BLOCK_2:%.*]]
; PROLOG: for.exiting_block.2:
; PROLOG-NEXT: [[CMP_2:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_2]], label [[FOR_EXIT2_LOOPEXIT]], label [[LATCH_2]]
; PROLOG: latch.2:
; PROLOG-NEXT: [[ARRAYIDX_2:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT_1]]
; PROLOG-NEXT: [[TMP5:%.*]] = load i32, i32* [[ARRAYIDX_2]], align 4
; PROLOG-NEXT: [[ADD_2:%.*]] = add nsw i32 [[TMP5]], [[ADD_1]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_2:%.*]] = add i64 [[INDVARS_IV]], 3
; PROLOG-NEXT: br i1 [[COND]], label [[LATCHEXIT_UNR_LCSSA]], label [[FOR_EXITING_BLOCK_3:%.*]]
; PROLOG: for.exiting_block.3:
; PROLOG-NEXT: [[CMP_3:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_3]], label [[FOR_EXIT2_LOOPEXIT]], label [[LATCH_3]]
; PROLOG: latch.3:
; PROLOG-NEXT: [[ARRAYIDX_3:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT_2]]
; PROLOG-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARRAYIDX_3]], align 4
; PROLOG-NEXT: [[ADD_3:%.*]] = add nsw i32 [[TMP6]], [[ADD_2]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_3:%.*]] = add i64 [[INDVARS_IV]], 4
; PROLOG-NEXT: br i1 [[COND]], label [[LATCHEXIT_UNR_LCSSA]], label [[FOR_EXITING_BLOCK_4:%.*]]
; PROLOG: for.exiting_block.4:
; PROLOG-NEXT: [[CMP_4:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_4]], label [[FOR_EXIT2_LOOPEXIT]], label [[LATCH_4]]
; PROLOG: latch.4:
; PROLOG-NEXT: [[ARRAYIDX_4:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT_3]]
; PROLOG-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARRAYIDX_4]], align 4
; PROLOG-NEXT: [[ADD_4:%.*]] = add nsw i32 [[TMP7]], [[ADD_3]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_4:%.*]] = add i64 [[INDVARS_IV]], 5
; PROLOG-NEXT: br i1 [[COND]], label [[LATCHEXIT_UNR_LCSSA]], label [[FOR_EXITING_BLOCK_5:%.*]]
; PROLOG: for.exiting_block.5:
; PROLOG-NEXT: [[CMP_5:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_5]], label [[FOR_EXIT2_LOOPEXIT]], label [[LATCH_5]]
; PROLOG: latch.5:
; PROLOG-NEXT: [[ARRAYIDX_5:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT_4]]
; PROLOG-NEXT: [[TMP8:%.*]] = load i32, i32* [[ARRAYIDX_5]], align 4
; PROLOG-NEXT: [[ADD_5:%.*]] = add nsw i32 [[TMP8]], [[ADD_4]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_5:%.*]] = add i64 [[INDVARS_IV]], 6
; PROLOG-NEXT: br i1 [[COND]], label [[LATCHEXIT_UNR_LCSSA]], label [[FOR_EXITING_BLOCK_6:%.*]]
; PROLOG: for.exiting_block.6:
; PROLOG-NEXT: [[CMP_6:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_6]], label [[FOR_EXIT2_LOOPEXIT]], label [[LATCH_6]]
; PROLOG: latch.6:
; PROLOG-NEXT: [[ARRAYIDX_6:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT_5]]
; PROLOG-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX_6]], align 4
; PROLOG-NEXT: [[ADD_6:%.*]] = add nsw i32 [[TMP9]], [[ADD_5]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_6:%.*]] = add i64 [[INDVARS_IV]], 7
; PROLOG-NEXT: br i1 [[COND]], label [[LATCHEXIT_UNR_LCSSA]], label [[FOR_EXITING_BLOCK_7:%.*]]
; PROLOG: for.exiting_block.7:
; PROLOG-NEXT: [[CMP_7:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_7]], label [[FOR_EXIT2_LOOPEXIT]], label [[LATCH_7]]
; PROLOG: latch.7:
; PROLOG-NEXT: [[ARRAYIDX_7:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT_6]]
; PROLOG-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX_7]], align 4
; PROLOG-NEXT: [[ADD_7]] = add nsw i32 [[TMP10]], [[ADD_6]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_7]] = add i64 [[INDVARS_IV]], 8
; PROLOG-NEXT: [[EXITCOND_7:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT_7]], [[N]]
; PROLOG-NEXT: br i1 [[EXITCOND_7]], label [[LATCHEXIT_UNR_LCSSA]], label [[HEADER]]
;
entry: entry:
br label %header br label %header
header: header:
%indvars.iv = phi i64 [ %indvars.iv.next, %latch ], [ 0, %entry ] %indvars.iv = phi i64 [ %indvars.iv.next, %latch ], [ 0, %entry ]
%sum.02 = phi i32 [ %add, %latch ], [ 0, %entry ] %sum.02 = phi i32 [ %add, %latch ], [ 0, %entry ]
br i1 %cond, label %latchExit, label %for.exiting_block br i1 %cond, label %latchExit, label %for.exiting_block
Show All 20 Lines
; Two exiting blocks to latch where the exiting blocks are Latch and a ; Two exiting blocks to latch where the exiting blocks are Latch and a
; non-header ; non-header
; FIXME: We should unroll this loop. ; FIXME: We should unroll this loop.
define i32 @otherblock_latch_same_exit(i32* nocapture %a, i64 %n, i1 %cond) { define i32 @otherblock_latch_same_exit(i32* nocapture %a, i64 %n, i1 %cond) {
; EPILOG: otherblock_latch_same_exit( ; EPILOG: otherblock_latch_same_exit(
; EPILOG-NOT: .unr ; EPILOG-NOT: .unr
; EPILOG-NOT: .epil ; EPILOG-NOT: .epil
; PROLOG: otherblock_latch_same_exit( ; PROLOG-LABEL: @otherblock_latch_same_exit(
; PROLOG-NOT: .unr ; PROLOG-NEXT: entry:
; PROLOG-NOT: .prol ; PROLOG-NEXT: [[TMP0:%.*]] = add i64 [[N:%.*]], -1
; PROLOG-NEXT: [[XTRAITER:%.*]] = and i64 [[N]], 7
; PROLOG-NEXT: [[LCMP_MOD:%.*]] = icmp eq i64 [[XTRAITER]], 0
; PROLOG-NEXT: br i1 [[LCMP_MOD]], label [[HEADER_PROL_LOOPEXIT:%.*]], label [[HEADER_PROL_PREHEADER:%.*]]
; PROLOG: header.prol.preheader:
; PROLOG-NEXT: br label [[HEADER_PROL:%.*]]
; PROLOG: header.prol:
; PROLOG-NEXT: [[INDVARS_IV_PROL:%.*]] = phi i64 [ [[INDVARS_IV_NEXT_PROL:%.*]], [[LATCH_PROL:%.*]] ], [ 0, [[HEADER_PROL_PREHEADER]] ]
; PROLOG-NEXT: [[SUM_02_PROL:%.*]] = phi i32 [ [[ADD_PROL:%.*]], [[LATCH_PROL]] ], [ 0, [[HEADER_PROL_PREHEADER]] ]
; PROLOG-NEXT: [[PROL_ITER:%.*]] = phi i64 [ [[PROL_ITER_SUB:%.*]], [[LATCH_PROL]] ], [ [[XTRAITER]], [[HEADER_PROL_PREHEADER]] ]
; PROLOG-NEXT: br i1 [[COND:%.*]], label [[FOR_EXIT2_LOOPEXIT1:%.*]], label [[FOR_EXITING_BLOCK_PROL:%.*]]
; PROLOG: for.exiting_block.prol:
; PROLOG-NEXT: [[CMP_PROL:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_PROL]], label [[HEADER_PROL_LOOPEXIT_UNR_LCSSA:%.*]], label [[LATCH_PROL]]
; PROLOG: latch.prol:
; PROLOG-NEXT: [[ARRAYIDX_PROL:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDVARS_IV_PROL]]
; PROLOG-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX_PROL]], align 4
; PROLOG-NEXT: [[ADD_PROL]] = add nsw i32 [[TMP1]], [[SUM_02_PROL]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_PROL]] = add i64 [[INDVARS_IV_PROL]], 1
; PROLOG-NEXT: [[PROL_ITER_SUB]] = add i64 [[PROL_ITER]], -1
; PROLOG-NEXT: [[PROL_ITER_CMP:%.*]] = icmp eq i64 [[PROL_ITER_SUB]], 0
; PROLOG-NEXT: br i1 [[PROL_ITER_CMP]], label [[HEADER_PROL_LOOPEXIT_UNR_LCSSA]], label [[HEADER_PROL]]
; PROLOG: header.prol.loopexit.unr-lcssa:
; PROLOG-NEXT: [[RESULT_UNR_PH:%.*]] = phi i32 [ [[ADD_PROL]], [[LATCH_PROL]] ], [ 2, [[FOR_EXITING_BLOCK_PROL]] ]
; PROLOG-NEXT: [[INDVARS_IV_UNR_PH:%.*]] = phi i64 [ [[INDVARS_IV_NEXT_PROL]], [[LATCH_PROL]] ], [ [[INDVARS_IV_PROL]], [[FOR_EXITING_BLOCK_PROL]] ]
; PROLOG-NEXT: [[SUM_02_UNR_PH:%.*]] = phi i32 [ [[ADD_PROL]], [[LATCH_PROL]] ], [ [[SUM_02_PROL]], [[FOR_EXITING_BLOCK_PROL]] ]
; PROLOG-NEXT: br label [[HEADER_PROL_LOOPEXIT]]
; PROLOG: header.prol.loopexit:
; PROLOG-NEXT: [[RESULT_UNR:%.*]] = phi i32 [ undef, [[ENTRY:%.*]] ], [ [[RESULT_UNR_PH]], [[HEADER_PROL_LOOPEXIT_UNR_LCSSA]] ]
; PROLOG-NEXT: [[INDVARS_IV_UNR:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_UNR_PH]], [[HEADER_PROL_LOOPEXIT_UNR_LCSSA]] ]
; PROLOG-NEXT: [[SUM_02_UNR:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[SUM_02_UNR_PH]], [[HEADER_PROL_LOOPEXIT_UNR_LCSSA]] ]
; PROLOG-NEXT: [[TMP2:%.*]] = icmp ult i64 [[TMP0]], 7
; PROLOG-NEXT: br i1 [[TMP2]], label [[LATCHEXIT:%.*]], label [[ENTRY_NEW:%.*]]
; PROLOG: entry.new:
; PROLOG-NEXT: br label [[HEADER:%.*]]
; PROLOG: header:
; PROLOG-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_UNR]], [[ENTRY_NEW]] ], [ [[INDVARS_IV_NEXT_7:%.*]], [[LATCH_7:%.*]] ]
; PROLOG-NEXT: [[SUM_02:%.*]] = phi i32 [ [[SUM_02_UNR]], [[ENTRY_NEW]] ], [ [[ADD_7:%.*]], [[LATCH_7]] ]
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT:%.*]], label [[FOR_EXITING_BLOCK:%.*]]
; PROLOG: for.exiting_block:
; PROLOG-NEXT: [[CMP:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP]], label [[LATCHEXIT_UNR_LCSSA:%.*]], label [[LATCH:%.*]]
; PROLOG: latch:
; PROLOG-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV]]
; PROLOG-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
; PROLOG-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], [[SUM_02]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT:%.*]] = add i64 [[INDVARS_IV]], 1
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT]], label [[FOR_EXITING_BLOCK_1:%.*]]
; PROLOG: latchExit.unr-lcssa:
; PROLOG-NEXT: [[RESULT_PH:%.*]] = phi i32 [ 2, [[FOR_EXITING_BLOCK]] ], [ 2, [[FOR_EXITING_BLOCK_1]] ], [ 2, [[FOR_EXITING_BLOCK_2:%.*]] ], [ 2, [[FOR_EXITING_BLOCK_3:%.*]] ], [ 2, [[FOR_EXITING_BLOCK_4:%.*]] ], [ 2, [[FOR_EXITING_BLOCK_5:%.*]] ], [ 2, [[FOR_EXITING_BLOCK_6:%.*]] ], [ 2, [[FOR_EXITING_BLOCK_7:%.*]] ], [ [[ADD_7]], [[LATCH_7]] ]
; PROLOG-NEXT: br label [[LATCHEXIT]]
; PROLOG: latchExit:
; PROLOG-NEXT: [[RESULT:%.*]] = phi i32 [ [[RESULT_UNR]], [[HEADER_PROL_LOOPEXIT]] ], [ [[RESULT_PH]], [[LATCHEXIT_UNR_LCSSA]] ]
; PROLOG-NEXT: ret i32 [[RESULT]]
; PROLOG: for.exit2.loopexit:
; PROLOG-NEXT: br label [[FOR_EXIT2:%.*]]
; PROLOG: for.exit2.loopexit1:
; PROLOG-NEXT: br label [[FOR_EXIT2]]
; PROLOG: for.exit2:
; PROLOG-NEXT: ret i32 42
; PROLOG: for.exiting_block.1:
; PROLOG-NEXT: [[CMP_1:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_1]], label [[LATCHEXIT_UNR_LCSSA]], label [[LATCH_1:%.*]]
; PROLOG: latch.1:
; PROLOG-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT]]
; PROLOG-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARRAYIDX_1]], align 4
; PROLOG-NEXT: [[ADD_1:%.*]] = add nsw i32 [[TMP4]], [[ADD]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_1:%.*]] = add i64 [[INDVARS_IV]], 2
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT]], label [[FOR_EXITING_BLOCK_2]]
; PROLOG: for.exiting_block.2:
; PROLOG-NEXT: [[CMP_2:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_2]], label [[LATCHEXIT_UNR_LCSSA]], label [[LATCH_2:%.*]]
; PROLOG: latch.2:
; PROLOG-NEXT: [[ARRAYIDX_2:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT_1]]
; PROLOG-NEXT: [[TMP5:%.*]] = load i32, i32* [[ARRAYIDX_2]], align 4
; PROLOG-NEXT: [[ADD_2:%.*]] = add nsw i32 [[TMP5]], [[ADD_1]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_2:%.*]] = add i64 [[INDVARS_IV]], 3
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT]], label [[FOR_EXITING_BLOCK_3]]
; PROLOG: for.exiting_block.3:
; PROLOG-NEXT: [[CMP_3:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_3]], label [[LATCHEXIT_UNR_LCSSA]], label [[LATCH_3:%.*]]
; PROLOG: latch.3:
; PROLOG-NEXT: [[ARRAYIDX_3:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT_2]]
; PROLOG-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARRAYIDX_3]], align 4
; PROLOG-NEXT: [[ADD_3:%.*]] = add nsw i32 [[TMP6]], [[ADD_2]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_3:%.*]] = add i64 [[INDVARS_IV]], 4
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT]], label [[FOR_EXITING_BLOCK_4]]
; PROLOG: for.exiting_block.4:
; PROLOG-NEXT: [[CMP_4:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_4]], label [[LATCHEXIT_UNR_LCSSA]], label [[LATCH_4:%.*]]
; PROLOG: latch.4:
; PROLOG-NEXT: [[ARRAYIDX_4:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT_3]]
; PROLOG-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARRAYIDX_4]], align 4
; PROLOG-NEXT: [[ADD_4:%.*]] = add nsw i32 [[TMP7]], [[ADD_3]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_4:%.*]] = add i64 [[INDVARS_IV]], 5
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT]], label [[FOR_EXITING_BLOCK_5]]
; PROLOG: for.exiting_block.5:
; PROLOG-NEXT: [[CMP_5:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_5]], label [[LATCHEXIT_UNR_LCSSA]], label [[LATCH_5:%.*]]
; PROLOG: latch.5:
; PROLOG-NEXT: [[ARRAYIDX_5:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT_4]]
; PROLOG-NEXT: [[TMP8:%.*]] = load i32, i32* [[ARRAYIDX_5]], align 4
; PROLOG-NEXT: [[ADD_5:%.*]] = add nsw i32 [[TMP8]], [[ADD_4]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_5:%.*]] = add i64 [[INDVARS_IV]], 6
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT]], label [[FOR_EXITING_BLOCK_6]]
; PROLOG: for.exiting_block.6:
; PROLOG-NEXT: [[CMP_6:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_6]], label [[LATCHEXIT_UNR_LCSSA]], label [[LATCH_6:%.*]]
; PROLOG: latch.6:
; PROLOG-NEXT: [[ARRAYIDX_6:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT_5]]
; PROLOG-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX_6]], align 4
; PROLOG-NEXT: [[ADD_6:%.*]] = add nsw i32 [[TMP9]], [[ADD_5]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_6:%.*]] = add i64 [[INDVARS_IV]], 7
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT]], label [[FOR_EXITING_BLOCK_7]]
; PROLOG: for.exiting_block.7:
; PROLOG-NEXT: [[CMP_7:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_7]], label [[LATCHEXIT_UNR_LCSSA]], label [[LATCH_7]]
; PROLOG: latch.7:
; PROLOG-NEXT: [[ARRAYIDX_7:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT_6]]
; PROLOG-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX_7]], align 4
; PROLOG-NEXT: [[ADD_7]] = add nsw i32 [[TMP10]], [[ADD_6]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_7]] = add i64 [[INDVARS_IV]], 8
; PROLOG-NEXT: [[EXITCOND_7:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT_7]], [[N]]
; PROLOG-NEXT: br i1 [[EXITCOND_7]], label [[LATCHEXIT_UNR_LCSSA]], label [[HEADER]]
;
entry: entry:
br label %header br label %header
header: header:
%indvars.iv = phi i64 [ %indvars.iv.next, %latch ], [ 0, %entry ] %indvars.iv = phi i64 [ %indvars.iv.next, %latch ], [ 0, %entry ]
%sum.02 = phi i32 [ %add, %latch ], [ 0, %entry ] %sum.02 = phi i32 [ %add, %latch ], [ 0, %entry ]
br i1 %cond, label %for.exit2, label %for.exiting_block br i1 %cond, label %for.exit2, label %for.exiting_block
Show All 15 Lines
for.exit2: for.exit2:
ret i32 42 ret i32 42
} }
; Two exiting blocks to latch where the exiting blocks are Latch and a ; Two exiting blocks to latch where the exiting blocks are Latch and a
; non-header ; non-header
; Same as above test except the incoming value for latch Phi is from the header ; Same as above test except the incoming value for latch Phi is from the header
; FIXME: We should be able to runtime unroll. ; FIXME: We should be able to runtime unroll for epilog.
define i32 @otherblock_latch_same_exit2(i32* nocapture %a, i64 %n, i1 %cond) { define i32 @otherblock_latch_same_exit2(i32* nocapture %a, i64 %n, i1 %cond) {
; EPILOG: otherblock_latch_same_exit2( ; EPILOG: otherblock_latch_same_exit2(
; EPILOG-NOT: .unr ; EPILOG-NOT: .unr
; EPILOG-NOT: .epil ; EPILOG-NOT: .epil
; PROLOG: otherblock_latch_same_exit2( ; PROLOG-LABEL: @otherblock_latch_same_exit2(
; PROLOG-NOT: .unr ; PROLOG-NEXT: entry:
; PROLOG-NOT: .prol ; PROLOG-NEXT: [[TMP0:%.*]] = add i64 [[N:%.*]], -1
; PROLOG-NEXT: [[XTRAITER:%.*]] = and i64 [[N]], 7
; PROLOG-NEXT: [[LCMP_MOD:%.*]] = icmp eq i64 [[XTRAITER]], 0
; PROLOG-NEXT: br i1 [[LCMP_MOD]], label [[HEADER_PROL_LOOPEXIT:%.*]], label [[HEADER_PROL_PREHEADER:%.*]]
; PROLOG: header.prol.preheader:
; PROLOG-NEXT: br label [[HEADER_PROL:%.*]]
; PROLOG: header.prol:
; PROLOG-NEXT: [[INDVARS_IV_PROL:%.*]] = phi i64 [ [[INDVARS_IV_NEXT_PROL:%.*]], [[LATCH_PROL:%.*]] ], [ 0, [[HEADER_PROL_PREHEADER]] ]
; PROLOG-NEXT: [[SUM_02_PROL:%.*]] = phi i32 [ [[ADD_PROL:%.*]], [[LATCH_PROL]] ], [ 0, [[HEADER_PROL_PREHEADER]] ]
; PROLOG-NEXT: [[PROL_ITER:%.*]] = phi i64 [ [[PROL_ITER_SUB:%.*]], [[LATCH_PROL]] ], [ [[XTRAITER]], [[HEADER_PROL_PREHEADER]] ]
; PROLOG-NEXT: br i1 [[COND:%.*]], label [[FOR_EXIT2_LOOPEXIT1:%.*]], label [[FOR_EXITING_BLOCK_PROL:%.*]]
; PROLOG: for.exiting_block.prol:
; PROLOG-NEXT: [[CMP_PROL:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_PROL]], label [[HEADER_PROL_LOOPEXIT_UNR_LCSSA:%.*]], label [[LATCH_PROL]]
; PROLOG: latch.prol:
; PROLOG-NEXT: [[ARRAYIDX_PROL:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDVARS_IV_PROL]]
; PROLOG-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX_PROL]], align 4
; PROLOG-NEXT: [[ADD_PROL]] = add nsw i32 [[TMP1]], [[SUM_02_PROL]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_PROL]] = add i64 [[INDVARS_IV_PROL]], 1
; PROLOG-NEXT: [[PROL_ITER_SUB]] = add i64 [[PROL_ITER]], -1
; PROLOG-NEXT: [[PROL_ITER_CMP:%.*]] = icmp eq i64 [[PROL_ITER_SUB]], 0
; PROLOG-NEXT: br i1 [[PROL_ITER_CMP]], label [[HEADER_PROL_LOOPEXIT_UNR_LCSSA]], label [[HEADER_PROL]]
; PROLOG: header.prol.loopexit.unr-lcssa:
; PROLOG-NEXT: [[RESULT_UNR_PH:%.*]] = phi i32 [ [[ADD_PROL]], [[LATCH_PROL]] ], [ [[SUM_02_PROL]], [[FOR_EXITING_BLOCK_PROL]] ]
; PROLOG-NEXT: [[INDVARS_IV_UNR_PH:%.*]] = phi i64 [ [[INDVARS_IV_NEXT_PROL]], [[LATCH_PROL]] ], [ [[INDVARS_IV_PROL]], [[FOR_EXITING_BLOCK_PROL]] ]
; PROLOG-NEXT: [[SUM_02_UNR_PH:%.*]] = phi i32 [ [[ADD_PROL]], [[LATCH_PROL]] ], [ [[SUM_02_PROL]], [[FOR_EXITING_BLOCK_PROL]] ]
; PROLOG-NEXT: br label [[HEADER_PROL_LOOPEXIT]]
; PROLOG: header.prol.loopexit:
; PROLOG-NEXT: [[RESULT_UNR:%.*]] = phi i32 [ undef, [[ENTRY:%.*]] ], [ [[RESULT_UNR_PH]], [[HEADER_PROL_LOOPEXIT_UNR_LCSSA]] ]
; PROLOG-NEXT: [[INDVARS_IV_UNR:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_UNR_PH]], [[HEADER_PROL_LOOPEXIT_UNR_LCSSA]] ]
; PROLOG-NEXT: [[SUM_02_UNR:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[SUM_02_UNR_PH]], [[HEADER_PROL_LOOPEXIT_UNR_LCSSA]] ]
; PROLOG-NEXT: [[TMP2:%.*]] = icmp ult i64 [[TMP0]], 7
; PROLOG-NEXT: br i1 [[TMP2]], label [[LATCHEXIT:%.*]], label [[ENTRY_NEW:%.*]]
; PROLOG: entry.new:
; PROLOG-NEXT: br label [[HEADER:%.*]]
; PROLOG: header:
; PROLOG-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_UNR]], [[ENTRY_NEW]] ], [ [[INDVARS_IV_NEXT_7:%.*]], [[LATCH_7:%.*]] ]
; PROLOG-NEXT: [[SUM_02:%.*]] = phi i32 [ [[SUM_02_UNR]], [[ENTRY_NEW]] ], [ [[ADD_7:%.*]], [[LATCH_7]] ]
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT:%.*]], label [[FOR_EXITING_BLOCK:%.*]]
; PROLOG: for.exiting_block:
; PROLOG-NEXT: [[CMP:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP]], label [[LATCHEXIT_UNR_LCSSA:%.*]], label [[LATCH:%.*]]
; PROLOG: latch:
; PROLOG-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV]]
; PROLOG-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
; PROLOG-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], [[SUM_02]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT:%.*]] = add i64 [[INDVARS_IV]], 1
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT]], label [[FOR_EXITING_BLOCK_1:%.*]]
; PROLOG: latchExit.unr-lcssa:
; PROLOG-NEXT: [[RESULT_PH:%.*]] = phi i32 [ [[SUM_02]], [[FOR_EXITING_BLOCK]] ], [ [[ADD]], [[FOR_EXITING_BLOCK_1]] ], [ [[ADD_1:%.*]], [[FOR_EXITING_BLOCK_2:%.*]] ], [ [[ADD_2:%.*]], [[FOR_EXITING_BLOCK_3:%.*]] ], [ [[ADD_3:%.*]], [[FOR_EXITING_BLOCK_4:%.*]] ], [ [[ADD_4:%.*]], [[FOR_EXITING_BLOCK_5:%.*]] ], [ [[ADD_5:%.*]], [[FOR_EXITING_BLOCK_6:%.*]] ], [ [[ADD_6:%.*]], [[FOR_EXITING_BLOCK_7:%.*]] ], [ [[ADD_7]], [[LATCH_7]] ]
; PROLOG-NEXT: br label [[LATCHEXIT]]
; PROLOG: latchExit:
; PROLOG-NEXT: [[RESULT:%.*]] = phi i32 [ [[RESULT_UNR]], [[HEADER_PROL_LOOPEXIT]] ], [ [[RESULT_PH]], [[LATCHEXIT_UNR_LCSSA]] ]
; PROLOG-NEXT: ret i32 [[RESULT]]
; PROLOG: for.exit2.loopexit:
; PROLOG-NEXT: br label [[FOR_EXIT2:%.*]]
; PROLOG: for.exit2.loopexit1:
; PROLOG-NEXT: br label [[FOR_EXIT2]]
; PROLOG: for.exit2:
; PROLOG-NEXT: ret i32 42
; PROLOG: for.exiting_block.1:
; PROLOG-NEXT: [[CMP_1:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_1]], label [[LATCHEXIT_UNR_LCSSA]], label [[LATCH_1:%.*]]
; PROLOG: latch.1:
; PROLOG-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT]]
; PROLOG-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARRAYIDX_1]], align 4
; PROLOG-NEXT: [[ADD_1]] = add nsw i32 [[TMP4]], [[ADD]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_1:%.*]] = add i64 [[INDVARS_IV]], 2
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT]], label [[FOR_EXITING_BLOCK_2]]
; PROLOG: for.exiting_block.2:
; PROLOG-NEXT: [[CMP_2:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_2]], label [[LATCHEXIT_UNR_LCSSA]], label [[LATCH_2:%.*]]
; PROLOG: latch.2:
; PROLOG-NEXT: [[ARRAYIDX_2:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT_1]]
; PROLOG-NEXT: [[TMP5:%.*]] = load i32, i32* [[ARRAYIDX_2]], align 4
; PROLOG-NEXT: [[ADD_2]] = add nsw i32 [[TMP5]], [[ADD_1]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_2:%.*]] = add i64 [[INDVARS_IV]], 3
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT]], label [[FOR_EXITING_BLOCK_3]]
; PROLOG: for.exiting_block.3:
; PROLOG-NEXT: [[CMP_3:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_3]], label [[LATCHEXIT_UNR_LCSSA]], label [[LATCH_3:%.*]]
; PROLOG: latch.3:
; PROLOG-NEXT: [[ARRAYIDX_3:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT_2]]
; PROLOG-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARRAYIDX_3]], align 4
; PROLOG-NEXT: [[ADD_3]] = add nsw i32 [[TMP6]], [[ADD_2]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_3:%.*]] = add i64 [[INDVARS_IV]], 4
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT]], label [[FOR_EXITING_BLOCK_4]]
; PROLOG: for.exiting_block.4:
; PROLOG-NEXT: [[CMP_4:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_4]], label [[LATCHEXIT_UNR_LCSSA]], label [[LATCH_4:%.*]]
; PROLOG: latch.4:
; PROLOG-NEXT: [[ARRAYIDX_4:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT_3]]
; PROLOG-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARRAYIDX_4]], align 4
; PROLOG-NEXT: [[ADD_4]] = add nsw i32 [[TMP7]], [[ADD_3]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_4:%.*]] = add i64 [[INDVARS_IV]], 5
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT]], label [[FOR_EXITING_BLOCK_5]]
; PROLOG: for.exiting_block.5:
; PROLOG-NEXT: [[CMP_5:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_5]], label [[LATCHEXIT_UNR_LCSSA]], label [[LATCH_5:%.*]]
; PROLOG: latch.5:
; PROLOG-NEXT: [[ARRAYIDX_5:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT_4]]
; PROLOG-NEXT: [[TMP8:%.*]] = load i32, i32* [[ARRAYIDX_5]], align 4
; PROLOG-NEXT: [[ADD_5]] = add nsw i32 [[TMP8]], [[ADD_4]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_5:%.*]] = add i64 [[INDVARS_IV]], 6
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT]], label [[FOR_EXITING_BLOCK_6]]
; PROLOG: for.exiting_block.6:
; PROLOG-NEXT: [[CMP_6:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_6]], label [[LATCHEXIT_UNR_LCSSA]], label [[LATCH_6:%.*]]
; PROLOG: latch.6:
; PROLOG-NEXT: [[ARRAYIDX_6:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT_5]]
; PROLOG-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX_6]], align 4
; PROLOG-NEXT: [[ADD_6]] = add nsw i32 [[TMP9]], [[ADD_5]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_6:%.*]] = add i64 [[INDVARS_IV]], 7
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT]], label [[FOR_EXITING_BLOCK_7]]
; PROLOG: for.exiting_block.7:
; PROLOG-NEXT: [[CMP_7:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_7]], label [[LATCHEXIT_UNR_LCSSA]], label [[LATCH_7]]
; PROLOG: latch.7:
; PROLOG-NEXT: [[ARRAYIDX_7:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT_6]]
; PROLOG-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX_7]], align 4
; PROLOG-NEXT: [[ADD_7]] = add nsw i32 [[TMP10]], [[ADD_6]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_7]] = add i64 [[INDVARS_IV]], 8
; PROLOG-NEXT: [[EXITCOND_7:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT_7]], [[N]]
; PROLOG-NEXT: br i1 [[EXITCOND_7]], label [[LATCHEXIT_UNR_LCSSA]], label [[HEADER]]
;
entry: entry:
br label %header br label %header
header: header:
%indvars.iv = phi i64 [ %indvars.iv.next, %latch ], [ 0, %entry ] %indvars.iv = phi i64 [ %indvars.iv.next, %latch ], [ 0, %entry ]
%sum.02 = phi i32 [ %add, %latch ], [ 0, %entry ] %sum.02 = phi i32 [ %add, %latch ], [ 0, %entry ]
br i1 %cond, label %for.exit2, label %for.exiting_block br i1 %cond, label %for.exit2, label %for.exiting_block
Show All 16 Lines
for.exit2: for.exit2:
ret i32 42 ret i32 42
} }
; Two exiting blocks to latch where the exiting blocks are Latch and a ; Two exiting blocks to latch where the exiting blocks are Latch and a
; non-header ; non-header
; Same as above test except the incoming value for cloned latch Phi is from the ; Same as above test except the incoming value for cloned latch Phi is from the
; for.exiting_block. ; for.exiting_block.
; FIXME: We should be able to runtime unroll. ; FIXME: We should be able to runtime unroll for epilog.
define i32 @otherblock_latch_same_exit3(i32* nocapture %a, i64 %n, i1 %cond) { define i32 @otherblock_latch_same_exit3(i32* nocapture %a, i64 %n, i1 %cond) {
; EPILOG: otherblock_latch_same_exit3( ; EPILOG: otherblock_latch_same_exit3(
; EPILOG-NOT: .unr ; EPILOG-NOT: .unr
; EPILOG-NOT: .epil ; EPILOG-NOT: .epil
; PROLOG: otherblock_latch_same_exit3( ; PROLOG-LABEL: @otherblock_latch_same_exit3(
; PROLOG-NOT: .unr ; PROLOG-NEXT: entry:
; PROLOG-NOT: .prol ; PROLOG-NEXT: [[TMP0:%.*]] = add i64 [[N:%.*]], -1
; PROLOG-NEXT: [[XTRAITER:%.*]] = and i64 [[N]], 7
; PROLOG-NEXT: [[LCMP_MOD:%.*]] = icmp eq i64 [[XTRAITER]], 0
; PROLOG-NEXT: br i1 [[LCMP_MOD]], label [[HEADER_PROL_LOOPEXIT:%.*]], label [[HEADER_PROL_PREHEADER:%.*]]
; PROLOG: header.prol.preheader:
; PROLOG-NEXT: br label [[HEADER_PROL:%.*]]
; PROLOG: header.prol:
; PROLOG-NEXT: [[INDVARS_IV_PROL:%.*]] = phi i64 [ [[INDVARS_IV_NEXT_PROL:%.*]], [[LATCH_PROL:%.*]] ], [ 0, [[HEADER_PROL_PREHEADER]] ]
; PROLOG-NEXT: [[SUM_02_PROL:%.*]] = phi i32 [ [[ADD_PROL:%.*]], [[LATCH_PROL]] ], [ 0, [[HEADER_PROL_PREHEADER]] ]
; PROLOG-NEXT: [[PROL_ITER:%.*]] = phi i64 [ [[PROL_ITER_SUB:%.*]], [[LATCH_PROL]] ], [ [[XTRAITER]], [[HEADER_PROL_PREHEADER]] ]
; PROLOG-NEXT: br i1 [[COND:%.*]], label [[FOR_EXIT2_LOOPEXIT1:%.*]], label [[FOR_EXITING_BLOCK_PROL:%.*]]
; PROLOG: for.exiting_block.prol:
; PROLOG-NEXT: [[ARRAYIDX_PROL:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDVARS_IV_PROL]]
; PROLOG-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX_PROL]], align 4
; PROLOG-NEXT: [[ADD_PROL]] = add nsw i32 [[TMP1]], [[SUM_02_PROL]]
; PROLOG-NEXT: [[CMP_PROL:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_PROL]], label [[HEADER_PROL_LOOPEXIT_UNR_LCSSA:%.*]], label [[LATCH_PROL]]
; PROLOG: latch.prol:
; PROLOG-NEXT: [[INDVARS_IV_NEXT_PROL]] = add i64 [[INDVARS_IV_PROL]], 1
; PROLOG-NEXT: [[PROL_ITER_SUB]] = add i64 [[PROL_ITER]], -1
; PROLOG-NEXT: [[PROL_ITER_CMP:%.*]] = icmp eq i64 [[PROL_ITER_SUB]], 0
; PROLOG-NEXT: br i1 [[PROL_ITER_CMP]], label [[HEADER_PROL_LOOPEXIT_UNR_LCSSA]], label [[HEADER_PROL]]
; PROLOG: header.prol.loopexit.unr-lcssa:
; PROLOG-NEXT: [[RESULT_UNR_PH:%.*]] = phi i32 [ [[ADD_PROL]], [[LATCH_PROL]] ], [ [[SUM_02_PROL]], [[FOR_EXITING_BLOCK_PROL]] ]
; PROLOG-NEXT: [[INDVARS_IV_UNR_PH:%.*]] = phi i64 [ [[INDVARS_IV_NEXT_PROL]], [[LATCH_PROL]] ], [ [[INDVARS_IV_PROL]], [[FOR_EXITING_BLOCK_PROL]] ]
; PROLOG-NEXT: br label [[HEADER_PROL_LOOPEXIT]]
; PROLOG: header.prol.loopexit:
; PROLOG-NEXT: [[RESULT_UNR:%.*]] = phi i32 [ undef, [[ENTRY:%.*]] ], [ [[RESULT_UNR_PH]], [[HEADER_PROL_LOOPEXIT_UNR_LCSSA]] ]
; PROLOG-NEXT: [[INDVARS_IV_UNR:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_UNR_PH]], [[HEADER_PROL_LOOPEXIT_UNR_LCSSA]] ]
; PROLOG-NEXT: [[SUM_02_UNR:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[ADD_PROL]], [[HEADER_PROL_LOOPEXIT_UNR_LCSSA]] ]
; PROLOG-NEXT: [[TMP2:%.*]] = icmp ult i64 [[TMP0]], 7
; PROLOG-NEXT: br i1 [[TMP2]], label [[LATCHEXIT:%.*]], label [[ENTRY_NEW:%.*]]
; PROLOG: entry.new:
; PROLOG-NEXT: br label [[HEADER:%.*]]
; PROLOG: header:
; PROLOG-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_UNR]], [[ENTRY_NEW]] ], [ [[INDVARS_IV_NEXT_7:%.*]], [[LATCH_7:%.*]] ]
; PROLOG-NEXT: [[SUM_02:%.*]] = phi i32 [ [[SUM_02_UNR]], [[ENTRY_NEW]] ], [ [[ADD_7:%.*]], [[LATCH_7]] ]
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT:%.*]], label [[FOR_EXITING_BLOCK:%.*]]
; PROLOG: for.exiting_block:
; PROLOG-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV]]
; PROLOG-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
; PROLOG-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], [[SUM_02]]
; PROLOG-NEXT: [[CMP:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP]], label [[LATCHEXIT_UNR_LCSSA:%.*]], label [[LATCH:%.*]]
; PROLOG: latch:
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT]], label [[FOR_EXITING_BLOCK_1:%.*]]
; PROLOG: latchExit.unr-lcssa:
; PROLOG-NEXT: [[RESULT_PH:%.*]] = phi i32 [ [[SUM_02]], [[FOR_EXITING_BLOCK]] ], [ [[ADD]], [[FOR_EXITING_BLOCK_1]] ], [ [[ADD_1:%.*]], [[FOR_EXITING_BLOCK_2:%.*]] ], [ [[ADD_2:%.*]], [[FOR_EXITING_BLOCK_3:%.*]] ], [ [[ADD_3:%.*]], [[FOR_EXITING_BLOCK_4:%.*]] ], [ [[ADD_4:%.*]], [[FOR_EXITING_BLOCK_5:%.*]] ], [ [[ADD_5:%.*]], [[FOR_EXITING_BLOCK_6:%.*]] ], [ [[ADD_6:%.*]], [[FOR_EXITING_BLOCK_7:%.*]] ], [ [[ADD_7]], [[LATCH_7]] ]
; PROLOG-NEXT: br label [[LATCHEXIT]]
; PROLOG: latchExit:
; PROLOG-NEXT: [[RESULT:%.*]] = phi i32 [ [[RESULT_UNR]], [[HEADER_PROL_LOOPEXIT]] ], [ [[RESULT_PH]], [[LATCHEXIT_UNR_LCSSA]] ]
; PROLOG-NEXT: ret i32 [[RESULT]]
; PROLOG: for.exit2.loopexit:
; PROLOG-NEXT: br label [[FOR_EXIT2:%.*]]
; PROLOG: for.exit2.loopexit1:
; PROLOG-NEXT: br label [[FOR_EXIT2]]
; PROLOG: for.exit2:
; PROLOG-NEXT: ret i32 42
; PROLOG: for.exiting_block.1:
; PROLOG-NEXT: [[INDVARS_IV_NEXT:%.*]] = add i64 [[INDVARS_IV]], 1
; PROLOG-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT]]
; PROLOG-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARRAYIDX_1]], align 4
; PROLOG-NEXT: [[ADD_1]] = add nsw i32 [[TMP4]], [[ADD]]
; PROLOG-NEXT: [[CMP_1:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_1]], label [[LATCHEXIT_UNR_LCSSA]], label [[LATCH_1:%.*]]
; PROLOG: latch.1:
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT]], label [[FOR_EXITING_BLOCK_2]]
; PROLOG: for.exiting_block.2:
; PROLOG-NEXT: [[INDVARS_IV_NEXT_1:%.*]] = add i64 [[INDVARS_IV]], 2
; PROLOG-NEXT: [[ARRAYIDX_2:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT_1]]
; PROLOG-NEXT: [[TMP5:%.*]] = load i32, i32* [[ARRAYIDX_2]], align 4
; PROLOG-NEXT: [[ADD_2]] = add nsw i32 [[TMP5]], [[ADD_1]]
; PROLOG-NEXT: [[CMP_2:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_2]], label [[LATCHEXIT_UNR_LCSSA]], label [[LATCH_2:%.*]]
; PROLOG: latch.2:
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT]], label [[FOR_EXITING_BLOCK_3]]
; PROLOG: for.exiting_block.3:
; PROLOG-NEXT: [[INDVARS_IV_NEXT_2:%.*]] = add i64 [[INDVARS_IV]], 3
; PROLOG-NEXT: [[ARRAYIDX_3:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT_2]]
; PROLOG-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARRAYIDX_3]], align 4
; PROLOG-NEXT: [[ADD_3]] = add nsw i32 [[TMP6]], [[ADD_2]]
; PROLOG-NEXT: [[CMP_3:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_3]], label [[LATCHEXIT_UNR_LCSSA]], label [[LATCH_3:%.*]]
; PROLOG: latch.3:
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT]], label [[FOR_EXITING_BLOCK_4]]
; PROLOG: for.exiting_block.4:
; PROLOG-NEXT: [[INDVARS_IV_NEXT_3:%.*]] = add i64 [[INDVARS_IV]], 4
; PROLOG-NEXT: [[ARRAYIDX_4:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT_3]]
; PROLOG-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARRAYIDX_4]], align 4
; PROLOG-NEXT: [[ADD_4]] = add nsw i32 [[TMP7]], [[ADD_3]]
; PROLOG-NEXT: [[CMP_4:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_4]], label [[LATCHEXIT_UNR_LCSSA]], label [[LATCH_4:%.*]]
; PROLOG: latch.4:
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT]], label [[FOR_EXITING_BLOCK_5]]
; PROLOG: for.exiting_block.5:
; PROLOG-NEXT: [[INDVARS_IV_NEXT_4:%.*]] = add i64 [[INDVARS_IV]], 5
; PROLOG-NEXT: [[ARRAYIDX_5:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT_4]]
; PROLOG-NEXT: [[TMP8:%.*]] = load i32, i32* [[ARRAYIDX_5]], align 4
; PROLOG-NEXT: [[ADD_5]] = add nsw i32 [[TMP8]], [[ADD_4]]
; PROLOG-NEXT: [[CMP_5:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_5]], label [[LATCHEXIT_UNR_LCSSA]], label [[LATCH_5:%.*]]
; PROLOG: latch.5:
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT]], label [[FOR_EXITING_BLOCK_6]]
; PROLOG: for.exiting_block.6:
; PROLOG-NEXT: [[INDVARS_IV_NEXT_5:%.*]] = add i64 [[INDVARS_IV]], 6
; PROLOG-NEXT: [[ARRAYIDX_6:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT_5]]
; PROLOG-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX_6]], align 4
; PROLOG-NEXT: [[ADD_6]] = add nsw i32 [[TMP9]], [[ADD_5]]
; PROLOG-NEXT: [[CMP_6:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_6]], label [[LATCHEXIT_UNR_LCSSA]], label [[LATCH_6:%.*]]
; PROLOG: latch.6:
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT]], label [[FOR_EXITING_BLOCK_7]]
; PROLOG: for.exiting_block.7:
; PROLOG-NEXT: [[INDVARS_IV_NEXT_6:%.*]] = add i64 [[INDVARS_IV]], 7
; PROLOG-NEXT: [[ARRAYIDX_7:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT_6]]
; PROLOG-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX_7]], align 4
; PROLOG-NEXT: [[ADD_7]] = add nsw i32 [[TMP10]], [[ADD_6]]
; PROLOG-NEXT: [[CMP_7:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_7]], label [[LATCHEXIT_UNR_LCSSA]], label [[LATCH_7]]
; PROLOG: latch.7:
; PROLOG-NEXT: [[INDVARS_IV_NEXT_7]] = add i64 [[INDVARS_IV]], 8
; PROLOG-NEXT: [[EXITCOND_7:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT_7]], [[N]]
; PROLOG-NEXT: br i1 [[EXITCOND_7]], label [[LATCHEXIT_UNR_LCSSA]], label [[HEADER]]
;
entry: entry:
br label %header br label %header
header: header:
%indvars.iv = phi i64 [ %indvars.iv.next, %latch ], [ 0, %entry ] %indvars.iv = phi i64 [ %indvars.iv.next, %latch ], [ 0, %entry ]
%sum.02 = phi i32 [ %add, %latch ], [ 0, %entry ] %sum.02 = phi i32 [ %add, %latch ], [ 0, %entry ]
br i1 %cond, label %for.exit2, label %for.exiting_block br i1 %cond, label %for.exit2, label %for.exiting_block
Show All 12 Lines
latchExit: ; preds = %latch, %entry latchExit: ; preds = %latch, %entry
%result = phi i32 [ %sum.02, %for.exiting_block ], [ %add, %latch ] %result = phi i32 [ %sum.02, %for.exiting_block ], [ %add, %latch ]
ret i32 %result ret i32 %result
for.exit2: for.exit2:
ret i32 42 ret i32 42
} }
; FIXME: Support multiple exiting blocks to the unique exit block (LatchExit). ; FIXME: Support multiple exiting blocks to the unique exit block (LatchExit)
; for epilog.
; Only 2 blocks in loop: header and latch where both exit to same LatchExit. ; Only 2 blocks in loop: header and latch where both exit to same LatchExit.
define i32 @hdr_latch_diff_exit(i32* nocapture %a, i64 %n, i1 %cond) {
; EPILOG: hdr_latch_diff_exit(
; EPILOG-NOT: .unr
; EPILOG-NOT: .epil
; PROLOG-LABEL: @hdr_latch_diff_exit(
; PROLOG-NEXT: entry:
; PROLOG-NEXT: [[TMP0:%.*]] = add i64 [[N:%.*]], -1
; PROLOG-NEXT: [[XTRAITER:%.*]] = and i64 [[N]], 7
; PROLOG-NEXT: [[LCMP_MOD:%.*]] = icmp eq i64 [[XTRAITER]], 0
; PROLOG-NEXT: br i1 [[LCMP_MOD]], label [[HEADER_PROL_LOOPEXIT:%.*]], label [[HEADER_PROL_PREHEADER:%.*]]
; PROLOG: header.prol.preheader:
; PROLOG-NEXT: br label [[HEADER_PROL:%.*]]
; PROLOG: header.prol:
; PROLOG-NEXT: [[INDVARS_IV_PROL:%.*]] = phi i64 [ [[INDVARS_IV_NEXT_PROL:%.*]], [[FOR_BODY_PROL:%.*]] ], [ 0, [[HEADER_PROL_PREHEADER]] ]
; PROLOG-NEXT: [[SUM_02_PROL:%.*]] = phi i32 [ [[ADD_PROL:%.*]], [[FOR_BODY_PROL]] ], [ 0, [[HEADER_PROL_PREHEADER]] ]
; PROLOG-NEXT: [[PROL_ITER:%.*]] = phi i64 [ [[PROL_ITER_SUB:%.*]], [[FOR_BODY_PROL]] ], [ [[XTRAITER]], [[HEADER_PROL_PREHEADER]] ]
; PROLOG-NEXT: br i1 [[COND:%.*]], label [[FOR_EXIT2_LOOPEXIT1:%.*]], label [[FOR_EXITING_BLOCK_PROL:%.*]]
; PROLOG: for.exiting_block.prol:
; PROLOG-NEXT: [[CMP_PROL:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_PROL]], label [[HEADER_PROL_LOOPEXIT_UNR_LCSSA:%.*]], label [[FOR_BODY_PROL]]
; PROLOG: for.body.prol:
; PROLOG-NEXT: [[ARRAYIDX_PROL:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[INDVARS_IV_PROL]]
; PROLOG-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX_PROL]], align 4
; PROLOG-NEXT: [[ADD_PROL]] = add nsw i32 [[TMP1]], [[SUM_02_PROL]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_PROL]] = add i64 [[INDVARS_IV_PROL]], 1
; PROLOG-NEXT: [[PROL_ITER_SUB]] = add i64 [[PROL_ITER]], -1
; PROLOG-NEXT: [[PROL_ITER_CMP:%.*]] = icmp eq i64 [[PROL_ITER_SUB]], 0
; PROLOG-NEXT: br i1 [[PROL_ITER_CMP]], label [[HEADER_PROL_LOOPEXIT_UNR_LCSSA]], label [[HEADER_PROL]]
; PROLOG: header.prol.loopexit.unr-lcssa:
; PROLOG-NEXT: [[SUM_0_LCSSA_UNR_PH:%.*]] = phi i32 [ [[ADD_PROL]], [[FOR_BODY_PROL]] ], [ 0, [[FOR_EXITING_BLOCK_PROL]] ]
; PROLOG-NEXT: [[INDVARS_IV_UNR_PH:%.*]] = phi i64 [ [[INDVARS_IV_NEXT_PROL]], [[FOR_BODY_PROL]] ], [ [[INDVARS_IV_PROL]], [[FOR_EXITING_BLOCK_PROL]] ]
; PROLOG-NEXT: [[SUM_02_UNR_PH:%.*]] = phi i32 [ [[ADD_PROL]], [[FOR_BODY_PROL]] ], [ [[SUM_02_PROL]], [[FOR_EXITING_BLOCK_PROL]] ]
; PROLOG-NEXT: br label [[HEADER_PROL_LOOPEXIT]]
; PROLOG: header.prol.loopexit:
; PROLOG-NEXT: [[SUM_0_LCSSA_UNR:%.*]] = phi i32 [ undef, [[ENTRY:%.*]] ], [ [[SUM_0_LCSSA_UNR_PH]], [[HEADER_PROL_LOOPEXIT_UNR_LCSSA]] ]
; PROLOG-NEXT: [[INDVARS_IV_UNR:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_UNR_PH]], [[HEADER_PROL_LOOPEXIT_UNR_LCSSA]] ]
; PROLOG-NEXT: [[SUM_02_UNR:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[SUM_02_UNR_PH]], [[HEADER_PROL_LOOPEXIT_UNR_LCSSA]] ]
; PROLOG-NEXT: [[TMP2:%.*]] = icmp ult i64 [[TMP0]], 7
; PROLOG-NEXT: br i1 [[TMP2]], label [[FOR_END:%.*]], label [[ENTRY_NEW:%.*]]
; PROLOG: entry.new:
; PROLOG-NEXT: br label [[HEADER:%.*]]
; PROLOG: header:
; PROLOG-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_UNR]], [[ENTRY_NEW]] ], [ [[INDVARS_IV_NEXT_7:%.*]], [[FOR_BODY_7:%.*]] ]
; PROLOG-NEXT: [[SUM_02:%.*]] = phi i32 [ [[SUM_02_UNR]], [[ENTRY_NEW]] ], [ [[ADD_7:%.*]], [[FOR_BODY_7]] ]
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT:%.*]], label [[FOR_EXITING_BLOCK:%.*]]
; PROLOG: for.exiting_block:
; PROLOG-NEXT: [[CMP:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP]], label [[FOR_END_UNR_LCSSA:%.*]], label [[FOR_BODY:%.*]]
; PROLOG: for.body:
; PROLOG-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV]]
; PROLOG-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
; PROLOG-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], [[SUM_02]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT:%.*]] = add i64 [[INDVARS_IV]], 1
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT]], label [[FOR_EXITING_BLOCK_1:%.*]]
; PROLOG: for.end.unr-lcssa:
; PROLOG-NEXT: [[SUM_0_LCSSA_PH:%.*]] = phi i32 [ 0, [[FOR_EXITING_BLOCK]] ], [ 0, [[FOR_EXITING_BLOCK_1]] ], [ 0, [[FOR_EXITING_BLOCK_2:%.*]] ], [ 0, [[FOR_EXITING_BLOCK_3:%.*]] ], [ 0, [[FOR_EXITING_BLOCK_4:%.*]] ], [ 0, [[FOR_EXITING_BLOCK_5:%.*]] ], [ 0, [[FOR_EXITING_BLOCK_6:%.*]] ], [ 0, [[FOR_EXITING_BLOCK_7:%.*]] ], [ [[ADD_7]], [[FOR_BODY_7]] ]
; PROLOG-NEXT: br label [[FOR_END]]
; PROLOG: for.end:
; PROLOG-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ [[SUM_0_LCSSA_UNR]], [[HEADER_PROL_LOOPEXIT]] ], [ [[SUM_0_LCSSA_PH]], [[FOR_END_UNR_LCSSA]] ]
; PROLOG-NEXT: ret i32 [[SUM_0_LCSSA]]
; PROLOG: for.exit2.loopexit:
; PROLOG-NEXT: br label [[FOR_EXIT2:%.*]]
; PROLOG: for.exit2.loopexit1:
; PROLOG-NEXT: br label [[FOR_EXIT2]]
; PROLOG: for.exit2:
; PROLOG-NEXT: ret i32 42
; PROLOG: for.exiting_block.1:
; PROLOG-NEXT: [[CMP_1:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_1]], label [[FOR_END_UNR_LCSSA]], label [[FOR_BODY_1:%.*]]
; PROLOG: for.body.1:
; PROLOG-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT]]
; PROLOG-NEXT: [[TMP4:%.*]] = load i32, i32* [[ARRAYIDX_1]], align 4
; PROLOG-NEXT: [[ADD_1:%.*]] = add nsw i32 [[TMP4]], [[ADD]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_1:%.*]] = add i64 [[INDVARS_IV]], 2
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT]], label [[FOR_EXITING_BLOCK_2]]
; PROLOG: for.exiting_block.2:
; PROLOG-NEXT: [[CMP_2:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_2]], label [[FOR_END_UNR_LCSSA]], label [[FOR_BODY_2:%.*]]
; PROLOG: for.body.2:
; PROLOG-NEXT: [[ARRAYIDX_2:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT_1]]
; PROLOG-NEXT: [[TMP5:%.*]] = load i32, i32* [[ARRAYIDX_2]], align 4
; PROLOG-NEXT: [[ADD_2:%.*]] = add nsw i32 [[TMP5]], [[ADD_1]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_2:%.*]] = add i64 [[INDVARS_IV]], 3
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT]], label [[FOR_EXITING_BLOCK_3]]
; PROLOG: for.exiting_block.3:
; PROLOG-NEXT: [[CMP_3:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_3]], label [[FOR_END_UNR_LCSSA]], label [[FOR_BODY_3:%.*]]
; PROLOG: for.body.3:
; PROLOG-NEXT: [[ARRAYIDX_3:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT_2]]
; PROLOG-NEXT: [[TMP6:%.*]] = load i32, i32* [[ARRAYIDX_3]], align 4
; PROLOG-NEXT: [[ADD_3:%.*]] = add nsw i32 [[TMP6]], [[ADD_2]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_3:%.*]] = add i64 [[INDVARS_IV]], 4
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT]], label [[FOR_EXITING_BLOCK_4]]
; PROLOG: for.exiting_block.4:
; PROLOG-NEXT: [[CMP_4:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_4]], label [[FOR_END_UNR_LCSSA]], label [[FOR_BODY_4:%.*]]
; PROLOG: for.body.4:
; PROLOG-NEXT: [[ARRAYIDX_4:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT_3]]
; PROLOG-NEXT: [[TMP7:%.*]] = load i32, i32* [[ARRAYIDX_4]], align 4
; PROLOG-NEXT: [[ADD_4:%.*]] = add nsw i32 [[TMP7]], [[ADD_3]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_4:%.*]] = add i64 [[INDVARS_IV]], 5
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT]], label [[FOR_EXITING_BLOCK_5]]
; PROLOG: for.exiting_block.5:
; PROLOG-NEXT: [[CMP_5:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_5]], label [[FOR_END_UNR_LCSSA]], label [[FOR_BODY_5:%.*]]
; PROLOG: for.body.5:
; PROLOG-NEXT: [[ARRAYIDX_5:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT_4]]
; PROLOG-NEXT: [[TMP8:%.*]] = load i32, i32* [[ARRAYIDX_5]], align 4
; PROLOG-NEXT: [[ADD_5:%.*]] = add nsw i32 [[TMP8]], [[ADD_4]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_5:%.*]] = add i64 [[INDVARS_IV]], 6
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT]], label [[FOR_EXITING_BLOCK_6]]
; PROLOG: for.exiting_block.6:
; PROLOG-NEXT: [[CMP_6:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_6]], label [[FOR_END_UNR_LCSSA]], label [[FOR_BODY_6:%.*]]
; PROLOG: for.body.6:
; PROLOG-NEXT: [[ARRAYIDX_6:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT_5]]
; PROLOG-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX_6]], align 4
; PROLOG-NEXT: [[ADD_6:%.*]] = add nsw i32 [[TMP9]], [[ADD_5]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_6:%.*]] = add i64 [[INDVARS_IV]], 7
; PROLOG-NEXT: br i1 [[COND]], label [[FOR_EXIT2_LOOPEXIT]], label [[FOR_EXITING_BLOCK_7]]
; PROLOG: for.exiting_block.7:
; PROLOG-NEXT: [[CMP_7:%.*]] = icmp eq i64 [[N]], 42
; PROLOG-NEXT: br i1 [[CMP_7]], label [[FOR_END_UNR_LCSSA]], label [[FOR_BODY_7]]
; PROLOG: for.body.7:
; PROLOG-NEXT: [[ARRAYIDX_7:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INDVARS_IV_NEXT_6]]
; PROLOG-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX_7]], align 4
; PROLOG-NEXT: [[ADD_7]] = add nsw i32 [[TMP10]], [[ADD_6]]
; PROLOG-NEXT: [[INDVARS_IV_NEXT_7]] = add i64 [[INDVARS_IV]], 8
; PROLOG-NEXT: [[EXITCOND_7:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT_7]], [[N]]
; PROLOG-NEXT: br i1 [[EXITCOND_7]], label [[FOR_END_UNR_LCSSA]], label [[HEADER]]
;
entry:
br label %header
header:
%indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
%sum.02 = phi i32 [ %add, %for.body ], [ 0, %entry ]
br i1 %cond, label %for.exit2, label %for.exiting_block
for.exiting_block:
%cmp = icmp eq i64 %n, 42
br i1 %cmp, label %for.end, label %for.body
for.body: ; preds = %for.body, %entry
%arrayidx = getelementptr inbounds i32, i32* %a, i64 %indvars.iv
%0 = load i32, i32* %arrayidx, align 4
%add = add nsw i32 %0, %sum.02
%indvars.iv.next = add i64 %indvars.iv, 1
%exitcond = icmp eq i64 %indvars.iv.next, %n
br i1 %exitcond, label %for.end, label %header
for.end: ; preds = %for.body, %entry
%sum.0.lcssa = phi i32 [ 0, %for.exiting_block ], [ %add, %for.body ]
ret i32 %sum.0.lcssa
for.exit2:
ret i32 42
}
; FIXME: Support multiple exiting blocks to the unique exit block for epilog.
define void @unique_exit(i32 %arg) { define void @unique_exit(i32 %arg) {
; EPILOG: unique_exit( ; EPILOG: unique_exit(
; EPILOG-NOT: .unr ; EPILOG-NOT: .unr
; EPILOG-NOT: .epil ; EPILOG-NOT: .epil
; PROLOG: unique_exit( ; PROLOG-LABEL: @unique_exit(
; PROLOG-NOT: .unr ; PROLOG-NEXT: entry:
; PROLOG-NOT: .prol ; PROLOG-NEXT: br i1 false, label [[PREHEADER:%.*]], label [[RETURNBLOCK:%.*]]
; PROLOG: preheader:
; PROLOG-NEXT: br i1 false, label [[HEADER_PROL_PREHEADER:%.*]], label [[HEADER_PROL_LOOPEXIT:%.*]]
; PROLOG: header.prol.preheader:
; PROLOG-NEXT: br label [[HEADER_PROL:%.*]]
; PROLOG: header.prol:
; PROLOG-NEXT: br i1 true, label [[HEADER_PROL_LOOPEXIT_UNR_LCSSA:%.*]], label [[LATCH_PROL:%.*]]
; PROLOG: latch.prol:
; PROLOG-NEXT: br i1 undef, label [[HEADER_PROL]], label [[HEADER_PROL_LOOPEXIT_UNR_LCSSA]]
; PROLOG: header.prol.loopexit.unr-lcssa:
; PROLOG-NEXT: br label [[HEADER_PROL_LOOPEXIT]]
; PROLOG: header.prol.loopexit:
; PROLOG-NEXT: br i1 false, label [[LATCHEXIT:%.*]], label [[PREHEADER_NEW:%.*]]
; PROLOG: preheader.new:
; PROLOG-NEXT: br label [[HEADER:%.*]]
; PROLOG: header:
; PROLOG-NEXT: br i1 true, label [[LATCHEXIT_UNR_LCSSA:%.*]], label [[LATCH:%.*]]
; PROLOG: latch:
; PROLOG-NEXT: br i1 true, label [[LATCHEXIT_UNR_LCSSA]], label [[LATCH_1:%.*]]
; PROLOG: latchExit.unr-lcssa:
; PROLOG-NEXT: br label [[LATCHEXIT]]
; PROLOG: latchExit:
; PROLOG-NEXT: br label [[RETURNBLOCK]]
; PROLOG: returnblock:
; PROLOG-NEXT: ret void
; PROLOG: latch.1:
; PROLOG-NEXT: br i1 true, label [[LATCHEXIT_UNR_LCSSA]], label [[LATCH_2:%.*]]
; PROLOG: latch.2:
; PROLOG-NEXT: br i1 true, label [[LATCHEXIT_UNR_LCSSA]], label [[LATCH_3:%.*]]
; PROLOG: latch.3:
; PROLOG-NEXT: br i1 true, label [[LATCHEXIT_UNR_LCSSA]], label [[LATCH_4:%.*]]
; PROLOG: latch.4:
; PROLOG-NEXT: br i1 true, label [[LATCHEXIT_UNR_LCSSA]], label [[LATCH_5:%.*]]
; PROLOG: latch.5:
; PROLOG-NEXT: br i1 true, label [[LATCHEXIT_UNR_LCSSA]], label [[LATCH_6:%.*]]
; PROLOG: latch.6:
; PROLOG-NEXT: br i1 true, label [[LATCHEXIT_UNR_LCSSA]], label [[LATCH_7:%.*]]
; PROLOG: latch.7:
; PROLOG-NEXT: br i1 false, label [[HEADER]], label [[LATCHEXIT_UNR_LCSSA]]
;
entry: entry:
%tmp = icmp sgt i32 undef, %arg %tmp = icmp sgt i32 undef, %arg
br i1 %tmp, label %preheader, label %returnblock br i1 %tmp, label %preheader, label %returnblock
preheader: ; preds = %entry preheader: ; preds = %entry
br label %header br label %header
header: ; preds = %preheader, %latch header: ; preds = %preheader, %latch
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