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[RFC] [CFE] Allocatable Global Register Variables for ARM
AbandonedPublic

Authored by carwil on Dec 21 2018, 7:41 AM.

Details

Reviewers
amilendra
Summary

Provides the frontend support for using r5-r11 as globally scoped register variables.
LLVM patch: https://reviews.llvm.org/D56005

Diff Detail

Event Timeline

carwil created this revision.Dec 21 2018, 7:41 AM
javed.absar added inline comments.Dec 21 2018, 9:25 AM
lib/Basic/Targets/ARM.h
151

The implementation of the function probably belongs to Targets/ARM.cpp. Also, this can be written more compactly as :

SmallVector<StringRef, 8> Regs = {"r4", "r5", ... "sp" };
if (std::any_of(Regs.begin(), Regs.end(), 
         [RegName](StringRef r) { return RegName.equals(r); })) {
     HasSizeMismatch = false;
     return true;
}
carwil updated this revision to Diff 181353.Jan 11 2019, 12:40 PM
carwil edited the summary of this revision. (Show Details)
  • Re-implementation using subtarget features over metadata.
  • Reduction of register range to R5-R11.
  • Additional checks to fix issues with spilling registers for stack alignment.
  • Added clang errors for conflicting options with reserved registers.
carwil updated this revision to Diff 181583.Jan 14 2019, 10:19 AM

Added some regression tests for invalid -ffixed-reg combinations and the declaration of (un)supported variables.

carwil updated this revision to Diff 181766.Jan 15 2019, 3:25 AM
carwil set the repository for this revision to rC Clang.

Added cfe-commits.

amilendra edited reviewers, added: amilendra; removed: amilendra_arm.Jan 18 2019, 5:06 AM
carwil updated this revision to Diff 183114.Jan 23 2019, 9:23 AM

More tests, and better handling of argument combination errors.

carwil updated this revision to Diff 185277.Feb 5 2019, 4:00 AM

Removed the complicated frame pointer/ffixed combination errors in favour of an always on warning (in a new group, so it can be silenced).