This is an archive of the discontinued LLVM Phabricator instance.

Differential D55985

AMDGPU: Remove VS/SV mappings from select
ClosedPublic

Authored by arsenm on Dec 20 2018, 9:32 PM.

Details

Reviewers
tstellar
rampitec
Summary

These would violate the constant bus restriction

Diff Detail

Event Timeline

arsenm created this revision.Dec 20 2018, 9:32 PM
Herald added subscribers: t-tye, tpr, dstuttard and 5 others. · View Herald TranscriptDec 20 2018, 9:32 PM
arsenm added a comment.Jan 6 2019, 3:49 AM

ping

rampitec accepted this revision.Jan 6 2019, 10:54 AM

LGTM

This revision is now accepted and ready to land.Jan 6 2019, 10:54 AM
arsenm closed this revision.Jan 7 2019, 5:25 AM

r350517

Revision Contents

PathSize
lib/
Target/
AMDGPU/
16 lines
test/
CodeGen/
AMDGPU/
GlobalISel/
170 lines

Diff 179240

lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp

Show First 20 Lines • Show All 174 Lines • ▼ Show 20 Lines case TargetOpcode::G_SELECT: {
const InstructionMapping &SSMapping = getInstructionMapping(1, 1, const InstructionMapping &SSMapping = getInstructionMapping(1, 1,
getOperandsMapping({AMDGPU::getValueMapping(AMDGPU::SGPRRegBankID, Size), getOperandsMapping({AMDGPU::getValueMapping(AMDGPU::SGPRRegBankID, Size),
AMDGPU::getValueMapping(AMDGPU::SCCRegBankID, 1), AMDGPU::getValueMapping(AMDGPU::SCCRegBankID, 1),
AMDGPU::getValueMapping(AMDGPU::SGPRRegBankID, Size), AMDGPU::getValueMapping(AMDGPU::SGPRRegBankID, Size),
AMDGPU::getValueMapping(AMDGPU::SGPRRegBankID, Size)}), AMDGPU::getValueMapping(AMDGPU::SGPRRegBankID, Size)}),
4); // Num Operands 4); // Num Operands
AltMappings.push_back(&SSMapping); AltMappings.push_back(&SSMapping);
const InstructionMapping &SVMapping = getInstructionMapping(2, 1,
getOperandsMapping({AMDGPU::getValueMapping(AMDGPU::VGPRRegBankID, Size),
AMDGPU::getValueMapping(AMDGPU::SGPRRegBankID, 1),
AMDGPU::getValueMapping(AMDGPU::SGPRRegBankID, Size),
AMDGPU::getValueMapping(AMDGPU::VGPRRegBankID, Size)}),
4); // Num Operands
AltMappings.push_back(&SVMapping);
const InstructionMapping &VSMapping = getInstructionMapping(2, 1,
getOperandsMapping({AMDGPU::getValueMapping(AMDGPU::VGPRRegBankID, Size),
AMDGPU::getValueMapping(AMDGPU::SGPRRegBankID, 1),
AMDGPU::getValueMapping(AMDGPU::VGPRRegBankID, Size),
AMDGPU::getValueMapping(AMDGPU::SGPRRegBankID, Size)}),
4); // Num Operands
AltMappings.push_back(&VSMapping);
const InstructionMapping &VVMapping = getInstructionMapping(2, 1, const InstructionMapping &VVMapping = getInstructionMapping(2, 1,
getOperandsMapping({AMDGPU::getValueMapping(AMDGPU::VGPRRegBankID, Size), getOperandsMapping({AMDGPU::getValueMapping(AMDGPU::VGPRRegBankID, Size),
AMDGPU::getValueMapping(AMDGPU::SGPRRegBankID, 1), AMDGPU::getValueMapping(AMDGPU::SGPRRegBankID, 1),
AMDGPU::getValueMapping(AMDGPU::VGPRRegBankID, Size), AMDGPU::getValueMapping(AMDGPU::VGPRRegBankID, Size),
AMDGPU::getValueMapping(AMDGPU::VGPRRegBankID, Size)}), AMDGPU::getValueMapping(AMDGPU::VGPRRegBankID, Size)}),
4); // Num Operands 4); // Num Operands
AltMappings.push_back(&VVMapping); AltMappings.push_back(&VVMapping);
▲ Show 20 Lines • Show All 482 Lines • Show Last 20 Lines

test/CodeGen/AMDGPU/GlobalISel/regbankselect-select.mir

# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -global-isel %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck --check-prefixes=GCN,FAST %s # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -global-isel %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck --check-prefixes=GCN,GREEDY %s # RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -global-isel %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -global-isel %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s
# REQUIRES: global-isel
--- |
define void @select_sss() { ret void }
define void @select_ssv() { ret void }
define void @select_svs() { ret void }
define void @select_svv() { ret void }
define void @select_vss() { ret void }
define void @select_vsv() { ret void }
define void @select_vvs() { ret void }
define void @select_vvv() { ret void }
...
--- ---
name: select_sss name: select_sss
legalized: true legalized: true
# GCN-LABEL: name: select_sss
# GCN: [[SGPR0:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
# GCN: [[SGPR1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
# GCN: [[SGPR2:%[0-9]+]]:sgpr(s32) = COPY $sgpr2
# GCN: [[SGPR3:%[0-9]+]]:sgpr(s32) = COPY $sgpr3
# GCN: [[SCC:%[0-9]+]]:scc(s1) = G_ICMP intpred(ne), [[SGPR0]](s32), [[SGPR1]]
# GCN: {{%[0-9]+}}:sgpr(s32) = G_SELECT [[SCC]](s1), [[SGPR2]], [[SGPR3]]
body: | body: |
bb.0: bb.0:
liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3 liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3
; CHECK-LABEL: name: select_sss
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
; CHECK: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr2
; CHECK: [[COPY3:%[0-9]+]]:sgpr(s32) = COPY $sgpr3
; CHECK: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]
; CHECK: [[SELECT:%[0-9]+]]:sgpr(s32) = G_SELECT [[ICMP]](s1), [[COPY2]], [[COPY3]]
%0:_(s32) = COPY $sgpr0 %0:_(s32) = COPY $sgpr0
%1:_(s32) = COPY $sgpr1 %1:_(s32) = COPY $sgpr1
%2:_(s32) = COPY $sgpr2 %2:_(s32) = COPY $sgpr2
%3:_(s32) = COPY $sgpr3 %3:_(s32) = COPY $sgpr3
%4:_(s1) = G_ICMP intpred(ne), %0, %1 %4:_(s1) = G_ICMP intpred(ne), %0, %1
%5:_(s32) = G_SELECT %4, %2, %3 %5:_(s32) = G_SELECT %4, %2, %3
... ...
--- ---
name: select_ssv name: select_ssv
legalized: true legalized: true
# GCN-LABEL: name: select_ssv
# GCN: [[SGPR0:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
# GCN: [[SGPR1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
# GCN: [[SGPR2:%[0-9]+]]:sgpr(s32) = COPY $sgpr2
# GCN: [[VGPR0:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
# GCN: [[SCC:%[0-9]+]]:scc(s1) = G_ICMP intpred(ne), [[SGPR0]](s32), [[SGPR1]]
# GCN: [[SCC_S:%[0-9]+]]:sgpr(s1) = COPY [[SCC]]
# FAST: [[SGPR2_V:%[0-9]+]]:vgpr(s32) = COPY [[SGPR2]]
# FAST: {{%[0-9]+}}:vgpr(s32) = G_SELECT [[SCC_S]](s1), [[SGPR2_V]], [[VGPR0]]
# GREEDY: {{%[0-9]+}}:vgpr(s32) = G_SELECT [[SCC_S]](s1), [[SGPR2]], [[VGPR0]]
body: | body: |
bb.0: bb.0:
liveins: $sgpr0, $sgpr1, $sgpr2, $vgpr0 liveins: $sgpr0, $sgpr1, $sgpr2, $vgpr0
; CHECK-LABEL: name: select_ssv
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
; CHECK: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr2
; CHECK: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; CHECK: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]
; CHECK: [[COPY4:%[0-9]+]]:sgpr(s1) = COPY [[ICMP]](s1)
; CHECK: [[COPY5:%[0-9]+]]:vgpr(s32) = COPY [[COPY2]](s32)
; CHECK: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[COPY4]](s1), [[COPY5]], [[COPY3]]
%0:_(s32) = COPY $sgpr0 %0:_(s32) = COPY $sgpr0
%1:_(s32) = COPY $sgpr1 %1:_(s32) = COPY $sgpr1
%2:_(s32) = COPY $sgpr2 %2:_(s32) = COPY $sgpr2
%3:_(s32) = COPY $vgpr0 %3:_(s32) = COPY $vgpr0
%4:_(s1) = G_ICMP intpred(ne), %0, %1 %4:_(s1) = G_ICMP intpred(ne), %0, %1
%5:_(s32) = G_SELECT %4, %2, %3 %5:_(s32) = G_SELECT %4, %2, %3
... ...
--- ---
name: select_svs name: select_svs
legalized: true legalized: true
# GCN-LABEL: name: select_svs
# GCN: [[SGPR0:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
# GCN: [[SGPR1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
# GCN: [[SGPR2:%[0-9]+]]:sgpr(s32) = COPY $sgpr2
# GCN: [[VGPR0:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
# GCN: [[SCC:%[0-9]+]]:scc(s1) = G_ICMP intpred(ne), [[SGPR0]](s32), [[SGPR1]]
# GCN: [[SCC_S:%[0-9]+]]:sgpr(s1) = COPY [[SCC]]
# FAST: [[SGPR2_V:%[0-9]+]]:vgpr(s32) = COPY [[SGPR2]]
# FAST: {{%[0-9]+}}:vgpr(s32) = G_SELECT [[SCC_S]](s1), [[VGPR0]], [[SGPR2_V]]
# GREEDY: {{%[0-9]+}}:vgpr(s32) = G_SELECT [[SCC_S]](s1), [[VGPR0]], [[SGPR2]]
body: | body: |
bb.0: bb.0:
liveins: $sgpr0, $sgpr1, $sgpr2, $vgpr0 liveins: $sgpr0, $sgpr1, $sgpr2, $vgpr0
; CHECK-LABEL: name: select_svs
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
; CHECK: [[COPY2:%[0-9]+]]:sgpr(s32) = COPY $sgpr2
; CHECK: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; CHECK: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]
; CHECK: [[COPY4:%[0-9]+]]:sgpr(s1) = COPY [[ICMP]](s1)
; CHECK: [[COPY5:%[0-9]+]]:vgpr(s32) = COPY [[COPY2]](s32)
; CHECK: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[COPY4]](s1), [[COPY3]], [[COPY5]]
%0:_(s32) = COPY $sgpr0 %0:_(s32) = COPY $sgpr0
%1:_(s32) = COPY $sgpr1 %1:_(s32) = COPY $sgpr1
%2:_(s32) = COPY $sgpr2 %2:_(s32) = COPY $sgpr2
%3:_(s32) = COPY $vgpr0 %3:_(s32) = COPY $vgpr0
%4:_(s1) = G_ICMP intpred(ne), %0, %1 %4:_(s1) = G_ICMP intpred(ne), %0, %1
%5:_(s32) = G_SELECT %4, %3, %2 %5:_(s32) = G_SELECT %4, %3, %2
... ...
--- ---
name: select_svv name: select_svv
legalized: true legalized: true
# GCN-LABEL: name: select_svv
# GCN: [[SGPR0:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
# GCN: [[SGPR1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
# GCN: [[VGPR0:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
# GCN: [[VGPR1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
# GCN: [[SCC:%[0-9]+]]:scc(s1) = G_ICMP intpred(ne), [[SGPR0]](s32), [[SGPR1]]
# GCN: [[SCC_S:%[0-9]+]]:sgpr(s1) = COPY [[SCC]]
# GCN: {{%[0-9]+}}:vgpr(s32) = G_SELECT [[SCC_S]](s1), [[VGPR0]], [[VGPR1]]
body: | body: |
bb.0: bb.0:
liveins: $sgpr0, $sgpr1, $vgpr0, $vgpr1 liveins: $sgpr0, $sgpr1, $vgpr0, $vgpr1
; CHECK-LABEL: name: select_svv
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; CHECK: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
; CHECK: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]
; CHECK: [[COPY4:%[0-9]+]]:sgpr(s1) = COPY [[ICMP]](s1)
; CHECK: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[COPY4]](s1), [[COPY2]], [[COPY3]]
%0:_(s32) = COPY $sgpr0 %0:_(s32) = COPY $sgpr0
%1:_(s32) = COPY $sgpr1 %1:_(s32) = COPY $sgpr1
%2:_(s32) = COPY $vgpr0 %2:_(s32) = COPY $vgpr0
%3:_(s32) = COPY $vgpr1 %3:_(s32) = COPY $vgpr1
%4:_(s1) = G_ICMP intpred(ne), %0, %1 %4:_(s1) = G_ICMP intpred(ne), %0, %1
%5:_(s32) = G_SELECT %4, %2, %3 %5:_(s32) = G_SELECT %4, %2, %3
... ...
--- ---
name: select_vss name: select_vss
legalized: true legalized: true
# GCN-LABEL: name: select_vss
# GCN: [[SGPR0:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
# GCN: [[SGPR1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
# GCN: [[VGPR0:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
# GCN: [[VGPR1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
# GCN: [[VCC:%[0-9]+]]:sgpr(s1) = G_ICMP intpred(ne), [[VGPR0]](s32), [[VGPR1]]
# FAST: [[SGPR0_V:%[0-9]+]]:vgpr(s32) = COPY [[SGPR0]]
# GCN: [[SGPR1_V:%[0-9]+]]:vgpr(s32) = COPY [[SGPR1]]
# FAST: {{%[0-9]+}}:vgpr(s32) = G_SELECT [[VCC]](s1), [[SGPR0_V]], [[SGPR1_V]]
# GREDY: {{%[0-9]+}}:vgpr(s32) = G_SELECT [[VCC]](s1), [[SGPR0]], [[SGPR1_V]]
body: | body: |
bb.0: bb.0:
liveins: $sgpr0, $sgpr1, $vgpr0, $vgpr1 liveins: $sgpr0, $sgpr1, $vgpr0, $vgpr1
; CHECK-LABEL: name: select_vss
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; CHECK: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
; CHECK: [[ICMP:%[0-9]+]]:sgpr(s1) = G_ICMP intpred(ne), [[COPY2]](s32), [[COPY3]]
; CHECK: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
; CHECK: [[COPY5:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
; CHECK: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[COPY4]], [[COPY5]]
%0:_(s32) = COPY $sgpr0 %0:_(s32) = COPY $sgpr0
%1:_(s32) = COPY $sgpr1 %1:_(s32) = COPY $sgpr1
%2:_(s32) = COPY $vgpr0 %2:_(s32) = COPY $vgpr0
%3:_(s32) = COPY $vgpr1 %3:_(s32) = COPY $vgpr1
%4:_(s1) = G_ICMP intpred(ne), %2, %3 %4:_(s1) = G_ICMP intpred(ne), %2, %3
%5:_(s32) = G_SELECT %4, %0, %1 %5:_(s32) = G_SELECT %4, %0, %1
... ...
--- ---
name: select_vsv name: select_vsv
legalized: true legalized: true
# GCN-LABEL: name: select_vsv
# GCN: [[SGPR0:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
# GCN: [[VGPR0:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
# GCN: [[VGPR1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
# GCN: [[VGPR2:%[0-9]+]]:vgpr(s32) = COPY $vgpr2
# GCN: [[VCC:%[0-9]+]]:sgpr(s1) = G_ICMP intpred(ne), [[VGPR0]](s32), [[VGPR1]]
# FAST: [[SGPR0_V:%[0-9]+]]:vgpr(s32) = COPY [[SGPR0]]
# FAST: {{%[0-9]+}}:vgpr(s32) = G_SELECT [[VCC]](s1), [[SGPR0_V]], [[VGPR2]]
# GREEDY: {{%[0-9]+}}:vgpr(s32) = G_SELECT [[VCC]](s1), [[SGPR0]], [[VGPR2]]
body: | body: |
bb.0: bb.0:
liveins: $sgpr0, $vgpr0, $vgpr1, $vgpr2 liveins: $sgpr0, $vgpr0, $vgpr1, $vgpr2
; CHECK-LABEL: name: select_vsv
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
; CHECK: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY $vgpr2
; CHECK: [[ICMP:%[0-9]+]]:sgpr(s1) = G_ICMP intpred(ne), [[COPY1]](s32), [[COPY2]]
; CHECK: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
; CHECK: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[COPY4]], [[COPY3]]
%0:_(s32) = COPY $sgpr0 %0:_(s32) = COPY $sgpr0
%1:_(s32) = COPY $vgpr0 %1:_(s32) = COPY $vgpr0
%2:_(s32) = COPY $vgpr1 %2:_(s32) = COPY $vgpr1
%3:_(s32) = COPY $vgpr2 %3:_(s32) = COPY $vgpr2
%4:_(s1) = G_ICMP intpred(ne), %1, %2 %4:_(s1) = G_ICMP intpred(ne), %1, %2
%5:_(s32) = G_SELECT %4, %0, %3 %5:_(s32) = G_SELECT %4, %0, %3
... ...
--- ---
name: select_vvs name: select_vvs
legalized: true legalized: true
# GCN-LABEL: name: select_vvs
# GCN: [[SGPR0:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
# GCN: [[VGPR0:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
# GCN: [[VGPR1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
# GCN: [[VGPR2:%[0-9]+]]:vgpr(s32) = COPY $vgpr2
# GCN: [[VCC:%[0-9]+]]:sgpr(s1) = G_ICMP intpred(ne), [[VGPR0]](s32), [[VGPR1]]
# FAST: [[SGPR0_V:%[0-9]+]]:vgpr(s32) = COPY [[SGPR0]]
# FAST: {{%[0-9]+}}:vgpr(s32) = G_SELECT [[VCC]](s1), [[VGPR2]], [[SGPR0_V]]
# GREEDY: {{%[0-9]+}}:vgpr(s32) = G_SELECT [[VCC]](s1), [[VGPR2]], [[SGPR0]]
body: | body: |
bb.0: bb.0:
liveins: $sgpr0, $vgpr0, $vgpr1, $vgpr2 liveins: $sgpr0, $vgpr0, $vgpr1, $vgpr2
; CHECK-LABEL: name: select_vvs
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
; CHECK: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY $vgpr2
; CHECK: [[ICMP:%[0-9]+]]:sgpr(s1) = G_ICMP intpred(ne), [[COPY1]](s32), [[COPY2]]
; CHECK: [[COPY4:%[0-9]+]]:vgpr(s32) = COPY [[COPY]](s32)
; CHECK: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[COPY3]], [[COPY4]]
%0:_(s32) = COPY $sgpr0 %0:_(s32) = COPY $sgpr0
%1:_(s32) = COPY $vgpr0 %1:_(s32) = COPY $vgpr0
%2:_(s32) = COPY $vgpr1 %2:_(s32) = COPY $vgpr1
%3:_(s32) = COPY $vgpr2 %3:_(s32) = COPY $vgpr2
%4:_(s1) = G_ICMP intpred(ne), %1, %2 %4:_(s1) = G_ICMP intpred(ne), %1, %2
%5:_(s32) = G_SELECT %4, %3, %0 %5:_(s32) = G_SELECT %4, %3, %0
... ...
--- ---
name: select_vvv name: select_vvv
legalized: true legalized: true
# GCN-LABEL: name: select_vvv
# GCN: [[VGPR0:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
# GCN: [[VGPR1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
# GCN: [[VGPR2:%[0-9]+]]:vgpr(s32) = COPY $vgpr2
# GCN: [[VGPR3:%[0-9]+]]:vgpr(s32) = COPY $vgpr3
# GCN: [[VCC:%[0-9]+]]:sgpr(s1) = G_ICMP intpred(ne), [[VGPR0]](s32), [[VGPR1]]
# GCN: {{%[0-9]+}}:vgpr(s32) = G_SELECT [[VCC]](s1), [[VGPR2]], [[VGPR3]]
body: | body: |
bb.0: bb.0:
liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
; CHECK-LABEL: name: select_vvv
; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY $vgpr2
; CHECK: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY $vgpr3
; CHECK: [[ICMP:%[0-9]+]]:sgpr(s1) = G_ICMP intpred(ne), [[COPY]](s32), [[COPY1]]
; CHECK: [[SELECT:%[0-9]+]]:vgpr(s32) = G_SELECT [[ICMP]](s1), [[COPY2]], [[COPY3]]
%0:_(s32) = COPY $vgpr0 %0:_(s32) = COPY $vgpr0
%1:_(s32) = COPY $vgpr1 %1:_(s32) = COPY $vgpr1
%2:_(s32) = COPY $vgpr2 %2:_(s32) = COPY $vgpr2
%3:_(s32) = COPY $vgpr3 %3:_(s32) = COPY $vgpr3
%4:_(s1) = G_ICMP intpred(ne), %0, %1 %4:_(s1) = G_ICMP intpred(ne), %0, %1
%5:_(s32) = G_SELECT %4, %2, %3 %5:_(s32) = G_SELECT %4, %2, %3
... ...