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[X86] Don't emit MULX by default with BMI2
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Authored by craig.topper on Dec 11 2018, 9:45 AM.

Details

Summary

MULX has somewhat improved register allocation constraints compared to the legacy MUL instruction. Both output registers are encoded instead of fixed to EAX/EDX, but EDX is used as input. It also doesn't touch flags. Unfortunately, the encoding is longer.

Prefering it whenever BMI2 is enabled is probably not optimal. Choosing it should somehow be a function of register allocation constraints like converting adds to three address. gcc and icc definitely don't pick MULX by default. Not sure what if any rules they have for using it.

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Event Timeline

craig.topper created this revision.Dec 11 2018, 9:45 AM

I don't have a strong opinion on this.

If converting a MUL to a MULX can save a split/spill, then we should do that. This is an interesting project. As long as we have a bug to track this work, then I am fine with this decision. Not sure if other people agree.

I've generalized https://bugs.llvm.org/show_bug.cgi?id=34232 to cover all possible cases where we should/could use MULX

test/CodeGen/X86/stack-folding-bmi2.ll
31

Fix this?

Stack folding test was moved to MIR in a separate commit. I also added a MULX32rr test case that was missing. So the stack folding test change is dropped from this patch.

RKSimon accepted this revision.Dec 12 2018, 1:10 PM

LGTM

This revision is now accepted and ready to land.Dec 12 2018, 1:10 PM
This revision was automatically updated to reflect the committed changes.